| 1 | /* Target-dependent code for the IA-64 for GDB, the GNU debugger. |
| 2 | |
| 3 | Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 20 | Boston, MA 02111-1307, USA. */ |
| 21 | |
| 22 | #include "defs.h" |
| 23 | #include "inferior.h" |
| 24 | #include "symfile.h" /* for entry_point_address */ |
| 25 | #include "gdbcore.h" |
| 26 | #include "arch-utils.h" |
| 27 | #include "floatformat.h" |
| 28 | #include "regcache.h" |
| 29 | #include "reggroups.h" |
| 30 | #include "frame.h" |
| 31 | #include "frame-base.h" |
| 32 | #include "frame-unwind.h" |
| 33 | #include "doublest.h" |
| 34 | #include "value.h" |
| 35 | #include "gdb_assert.h" |
| 36 | #include "objfiles.h" |
| 37 | #include "elf/common.h" /* for DT_PLTGOT value */ |
| 38 | #include "elf-bfd.h" |
| 39 | |
| 40 | /* Hook for determining the global pointer when calling functions in |
| 41 | the inferior under AIX. The initialization code in ia64-aix-nat.c |
| 42 | sets this hook to the address of a function which will find the |
| 43 | global pointer for a given address. |
| 44 | |
| 45 | The generic code which uses the dynamic section in the inferior for |
| 46 | finding the global pointer is not of much use on AIX since the |
| 47 | values obtained from the inferior have not been relocated. */ |
| 48 | |
| 49 | CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0; |
| 50 | |
| 51 | /* An enumeration of the different IA-64 instruction types. */ |
| 52 | |
| 53 | typedef enum instruction_type |
| 54 | { |
| 55 | A, /* Integer ALU ; I-unit or M-unit */ |
| 56 | I, /* Non-ALU integer; I-unit */ |
| 57 | M, /* Memory ; M-unit */ |
| 58 | F, /* Floating-point ; F-unit */ |
| 59 | B, /* Branch ; B-unit */ |
| 60 | L, /* Extended (L+X) ; I-unit */ |
| 61 | X, /* Extended (L+X) ; I-unit */ |
| 62 | undefined /* undefined or reserved */ |
| 63 | } instruction_type; |
| 64 | |
| 65 | /* We represent IA-64 PC addresses as the value of the instruction |
| 66 | pointer or'd with some bit combination in the low nibble which |
| 67 | represents the slot number in the bundle addressed by the |
| 68 | instruction pointer. The problem is that the Linux kernel |
| 69 | multiplies its slot numbers (for exceptions) by one while the |
| 70 | disassembler multiplies its slot numbers by 6. In addition, I've |
| 71 | heard it said that the simulator uses 1 as the multiplier. |
| 72 | |
| 73 | I've fixed the disassembler so that the bytes_per_line field will |
| 74 | be the slot multiplier. If bytes_per_line comes in as zero, it |
| 75 | is set to six (which is how it was set up initially). -- objdump |
| 76 | displays pretty disassembly dumps with this value. For our purposes, |
| 77 | we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we |
| 78 | never want to also display the raw bytes the way objdump does. */ |
| 79 | |
| 80 | #define SLOT_MULTIPLIER 1 |
| 81 | |
| 82 | /* Length in bytes of an instruction bundle */ |
| 83 | |
| 84 | #define BUNDLE_LEN 16 |
| 85 | |
| 86 | /* FIXME: These extern declarations should go in ia64-tdep.h. */ |
| 87 | extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int); |
| 88 | extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int); |
| 89 | |
| 90 | static gdbarch_init_ftype ia64_gdbarch_init; |
| 91 | |
| 92 | static gdbarch_register_name_ftype ia64_register_name; |
| 93 | static gdbarch_register_type_ftype ia64_register_type; |
| 94 | static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc; |
| 95 | static gdbarch_skip_prologue_ftype ia64_skip_prologue; |
| 96 | static gdbarch_extract_return_value_ftype ia64_extract_return_value; |
| 97 | static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address; |
| 98 | static gdbarch_use_struct_convention_ftype ia64_use_struct_convention; |
| 99 | static struct type *is_float_or_hfa_type (struct type *t); |
| 100 | |
| 101 | static struct type *builtin_type_ia64_ext; |
| 102 | |
| 103 | #define NUM_IA64_RAW_REGS 462 |
| 104 | |
| 105 | static int sp_regnum = IA64_GR12_REGNUM; |
| 106 | static int fp_regnum = IA64_VFP_REGNUM; |
| 107 | static int lr_regnum = IA64_VRAP_REGNUM; |
| 108 | |
| 109 | /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because |
| 110 | they are in memory and must be calculated via the bsp register. */ |
| 111 | enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM, |
| 112 | V127_REGNUM = V32_REGNUM + 95, |
| 113 | VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM }; |
| 114 | |
| 115 | /* Array of register names; There should be ia64_num_regs strings in |
| 116 | the initializer. */ |
| 117 | |
| 118 | static char *ia64_register_names[] = |
| 119 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 120 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 121 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
| 122 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", |
| 123 | "", "", "", "", "", "", "", "", |
| 124 | "", "", "", "", "", "", "", "", |
| 125 | "", "", "", "", "", "", "", "", |
| 126 | "", "", "", "", "", "", "", "", |
| 127 | "", "", "", "", "", "", "", "", |
| 128 | "", "", "", "", "", "", "", "", |
| 129 | "", "", "", "", "", "", "", "", |
| 130 | "", "", "", "", "", "", "", "", |
| 131 | "", "", "", "", "", "", "", "", |
| 132 | "", "", "", "", "", "", "", "", |
| 133 | "", "", "", "", "", "", "", "", |
| 134 | "", "", "", "", "", "", "", "", |
| 135 | |
| 136 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", |
| 137 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", |
| 138 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", |
| 139 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", |
| 140 | "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", |
| 141 | "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", |
| 142 | "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55", |
| 143 | "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63", |
| 144 | "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71", |
| 145 | "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", |
| 146 | "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", |
| 147 | "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95", |
| 148 | "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103", |
| 149 | "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111", |
| 150 | "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119", |
| 151 | "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127", |
| 152 | |
| 153 | "", "", "", "", "", "", "", "", |
| 154 | "", "", "", "", "", "", "", "", |
| 155 | "", "", "", "", "", "", "", "", |
| 156 | "", "", "", "", "", "", "", "", |
| 157 | "", "", "", "", "", "", "", "", |
| 158 | "", "", "", "", "", "", "", "", |
| 159 | "", "", "", "", "", "", "", "", |
| 160 | "", "", "", "", "", "", "", "", |
| 161 | |
| 162 | "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", |
| 163 | |
| 164 | "vfp", "vrap", |
| 165 | |
| 166 | "pr", "ip", "psr", "cfm", |
| 167 | |
| 168 | "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7", |
| 169 | "", "", "", "", "", "", "", "", |
| 170 | "rsc", "bsp", "bspstore", "rnat", |
| 171 | "", "fcr", "", "", |
| 172 | "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "", |
| 173 | "ccv", "", "", "", "unat", "", "", "", |
| 174 | "fpsr", "", "", "", "itc", |
| 175 | "", "", "", "", "", "", "", "", "", "", |
| 176 | "", "", "", "", "", "", "", "", "", |
| 177 | "pfs", "lc", "ec", |
| 178 | "", "", "", "", "", "", "", "", "", "", |
| 179 | "", "", "", "", "", "", "", "", "", "", |
| 180 | "", "", "", "", "", "", "", "", "", "", |
| 181 | "", "", "", "", "", "", "", "", "", "", |
| 182 | "", "", "", "", "", "", "", "", "", "", |
| 183 | "", "", "", "", "", "", "", "", "", "", |
| 184 | "", |
| 185 | "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7", |
| 186 | "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15", |
| 187 | "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23", |
| 188 | "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31", |
| 189 | "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39", |
| 190 | "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47", |
| 191 | "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55", |
| 192 | "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63", |
| 193 | "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71", |
| 194 | "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79", |
| 195 | "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87", |
| 196 | "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95", |
| 197 | "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103", |
| 198 | "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111", |
| 199 | "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119", |
| 200 | "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127", |
| 201 | |
| 202 | "bof", |
| 203 | |
| 204 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", |
| 205 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", |
| 206 | "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", |
| 207 | "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", |
| 208 | "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71", |
| 209 | "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79", |
| 210 | "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87", |
| 211 | "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95", |
| 212 | "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103", |
| 213 | "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111", |
| 214 | "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119", |
| 215 | "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127", |
| 216 | |
| 217 | "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", |
| 218 | "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", |
| 219 | "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23", |
| 220 | "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31", |
| 221 | "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", |
| 222 | "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", |
| 223 | "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55", |
| 224 | "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63", |
| 225 | }; |
| 226 | |
| 227 | struct ia64_frame_cache |
| 228 | { |
| 229 | CORE_ADDR base; /* frame pointer base for frame */ |
| 230 | CORE_ADDR pc; /* function start pc for frame */ |
| 231 | CORE_ADDR saved_sp; /* stack pointer for frame */ |
| 232 | CORE_ADDR bsp; /* points at r32 for the current frame */ |
| 233 | CORE_ADDR cfm; /* cfm value for current frame */ |
| 234 | int frameless; |
| 235 | int sof; /* Size of frame (decoded from cfm value) */ |
| 236 | int sol; /* Size of locals (decoded from cfm value) */ |
| 237 | int sor; /* Number of rotating registers. (decoded from cfm value) */ |
| 238 | CORE_ADDR after_prologue; |
| 239 | /* Address of first instruction after the last |
| 240 | prologue instruction; Note that there may |
| 241 | be instructions from the function's body |
| 242 | intermingled with the prologue. */ |
| 243 | int mem_stack_frame_size; |
| 244 | /* Size of the memory stack frame (may be zero), |
| 245 | or -1 if it has not been determined yet. */ |
| 246 | int fp_reg; /* Register number (if any) used a frame pointer |
| 247 | for this frame. 0 if no register is being used |
| 248 | as the frame pointer. */ |
| 249 | |
| 250 | /* Saved registers. */ |
| 251 | CORE_ADDR saved_regs[NUM_IA64_RAW_REGS]; |
| 252 | |
| 253 | }; |
| 254 | |
| 255 | struct gdbarch_tdep |
| 256 | { |
| 257 | int os_ident; /* From the ELF header, one of the ELFOSABI_ |
| 258 | constants: ELFOSABI_LINUX, ELFOSABI_AIX, |
| 259 | etc. */ |
| 260 | CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int); |
| 261 | /* OS specific function which, given a frame address |
| 262 | and register number, returns the offset to the |
| 263 | given register from the start of the frame. */ |
| 264 | CORE_ADDR (*find_global_pointer) (CORE_ADDR); |
| 265 | }; |
| 266 | |
| 267 | #define SIGCONTEXT_REGISTER_ADDRESS \ |
| 268 | (gdbarch_tdep (current_gdbarch)->sigcontext_register_address) |
| 269 | #define FIND_GLOBAL_POINTER \ |
| 270 | (gdbarch_tdep (current_gdbarch)->find_global_pointer) |
| 271 | |
| 272 | int |
| 273 | ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
| 274 | struct reggroup *group) |
| 275 | { |
| 276 | int vector_p; |
| 277 | int float_p; |
| 278 | int raw_p; |
| 279 | if (group == all_reggroup) |
| 280 | return 1; |
| 281 | vector_p = TYPE_VECTOR (register_type (gdbarch, regnum)); |
| 282 | float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT; |
| 283 | raw_p = regnum < NUM_IA64_RAW_REGS; |
| 284 | if (group == float_reggroup) |
| 285 | return float_p; |
| 286 | if (group == vector_reggroup) |
| 287 | return vector_p; |
| 288 | if (group == general_reggroup) |
| 289 | return (!vector_p && !float_p); |
| 290 | if (group == save_reggroup || group == restore_reggroup) |
| 291 | return raw_p; |
| 292 | return 0; |
| 293 | } |
| 294 | |
| 295 | static const char * |
| 296 | ia64_register_name (int reg) |
| 297 | { |
| 298 | return ia64_register_names[reg]; |
| 299 | } |
| 300 | |
| 301 | struct type * |
| 302 | ia64_register_type (struct gdbarch *arch, int reg) |
| 303 | { |
| 304 | if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM) |
| 305 | return builtin_type_ia64_ext; |
| 306 | else |
| 307 | return builtin_type_long; |
| 308 | } |
| 309 | |
| 310 | static int |
| 311 | ia64_dwarf_reg_to_regnum (int reg) |
| 312 | { |
| 313 | if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM) |
| 314 | return V32_REGNUM + (reg - IA64_GR32_REGNUM); |
| 315 | return reg; |
| 316 | } |
| 317 | |
| 318 | const struct floatformat floatformat_ia64_ext = |
| 319 | { |
| 320 | floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64, |
| 321 | floatformat_intbit_yes |
| 322 | }; |
| 323 | |
| 324 | |
| 325 | /* Read the given register from a sigcontext structure in the |
| 326 | specified frame. */ |
| 327 | |
| 328 | static CORE_ADDR |
| 329 | read_sigcontext_register (struct frame_info *frame, int regnum) |
| 330 | { |
| 331 | CORE_ADDR regaddr; |
| 332 | |
| 333 | if (frame == NULL) |
| 334 | internal_error (__FILE__, __LINE__, |
| 335 | "read_sigcontext_register: NULL frame"); |
| 336 | if (!(get_frame_type (frame) == SIGTRAMP_FRAME)) |
| 337 | internal_error (__FILE__, __LINE__, |
| 338 | "read_sigcontext_register: frame not a signal trampoline"); |
| 339 | if (SIGCONTEXT_REGISTER_ADDRESS == 0) |
| 340 | internal_error (__FILE__, __LINE__, |
| 341 | "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0"); |
| 342 | |
| 343 | regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum); |
| 344 | if (regaddr) |
| 345 | return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum)); |
| 346 | else |
| 347 | internal_error (__FILE__, __LINE__, |
| 348 | "read_sigcontext_register: Register %d not in struct sigcontext", regnum); |
| 349 | } |
| 350 | |
| 351 | /* Extract ``len'' bits from an instruction bundle starting at |
| 352 | bit ``from''. */ |
| 353 | |
| 354 | static long long |
| 355 | extract_bit_field (char *bundle, int from, int len) |
| 356 | { |
| 357 | long long result = 0LL; |
| 358 | int to = from + len; |
| 359 | int from_byte = from / 8; |
| 360 | int to_byte = to / 8; |
| 361 | unsigned char *b = (unsigned char *) bundle; |
| 362 | unsigned char c; |
| 363 | int lshift; |
| 364 | int i; |
| 365 | |
| 366 | c = b[from_byte]; |
| 367 | if (from_byte == to_byte) |
| 368 | c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8); |
| 369 | result = c >> (from % 8); |
| 370 | lshift = 8 - (from % 8); |
| 371 | |
| 372 | for (i = from_byte+1; i < to_byte; i++) |
| 373 | { |
| 374 | result |= ((long long) b[i]) << lshift; |
| 375 | lshift += 8; |
| 376 | } |
| 377 | |
| 378 | if (from_byte < to_byte && (to % 8 != 0)) |
| 379 | { |
| 380 | c = b[to_byte]; |
| 381 | c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8); |
| 382 | result |= ((long long) c) << lshift; |
| 383 | } |
| 384 | |
| 385 | return result; |
| 386 | } |
| 387 | |
| 388 | /* Replace the specified bits in an instruction bundle */ |
| 389 | |
| 390 | static void |
| 391 | replace_bit_field (char *bundle, long long val, int from, int len) |
| 392 | { |
| 393 | int to = from + len; |
| 394 | int from_byte = from / 8; |
| 395 | int to_byte = to / 8; |
| 396 | unsigned char *b = (unsigned char *) bundle; |
| 397 | unsigned char c; |
| 398 | |
| 399 | if (from_byte == to_byte) |
| 400 | { |
| 401 | unsigned char left, right; |
| 402 | c = b[from_byte]; |
| 403 | left = (c >> (to % 8)) << (to % 8); |
| 404 | right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8); |
| 405 | c = (unsigned char) (val & 0xff); |
| 406 | c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8); |
| 407 | c |= right | left; |
| 408 | b[from_byte] = c; |
| 409 | } |
| 410 | else |
| 411 | { |
| 412 | int i; |
| 413 | c = b[from_byte]; |
| 414 | c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8); |
| 415 | c = c | (val << (from % 8)); |
| 416 | b[from_byte] = c; |
| 417 | val >>= 8 - from % 8; |
| 418 | |
| 419 | for (i = from_byte+1; i < to_byte; i++) |
| 420 | { |
| 421 | c = val & 0xff; |
| 422 | val >>= 8; |
| 423 | b[i] = c; |
| 424 | } |
| 425 | |
| 426 | if (to % 8 != 0) |
| 427 | { |
| 428 | unsigned char cv = (unsigned char) val; |
| 429 | c = b[to_byte]; |
| 430 | c = c >> (to % 8) << (to % 8); |
| 431 | c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8); |
| 432 | b[to_byte] = c; |
| 433 | } |
| 434 | } |
| 435 | } |
| 436 | |
| 437 | /* Return the contents of slot N (for N = 0, 1, or 2) in |
| 438 | and instruction bundle */ |
| 439 | |
| 440 | static long long |
| 441 | slotN_contents (char *bundle, int slotnum) |
| 442 | { |
| 443 | return extract_bit_field (bundle, 5+41*slotnum, 41); |
| 444 | } |
| 445 | |
| 446 | /* Store an instruction in an instruction bundle */ |
| 447 | |
| 448 | static void |
| 449 | replace_slotN_contents (char *bundle, long long instr, int slotnum) |
| 450 | { |
| 451 | replace_bit_field (bundle, instr, 5+41*slotnum, 41); |
| 452 | } |
| 453 | |
| 454 | static enum instruction_type template_encoding_table[32][3] = |
| 455 | { |
| 456 | { M, I, I }, /* 00 */ |
| 457 | { M, I, I }, /* 01 */ |
| 458 | { M, I, I }, /* 02 */ |
| 459 | { M, I, I }, /* 03 */ |
| 460 | { M, L, X }, /* 04 */ |
| 461 | { M, L, X }, /* 05 */ |
| 462 | { undefined, undefined, undefined }, /* 06 */ |
| 463 | { undefined, undefined, undefined }, /* 07 */ |
| 464 | { M, M, I }, /* 08 */ |
| 465 | { M, M, I }, /* 09 */ |
| 466 | { M, M, I }, /* 0A */ |
| 467 | { M, M, I }, /* 0B */ |
| 468 | { M, F, I }, /* 0C */ |
| 469 | { M, F, I }, /* 0D */ |
| 470 | { M, M, F }, /* 0E */ |
| 471 | { M, M, F }, /* 0F */ |
| 472 | { M, I, B }, /* 10 */ |
| 473 | { M, I, B }, /* 11 */ |
| 474 | { M, B, B }, /* 12 */ |
| 475 | { M, B, B }, /* 13 */ |
| 476 | { undefined, undefined, undefined }, /* 14 */ |
| 477 | { undefined, undefined, undefined }, /* 15 */ |
| 478 | { B, B, B }, /* 16 */ |
| 479 | { B, B, B }, /* 17 */ |
| 480 | { M, M, B }, /* 18 */ |
| 481 | { M, M, B }, /* 19 */ |
| 482 | { undefined, undefined, undefined }, /* 1A */ |
| 483 | { undefined, undefined, undefined }, /* 1B */ |
| 484 | { M, F, B }, /* 1C */ |
| 485 | { M, F, B }, /* 1D */ |
| 486 | { undefined, undefined, undefined }, /* 1E */ |
| 487 | { undefined, undefined, undefined }, /* 1F */ |
| 488 | }; |
| 489 | |
| 490 | /* Fetch and (partially) decode an instruction at ADDR and return the |
| 491 | address of the next instruction to fetch. */ |
| 492 | |
| 493 | static CORE_ADDR |
| 494 | fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr) |
| 495 | { |
| 496 | char bundle[BUNDLE_LEN]; |
| 497 | int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; |
| 498 | long long template; |
| 499 | int val; |
| 500 | |
| 501 | /* Warn about slot numbers greater than 2. We used to generate |
| 502 | an error here on the assumption that the user entered an invalid |
| 503 | address. But, sometimes GDB itself requests an invalid address. |
| 504 | This can (easily) happen when execution stops in a function for |
| 505 | which there are no symbols. The prologue scanner will attempt to |
| 506 | find the beginning of the function - if the nearest symbol |
| 507 | happens to not be aligned on a bundle boundary (16 bytes), the |
| 508 | resulting starting address will cause GDB to think that the slot |
| 509 | number is too large. |
| 510 | |
| 511 | So we warn about it and set the slot number to zero. It is |
| 512 | not necessarily a fatal condition, particularly if debugging |
| 513 | at the assembly language level. */ |
| 514 | if (slotnum > 2) |
| 515 | { |
| 516 | warning ("Can't fetch instructions for slot numbers greater than 2.\n" |
| 517 | "Using slot 0 instead"); |
| 518 | slotnum = 0; |
| 519 | } |
| 520 | |
| 521 | addr &= ~0x0f; |
| 522 | |
| 523 | val = target_read_memory (addr, bundle, BUNDLE_LEN); |
| 524 | |
| 525 | if (val != 0) |
| 526 | return 0; |
| 527 | |
| 528 | *instr = slotN_contents (bundle, slotnum); |
| 529 | template = extract_bit_field (bundle, 0, 5); |
| 530 | *it = template_encoding_table[(int)template][slotnum]; |
| 531 | |
| 532 | if (slotnum == 2 || (slotnum == 1 && *it == L)) |
| 533 | addr += 16; |
| 534 | else |
| 535 | addr += (slotnum + 1) * SLOT_MULTIPLIER; |
| 536 | |
| 537 | return addr; |
| 538 | } |
| 539 | |
| 540 | /* There are 5 different break instructions (break.i, break.b, |
| 541 | break.m, break.f, and break.x), but they all have the same |
| 542 | encoding. (The five bit template in the low five bits of the |
| 543 | instruction bundle distinguishes one from another.) |
| 544 | |
| 545 | The runtime architecture manual specifies that break instructions |
| 546 | used for debugging purposes must have the upper two bits of the 21 |
| 547 | bit immediate set to a 0 and a 1 respectively. A breakpoint |
| 548 | instruction encodes the most significant bit of its 21 bit |
| 549 | immediate at bit 36 of the 41 bit instruction. The penultimate msb |
| 550 | is at bit 25 which leads to the pattern below. |
| 551 | |
| 552 | Originally, I had this set up to do, e.g, a "break.i 0x80000" But |
| 553 | it turns out that 0x80000 was used as the syscall break in the early |
| 554 | simulators. So I changed the pattern slightly to do "break.i 0x080001" |
| 555 | instead. But that didn't work either (I later found out that this |
| 556 | pattern was used by the simulator that I was using.) So I ended up |
| 557 | using the pattern seen below. */ |
| 558 | |
| 559 | #if 0 |
| 560 | #define IA64_BREAKPOINT 0x00002000040LL |
| 561 | #endif |
| 562 | #define IA64_BREAKPOINT 0x00003333300LL |
| 563 | |
| 564 | static int |
| 565 | ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache) |
| 566 | { |
| 567 | char bundle[BUNDLE_LEN]; |
| 568 | int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; |
| 569 | long long instr; |
| 570 | int val; |
| 571 | int template; |
| 572 | |
| 573 | if (slotnum > 2) |
| 574 | error("Can't insert breakpoint for slot numbers greater than 2."); |
| 575 | |
| 576 | addr &= ~0x0f; |
| 577 | |
| 578 | val = target_read_memory (addr, bundle, BUNDLE_LEN); |
| 579 | |
| 580 | /* Check for L type instruction in 2nd slot, if present then |
| 581 | bump up the slot number to the 3rd slot */ |
| 582 | template = extract_bit_field (bundle, 0, 5); |
| 583 | if (slotnum == 1 && template_encoding_table[template][1] == L) |
| 584 | { |
| 585 | slotnum = 2; |
| 586 | } |
| 587 | |
| 588 | instr = slotN_contents (bundle, slotnum); |
| 589 | memcpy(contents_cache, &instr, sizeof(instr)); |
| 590 | replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum); |
| 591 | if (val == 0) |
| 592 | target_write_memory (addr, bundle, BUNDLE_LEN); |
| 593 | |
| 594 | return val; |
| 595 | } |
| 596 | |
| 597 | static int |
| 598 | ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache) |
| 599 | { |
| 600 | char bundle[BUNDLE_LEN]; |
| 601 | int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER; |
| 602 | long long instr; |
| 603 | int val; |
| 604 | int template; |
| 605 | |
| 606 | addr &= ~0x0f; |
| 607 | |
| 608 | val = target_read_memory (addr, bundle, BUNDLE_LEN); |
| 609 | |
| 610 | /* Check for L type instruction in 2nd slot, if present then |
| 611 | bump up the slot number to the 3rd slot */ |
| 612 | template = extract_bit_field (bundle, 0, 5); |
| 613 | if (slotnum == 1 && template_encoding_table[template][1] == L) |
| 614 | { |
| 615 | slotnum = 2; |
| 616 | } |
| 617 | |
| 618 | memcpy (&instr, contents_cache, sizeof instr); |
| 619 | replace_slotN_contents (bundle, instr, slotnum); |
| 620 | if (val == 0) |
| 621 | target_write_memory (addr, bundle, BUNDLE_LEN); |
| 622 | |
| 623 | return val; |
| 624 | } |
| 625 | |
| 626 | /* We don't really want to use this, but remote.c needs to call it in order |
| 627 | to figure out if Z-packets are supported or not. Oh, well. */ |
| 628 | const unsigned char * |
| 629 | ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
| 630 | { |
| 631 | static unsigned char breakpoint[] = |
| 632 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
| 633 | *lenptr = sizeof (breakpoint); |
| 634 | #if 0 |
| 635 | *pcptr &= ~0x0f; |
| 636 | #endif |
| 637 | return breakpoint; |
| 638 | } |
| 639 | |
| 640 | static CORE_ADDR |
| 641 | ia64_read_fp (void) |
| 642 | { |
| 643 | /* We won't necessarily have a frame pointer and even if we do, it |
| 644 | winds up being extraordinarly messy when attempting to find the |
| 645 | frame chain. So for the purposes of creating frames (which is |
| 646 | all deprecated_read_fp() is used for), simply use the stack |
| 647 | pointer value instead. */ |
| 648 | gdb_assert (SP_REGNUM >= 0); |
| 649 | return read_register (SP_REGNUM); |
| 650 | } |
| 651 | |
| 652 | static CORE_ADDR |
| 653 | ia64_read_pc (ptid_t ptid) |
| 654 | { |
| 655 | CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid); |
| 656 | CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid); |
| 657 | int slot_num = (psr_value >> 41) & 3; |
| 658 | |
| 659 | return pc_value | (slot_num * SLOT_MULTIPLIER); |
| 660 | } |
| 661 | |
| 662 | static void |
| 663 | ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid) |
| 664 | { |
| 665 | int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER; |
| 666 | CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid); |
| 667 | psr_value &= ~(3LL << 41); |
| 668 | psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41; |
| 669 | |
| 670 | new_pc &= ~0xfLL; |
| 671 | |
| 672 | write_register_pid (IA64_PSR_REGNUM, psr_value, ptid); |
| 673 | write_register_pid (IA64_IP_REGNUM, new_pc, ptid); |
| 674 | } |
| 675 | |
| 676 | #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f) |
| 677 | |
| 678 | /* Returns the address of the slot that's NSLOTS slots away from |
| 679 | the address ADDR. NSLOTS may be positive or negative. */ |
| 680 | static CORE_ADDR |
| 681 | rse_address_add(CORE_ADDR addr, int nslots) |
| 682 | { |
| 683 | CORE_ADDR new_addr; |
| 684 | int mandatory_nat_slots = nslots / 63; |
| 685 | int direction = nslots < 0 ? -1 : 1; |
| 686 | |
| 687 | new_addr = addr + 8 * (nslots + mandatory_nat_slots); |
| 688 | |
| 689 | if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9)) |
| 690 | new_addr += 8 * direction; |
| 691 | |
| 692 | if (IS_NaT_COLLECTION_ADDR(new_addr)) |
| 693 | new_addr += 8 * direction; |
| 694 | |
| 695 | return new_addr; |
| 696 | } |
| 697 | |
| 698 | static void |
| 699 | ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
| 700 | int regnum, void *buf) |
| 701 | { |
| 702 | if (regnum >= V32_REGNUM && regnum <= V127_REGNUM) |
| 703 | { |
| 704 | ULONGEST bsp; |
| 705 | ULONGEST cfm; |
| 706 | CORE_ADDR reg; |
| 707 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
| 708 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 709 | |
| 710 | /* The bsp points at the end of the register frame so we |
| 711 | subtract the size of frame from it to get start of register frame. */ |
| 712 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); |
| 713 | |
| 714 | if ((cfm & 0x7f) > regnum - V32_REGNUM) |
| 715 | { |
| 716 | ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); |
| 717 | reg = read_memory_integer ((CORE_ADDR)reg_addr, 8); |
| 718 | store_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum), reg); |
| 719 | } |
| 720 | else |
| 721 | store_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum), 0); |
| 722 | } |
| 723 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) |
| 724 | { |
| 725 | ULONGEST unatN_val; |
| 726 | ULONGEST unat; |
| 727 | regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); |
| 728 | unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0; |
| 729 | store_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum), unatN_val); |
| 730 | } |
| 731 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) |
| 732 | { |
| 733 | ULONGEST natN_val = 0; |
| 734 | ULONGEST bsp; |
| 735 | ULONGEST cfm; |
| 736 | CORE_ADDR gr_addr = 0; |
| 737 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
| 738 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 739 | |
| 740 | /* The bsp points at the end of the register frame so we |
| 741 | subtract the size of frame from it to get start of register frame. */ |
| 742 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); |
| 743 | |
| 744 | if ((cfm & 0x7f) > regnum - V32_REGNUM) |
| 745 | gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); |
| 746 | |
| 747 | if (gr_addr != 0) |
| 748 | { |
| 749 | /* Compute address of nat collection bits. */ |
| 750 | CORE_ADDR nat_addr = gr_addr | 0x1f8; |
| 751 | CORE_ADDR nat_collection; |
| 752 | int nat_bit; |
| 753 | /* If our nat collection address is bigger than bsp, we have to get |
| 754 | the nat collection from rnat. Otherwise, we fetch the nat |
| 755 | collection from the computed address. */ |
| 756 | if (nat_addr >= bsp) |
| 757 | regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection); |
| 758 | else |
| 759 | nat_collection = read_memory_integer (nat_addr, 8); |
| 760 | nat_bit = (gr_addr >> 3) & 0x3f; |
| 761 | natN_val = (nat_collection >> nat_bit) & 1; |
| 762 | } |
| 763 | |
| 764 | store_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum), natN_val); |
| 765 | } |
| 766 | else if (regnum == VBOF_REGNUM) |
| 767 | { |
| 768 | /* A virtual register frame start is provided for user convenience. |
| 769 | It can be calculated as the bsp - sof (sizeof frame). */ |
| 770 | ULONGEST bsp, vbsp; |
| 771 | ULONGEST cfm; |
| 772 | CORE_ADDR reg; |
| 773 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
| 774 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 775 | |
| 776 | /* The bsp points at the end of the register frame so we |
| 777 | subtract the size of frame from it to get beginning of frame. */ |
| 778 | vbsp = rse_address_add (bsp, -(cfm & 0x7f)); |
| 779 | store_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum), vbsp); |
| 780 | } |
| 781 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) |
| 782 | { |
| 783 | ULONGEST pr; |
| 784 | ULONGEST cfm; |
| 785 | ULONGEST prN_val; |
| 786 | CORE_ADDR reg; |
| 787 | regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr); |
| 788 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 789 | |
| 790 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) |
| 791 | { |
| 792 | /* Fetch predicate register rename base from current frame |
| 793 | marker for this frame. */ |
| 794 | int rrb_pr = (cfm >> 32) & 0x3f; |
| 795 | |
| 796 | /* Adjust the register number to account for register rotation. */ |
| 797 | regnum = VP16_REGNUM |
| 798 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; |
| 799 | } |
| 800 | prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0; |
| 801 | store_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum), prN_val); |
| 802 | } |
| 803 | else |
| 804 | memset (buf, 0, REGISTER_RAW_SIZE (regnum)); |
| 805 | } |
| 806 | |
| 807 | static void |
| 808 | ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
| 809 | int regnum, const void *buf) |
| 810 | { |
| 811 | if (regnum >= V32_REGNUM && regnum <= V127_REGNUM) |
| 812 | { |
| 813 | ULONGEST bsp; |
| 814 | ULONGEST cfm; |
| 815 | CORE_ADDR reg; |
| 816 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
| 817 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 818 | |
| 819 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); |
| 820 | |
| 821 | if ((cfm & 0x7f) > regnum - V32_REGNUM) |
| 822 | { |
| 823 | ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); |
| 824 | write_memory (reg_addr, (void *)buf, 8); |
| 825 | } |
| 826 | } |
| 827 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) |
| 828 | { |
| 829 | ULONGEST unatN_val, unat, unatN_mask; |
| 830 | regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); |
| 831 | unatN_val = extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)); |
| 832 | unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM)); |
| 833 | if (unatN_val == 0) |
| 834 | unat &= ~unatN_mask; |
| 835 | else if (unatN_val == 1) |
| 836 | unat |= unatN_mask; |
| 837 | regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat); |
| 838 | } |
| 839 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) |
| 840 | { |
| 841 | ULONGEST natN_val; |
| 842 | ULONGEST bsp; |
| 843 | ULONGEST cfm; |
| 844 | CORE_ADDR gr_addr = 0; |
| 845 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
| 846 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 847 | |
| 848 | /* The bsp points at the end of the register frame so we |
| 849 | subtract the size of frame from it to get start of register frame. */ |
| 850 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); |
| 851 | |
| 852 | if ((cfm & 0x7f) > regnum - V32_REGNUM) |
| 853 | gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); |
| 854 | |
| 855 | natN_val = extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)); |
| 856 | |
| 857 | if (gr_addr != 0 && (natN_val == 0 || natN_val == 1)) |
| 858 | { |
| 859 | /* Compute address of nat collection bits. */ |
| 860 | CORE_ADDR nat_addr = gr_addr | 0x1f8; |
| 861 | CORE_ADDR nat_collection; |
| 862 | int natN_bit = (gr_addr >> 3) & 0x3f; |
| 863 | ULONGEST natN_mask = (1LL << natN_bit); |
| 864 | /* If our nat collection address is bigger than bsp, we have to get |
| 865 | the nat collection from rnat. Otherwise, we fetch the nat |
| 866 | collection from the computed address. */ |
| 867 | if (nat_addr >= bsp) |
| 868 | { |
| 869 | regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection); |
| 870 | if (natN_val) |
| 871 | nat_collection |= natN_mask; |
| 872 | else |
| 873 | nat_collection &= ~natN_mask; |
| 874 | regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection); |
| 875 | } |
| 876 | else |
| 877 | { |
| 878 | char nat_buf[8]; |
| 879 | nat_collection = read_memory_integer (nat_addr, 8); |
| 880 | if (natN_val) |
| 881 | nat_collection |= natN_mask; |
| 882 | else |
| 883 | nat_collection &= ~natN_mask; |
| 884 | store_unsigned_integer (nat_buf, REGISTER_RAW_SIZE (regnum), nat_collection); |
| 885 | write_memory (nat_addr, nat_buf, 8); |
| 886 | } |
| 887 | } |
| 888 | } |
| 889 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) |
| 890 | { |
| 891 | ULONGEST pr; |
| 892 | ULONGEST cfm; |
| 893 | ULONGEST prN_val; |
| 894 | ULONGEST prN_mask; |
| 895 | |
| 896 | regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr); |
| 897 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); |
| 898 | |
| 899 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) |
| 900 | { |
| 901 | /* Fetch predicate register rename base from current frame |
| 902 | marker for this frame. */ |
| 903 | int rrb_pr = (cfm >> 32) & 0x3f; |
| 904 | |
| 905 | /* Adjust the register number to account for register rotation. */ |
| 906 | regnum = VP16_REGNUM |
| 907 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; |
| 908 | } |
| 909 | prN_val = extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)); |
| 910 | prN_mask = (1LL << (regnum - VP0_REGNUM)); |
| 911 | if (prN_val == 0) |
| 912 | pr &= ~prN_mask; |
| 913 | else if (prN_val == 1) |
| 914 | pr |= prN_mask; |
| 915 | regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr); |
| 916 | } |
| 917 | } |
| 918 | |
| 919 | /* The ia64 needs to convert between various ieee floating-point formats |
| 920 | and the special ia64 floating point register format. */ |
| 921 | |
| 922 | static int |
| 923 | ia64_convert_register_p (int regno, struct type *type) |
| 924 | { |
| 925 | return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM); |
| 926 | } |
| 927 | |
| 928 | static void |
| 929 | ia64_register_to_value (struct frame_info *frame, int regnum, |
| 930 | struct type *valtype, void *out) |
| 931 | { |
| 932 | char in[MAX_REGISTER_SIZE]; |
| 933 | frame_register_read (frame, regnum, in); |
| 934 | convert_typed_floating (in, builtin_type_ia64_ext, out, valtype); |
| 935 | } |
| 936 | |
| 937 | static void |
| 938 | ia64_value_to_register (struct frame_info *frame, int regnum, |
| 939 | struct type *valtype, const void *in) |
| 940 | { |
| 941 | char out[MAX_REGISTER_SIZE]; |
| 942 | convert_typed_floating (in, valtype, out, builtin_type_ia64_ext); |
| 943 | put_frame_register (frame, regnum, out); |
| 944 | } |
| 945 | |
| 946 | |
| 947 | /* Limit the number of skipped non-prologue instructions since examining |
| 948 | of the prologue is expensive. */ |
| 949 | static int max_skip_non_prologue_insns = 40; |
| 950 | |
| 951 | /* Given PC representing the starting address of a function, and |
| 952 | LIM_PC which is the (sloppy) limit to which to scan when looking |
| 953 | for a prologue, attempt to further refine this limit by using |
| 954 | the line data in the symbol table. If successful, a better guess |
| 955 | on where the prologue ends is returned, otherwise the previous |
| 956 | value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag |
| 957 | which will be set to indicate whether the returned limit may be |
| 958 | used with no further scanning in the event that the function is |
| 959 | frameless. */ |
| 960 | |
| 961 | static CORE_ADDR |
| 962 | refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit) |
| 963 | { |
| 964 | struct symtab_and_line prologue_sal; |
| 965 | CORE_ADDR start_pc = pc; |
| 966 | |
| 967 | /* Start off not trusting the limit. */ |
| 968 | *trust_limit = 0; |
| 969 | |
| 970 | prologue_sal = find_pc_line (pc, 0); |
| 971 | if (prologue_sal.line != 0) |
| 972 | { |
| 973 | int i; |
| 974 | CORE_ADDR addr = prologue_sal.end; |
| 975 | |
| 976 | /* Handle the case in which compiler's optimizer/scheduler |
| 977 | has moved instructions into the prologue. We scan ahead |
| 978 | in the function looking for address ranges whose corresponding |
| 979 | line number is less than or equal to the first one that we |
| 980 | found for the function. (It can be less than when the |
| 981 | scheduler puts a body instruction before the first prologue |
| 982 | instruction.) */ |
| 983 | for (i = 2 * max_skip_non_prologue_insns; |
| 984 | i > 0 && (lim_pc == 0 || addr < lim_pc); |
| 985 | i--) |
| 986 | { |
| 987 | struct symtab_and_line sal; |
| 988 | |
| 989 | sal = find_pc_line (addr, 0); |
| 990 | if (sal.line == 0) |
| 991 | break; |
| 992 | if (sal.line <= prologue_sal.line |
| 993 | && sal.symtab == prologue_sal.symtab) |
| 994 | { |
| 995 | prologue_sal = sal; |
| 996 | } |
| 997 | addr = sal.end; |
| 998 | } |
| 999 | |
| 1000 | if (lim_pc == 0 || prologue_sal.end < lim_pc) |
| 1001 | { |
| 1002 | lim_pc = prologue_sal.end; |
| 1003 | if (start_pc == get_pc_function_start (lim_pc)) |
| 1004 | *trust_limit = 1; |
| 1005 | } |
| 1006 | } |
| 1007 | return lim_pc; |
| 1008 | } |
| 1009 | |
| 1010 | #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \ |
| 1011 | || (8 <= (_regnum_) && (_regnum_) <= 11) \ |
| 1012 | || (14 <= (_regnum_) && (_regnum_) <= 31)) |
| 1013 | #define imm9(_instr_) \ |
| 1014 | ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \ |
| 1015 | | (((_instr_) & 0x00008000000LL) >> 20) \ |
| 1016 | | (((_instr_) & 0x00000001fc0LL) >> 6)) |
| 1017 | |
| 1018 | /* Allocate and initialize a frame cache. */ |
| 1019 | |
| 1020 | static struct ia64_frame_cache * |
| 1021 | ia64_alloc_frame_cache (void) |
| 1022 | { |
| 1023 | struct ia64_frame_cache *cache; |
| 1024 | int i; |
| 1025 | |
| 1026 | cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache); |
| 1027 | |
| 1028 | /* Base address. */ |
| 1029 | cache->base = 0; |
| 1030 | cache->pc = 0; |
| 1031 | cache->cfm = 0; |
| 1032 | cache->sof = 0; |
| 1033 | cache->sol = 0; |
| 1034 | cache->sor = 0; |
| 1035 | cache->bsp = 0; |
| 1036 | cache->fp_reg = 0; |
| 1037 | cache->frameless = 1; |
| 1038 | |
| 1039 | for (i = 0; i < NUM_IA64_RAW_REGS; i++) |
| 1040 | cache->saved_regs[i] = 0; |
| 1041 | |
| 1042 | return cache; |
| 1043 | } |
| 1044 | |
| 1045 | static CORE_ADDR |
| 1046 | examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *next_frame, struct ia64_frame_cache *cache) |
| 1047 | { |
| 1048 | CORE_ADDR next_pc; |
| 1049 | CORE_ADDR last_prologue_pc = pc; |
| 1050 | instruction_type it; |
| 1051 | long long instr; |
| 1052 | int cfm_reg = 0; |
| 1053 | int ret_reg = 0; |
| 1054 | int fp_reg = 0; |
| 1055 | int unat_save_reg = 0; |
| 1056 | int pr_save_reg = 0; |
| 1057 | int mem_stack_frame_size = 0; |
| 1058 | int spill_reg = 0; |
| 1059 | CORE_ADDR spill_addr = 0; |
| 1060 | char instores[8]; |
| 1061 | char infpstores[8]; |
| 1062 | char reg_contents[256]; |
| 1063 | int trust_limit; |
| 1064 | int frameless = 1; |
| 1065 | int i; |
| 1066 | CORE_ADDR addr; |
| 1067 | char buf[8]; |
| 1068 | CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr; |
| 1069 | |
| 1070 | memset (instores, 0, sizeof instores); |
| 1071 | memset (infpstores, 0, sizeof infpstores); |
| 1072 | memset (reg_contents, 0, sizeof reg_contents); |
| 1073 | |
| 1074 | if (cache->after_prologue != 0 |
| 1075 | && cache->after_prologue <= lim_pc) |
| 1076 | return cache->after_prologue; |
| 1077 | |
| 1078 | lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit); |
| 1079 | next_pc = fetch_instruction (pc, &it, &instr); |
| 1080 | |
| 1081 | /* We want to check if we have a recognizable function start before we |
| 1082 | look ahead for a prologue. */ |
| 1083 | if (pc < lim_pc && next_pc |
| 1084 | && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL)) |
| 1085 | { |
| 1086 | /* alloc - start of a regular function. */ |
| 1087 | int sor = (int) ((instr & 0x00078000000LL) >> 27); |
| 1088 | int sol = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1089 | int sof = (int) ((instr & 0x000000fe000LL) >> 13); |
| 1090 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
| 1091 | |
| 1092 | /* Verify that the current cfm matches what we think is the |
| 1093 | function start. If we have somehow jumped within a function, |
| 1094 | we do not want to interpret the prologue and calculate the |
| 1095 | addresses of various registers such as the return address. |
| 1096 | We will instead treat the frame as frameless. */ |
| 1097 | if (!next_frame || |
| 1098 | (sof == (cache->cfm & 0x7f) && |
| 1099 | sol == ((cache->cfm >> 7) & 0x7f))) |
| 1100 | frameless = 0; |
| 1101 | |
| 1102 | cfm_reg = rN; |
| 1103 | last_prologue_pc = next_pc; |
| 1104 | pc = next_pc; |
| 1105 | } |
| 1106 | else |
| 1107 | { |
| 1108 | /* Look for a leaf routine. */ |
| 1109 | if (pc < lim_pc && next_pc |
| 1110 | && (it == I || it == M) |
| 1111 | && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) |
| 1112 | { |
| 1113 | /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ |
| 1114 | int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) |
| 1115 | | ((instr & 0x001f8000000LL) >> 20) |
| 1116 | | ((instr & 0x000000fe000LL) >> 13)); |
| 1117 | int rM = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1118 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
| 1119 | int qp = (int) (instr & 0x0000000003fLL); |
| 1120 | if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0) |
| 1121 | { |
| 1122 | /* mov r2, r12 - beginning of leaf routine */ |
| 1123 | fp_reg = rN; |
| 1124 | last_prologue_pc = next_pc; |
| 1125 | } |
| 1126 | } |
| 1127 | |
| 1128 | /* If we don't recognize a regular function or leaf routine, we are |
| 1129 | done. */ |
| 1130 | if (!fp_reg) |
| 1131 | { |
| 1132 | pc = lim_pc; |
| 1133 | if (trust_limit) |
| 1134 | last_prologue_pc = lim_pc; |
| 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | /* Loop, looking for prologue instructions, keeping track of |
| 1139 | where preserved registers were spilled. */ |
| 1140 | while (pc < lim_pc) |
| 1141 | { |
| 1142 | next_pc = fetch_instruction (pc, &it, &instr); |
| 1143 | if (next_pc == 0) |
| 1144 | break; |
| 1145 | |
| 1146 | if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000)) |
| 1147 | || ((instr & 0x3fLL) != 0LL)) |
| 1148 | { |
| 1149 | /* Exit loop upon hitting a non-nop branch instruction |
| 1150 | or a predicated instruction. */ |
| 1151 | if (trust_limit) |
| 1152 | lim_pc = pc; |
| 1153 | break; |
| 1154 | } |
| 1155 | else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL)) |
| 1156 | { |
| 1157 | /* Move from BR */ |
| 1158 | int b2 = (int) ((instr & 0x0000000e000LL) >> 13); |
| 1159 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
| 1160 | int qp = (int) (instr & 0x0000000003f); |
| 1161 | |
| 1162 | if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0) |
| 1163 | { |
| 1164 | ret_reg = rN; |
| 1165 | last_prologue_pc = next_pc; |
| 1166 | } |
| 1167 | } |
| 1168 | else if ((it == I || it == M) |
| 1169 | && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) |
| 1170 | { |
| 1171 | /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ |
| 1172 | int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) |
| 1173 | | ((instr & 0x001f8000000LL) >> 20) |
| 1174 | | ((instr & 0x000000fe000LL) >> 13)); |
| 1175 | int rM = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1176 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
| 1177 | int qp = (int) (instr & 0x0000000003fLL); |
| 1178 | |
| 1179 | if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0) |
| 1180 | { |
| 1181 | /* mov rN, r12 */ |
| 1182 | fp_reg = rN; |
| 1183 | last_prologue_pc = next_pc; |
| 1184 | } |
| 1185 | else if (qp == 0 && rN == 12 && rM == 12) |
| 1186 | { |
| 1187 | /* adds r12, -mem_stack_frame_size, r12 */ |
| 1188 | mem_stack_frame_size -= imm; |
| 1189 | last_prologue_pc = next_pc; |
| 1190 | } |
| 1191 | else if (qp == 0 && rN == 2 |
| 1192 | && ((rM == fp_reg && fp_reg != 0) || rM == 12)) |
| 1193 | { |
| 1194 | char buf[MAX_REGISTER_SIZE]; |
| 1195 | CORE_ADDR saved_sp = 0; |
| 1196 | /* adds r2, spilloffset, rFramePointer |
| 1197 | or |
| 1198 | adds r2, spilloffset, r12 |
| 1199 | |
| 1200 | Get ready for stf.spill or st8.spill instructions. |
| 1201 | The address to start spilling at is loaded into r2. |
| 1202 | FIXME: Why r2? That's what gcc currently uses; it |
| 1203 | could well be different for other compilers. */ |
| 1204 | |
| 1205 | /* Hmm... whether or not this will work will depend on |
| 1206 | where the pc is. If it's still early in the prologue |
| 1207 | this'll be wrong. FIXME */ |
| 1208 | if (next_frame) |
| 1209 | { |
| 1210 | frame_unwind_register (next_frame, sp_regnum, buf); |
| 1211 | saved_sp = extract_unsigned_integer (buf, 8); |
| 1212 | } |
| 1213 | spill_addr = saved_sp |
| 1214 | + (rM == 12 ? 0 : mem_stack_frame_size) |
| 1215 | + imm; |
| 1216 | spill_reg = rN; |
| 1217 | last_prologue_pc = next_pc; |
| 1218 | } |
| 1219 | else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM] && |
| 1220 | rN < 256 && imm == 0) |
| 1221 | { |
| 1222 | /* mov rN, rM where rM is an input register */ |
| 1223 | reg_contents[rN] = rM; |
| 1224 | last_prologue_pc = next_pc; |
| 1225 | } |
| 1226 | else if (frameless && qp == 0 && rN == fp_reg && imm == 0 && |
| 1227 | rM == 2) |
| 1228 | { |
| 1229 | /* mov r12, r2 */ |
| 1230 | last_prologue_pc = next_pc; |
| 1231 | break; |
| 1232 | } |
| 1233 | } |
| 1234 | else if (it == M |
| 1235 | && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL) |
| 1236 | || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) )) |
| 1237 | { |
| 1238 | /* stf.spill [rN] = fM, imm9 |
| 1239 | or |
| 1240 | stf.spill [rN] = fM */ |
| 1241 | |
| 1242 | int imm = imm9(instr); |
| 1243 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1244 | int fM = (int) ((instr & 0x000000fe000LL) >> 13); |
| 1245 | int qp = (int) (instr & 0x0000000003fLL); |
| 1246 | if (qp == 0 && rN == spill_reg && spill_addr != 0 |
| 1247 | && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31))) |
| 1248 | { |
| 1249 | cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr; |
| 1250 | |
| 1251 | if ((instr & 0x1efc0000000) == 0x0eec0000000) |
| 1252 | spill_addr += imm; |
| 1253 | else |
| 1254 | spill_addr = 0; /* last one; must be done */ |
| 1255 | last_prologue_pc = next_pc; |
| 1256 | } |
| 1257 | } |
| 1258 | else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL)) |
| 1259 | || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) ) |
| 1260 | { |
| 1261 | /* mov.m rN = arM |
| 1262 | or |
| 1263 | mov.i rN = arM */ |
| 1264 | |
| 1265 | int arM = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1266 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
| 1267 | int qp = (int) (instr & 0x0000000003fLL); |
| 1268 | if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */) |
| 1269 | { |
| 1270 | /* We have something like "mov.m r3 = ar.unat". Remember the |
| 1271 | r3 (or whatever) and watch for a store of this register... */ |
| 1272 | unat_save_reg = rN; |
| 1273 | last_prologue_pc = next_pc; |
| 1274 | } |
| 1275 | } |
| 1276 | else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL)) |
| 1277 | { |
| 1278 | /* mov rN = pr */ |
| 1279 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
| 1280 | int qp = (int) (instr & 0x0000000003fLL); |
| 1281 | if (qp == 0 && isScratch (rN)) |
| 1282 | { |
| 1283 | pr_save_reg = rN; |
| 1284 | last_prologue_pc = next_pc; |
| 1285 | } |
| 1286 | } |
| 1287 | else if (it == M |
| 1288 | && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL) |
| 1289 | || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL))) |
| 1290 | { |
| 1291 | /* st8 [rN] = rM |
| 1292 | or |
| 1293 | st8 [rN] = rM, imm9 */ |
| 1294 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1295 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); |
| 1296 | int qp = (int) (instr & 0x0000000003fLL); |
| 1297 | int indirect = rM < 256 ? reg_contents[rM] : 0; |
| 1298 | if (qp == 0 && rN == spill_reg && spill_addr != 0 |
| 1299 | && (rM == unat_save_reg || rM == pr_save_reg)) |
| 1300 | { |
| 1301 | /* We've found a spill of either the UNAT register or the PR |
| 1302 | register. (Well, not exactly; what we've actually found is |
| 1303 | a spill of the register that UNAT or PR was moved to). |
| 1304 | Record that fact and move on... */ |
| 1305 | if (rM == unat_save_reg) |
| 1306 | { |
| 1307 | /* Track UNAT register */ |
| 1308 | cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr; |
| 1309 | unat_save_reg = 0; |
| 1310 | } |
| 1311 | else |
| 1312 | { |
| 1313 | /* Track PR register */ |
| 1314 | cache->saved_regs[IA64_PR_REGNUM] = spill_addr; |
| 1315 | pr_save_reg = 0; |
| 1316 | } |
| 1317 | if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL) |
| 1318 | /* st8 [rN] = rM, imm9 */ |
| 1319 | spill_addr += imm9(instr); |
| 1320 | else |
| 1321 | spill_addr = 0; /* must be done spilling */ |
| 1322 | last_prologue_pc = next_pc; |
| 1323 | } |
| 1324 | else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) |
| 1325 | { |
| 1326 | /* Allow up to one store of each input register. */ |
| 1327 | instores[rM-32] = 1; |
| 1328 | last_prologue_pc = next_pc; |
| 1329 | } |
| 1330 | else if (qp == 0 && 32 <= indirect && indirect < 40 && |
| 1331 | !instores[indirect-32]) |
| 1332 | { |
| 1333 | /* Allow an indirect store of an input register. */ |
| 1334 | instores[indirect-32] = 1; |
| 1335 | last_prologue_pc = next_pc; |
| 1336 | } |
| 1337 | } |
| 1338 | else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL)) |
| 1339 | { |
| 1340 | /* One of |
| 1341 | st1 [rN] = rM |
| 1342 | st2 [rN] = rM |
| 1343 | st4 [rN] = rM |
| 1344 | st8 [rN] = rM |
| 1345 | Note that the st8 case is handled in the clause above. |
| 1346 | |
| 1347 | Advance over stores of input registers. One store per input |
| 1348 | register is permitted. */ |
| 1349 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); |
| 1350 | int qp = (int) (instr & 0x0000000003fLL); |
| 1351 | int indirect = rM < 256 ? reg_contents[rM] : 0; |
| 1352 | if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) |
| 1353 | { |
| 1354 | instores[rM-32] = 1; |
| 1355 | last_prologue_pc = next_pc; |
| 1356 | } |
| 1357 | else if (qp == 0 && 32 <= indirect && indirect < 40 && |
| 1358 | !instores[indirect-32]) |
| 1359 | { |
| 1360 | /* Allow an indirect store of an input register. */ |
| 1361 | instores[indirect-32] = 1; |
| 1362 | last_prologue_pc = next_pc; |
| 1363 | } |
| 1364 | } |
| 1365 | else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL)) |
| 1366 | { |
| 1367 | /* Either |
| 1368 | stfs [rN] = fM |
| 1369 | or |
| 1370 | stfd [rN] = fM |
| 1371 | |
| 1372 | Advance over stores of floating point input registers. Again |
| 1373 | one store per register is permitted */ |
| 1374 | int fM = (int) ((instr & 0x000000fe000LL) >> 13); |
| 1375 | int qp = (int) (instr & 0x0000000003fLL); |
| 1376 | if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8]) |
| 1377 | { |
| 1378 | infpstores[fM-8] = 1; |
| 1379 | last_prologue_pc = next_pc; |
| 1380 | } |
| 1381 | } |
| 1382 | else if (it == M |
| 1383 | && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL) |
| 1384 | || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL))) |
| 1385 | { |
| 1386 | /* st8.spill [rN] = rM |
| 1387 | or |
| 1388 | st8.spill [rN] = rM, imm9 */ |
| 1389 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); |
| 1390 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); |
| 1391 | int qp = (int) (instr & 0x0000000003fLL); |
| 1392 | if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7) |
| 1393 | { |
| 1394 | /* We've found a spill of one of the preserved general purpose |
| 1395 | regs. Record the spill address and advance the spill |
| 1396 | register if appropriate. */ |
| 1397 | cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr; |
| 1398 | if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL) |
| 1399 | /* st8.spill [rN] = rM, imm9 */ |
| 1400 | spill_addr += imm9(instr); |
| 1401 | else |
| 1402 | spill_addr = 0; /* Done spilling */ |
| 1403 | last_prologue_pc = next_pc; |
| 1404 | } |
| 1405 | } |
| 1406 | |
| 1407 | pc = next_pc; |
| 1408 | } |
| 1409 | |
| 1410 | /* If not frameless and we aren't called by skip_prologue, then we need to calculate |
| 1411 | registers for the previous frame which will be needed later. */ |
| 1412 | |
| 1413 | if (!frameless && next_frame) |
| 1414 | { |
| 1415 | /* Extract the size of the rotating portion of the stack |
| 1416 | frame and the register rename base from the current |
| 1417 | frame marker. */ |
| 1418 | cfm = cache->cfm; |
| 1419 | sor = cache->sor; |
| 1420 | sof = cache->sof; |
| 1421 | sol = cache->sol; |
| 1422 | rrb_gr = (cfm >> 18) & 0x7f; |
| 1423 | |
| 1424 | /* Find the bof (beginning of frame). */ |
| 1425 | bof = rse_address_add (cache->bsp, -sof); |
| 1426 | |
| 1427 | for (i = 0, addr = bof; |
| 1428 | i < sof; |
| 1429 | i++, addr += 8) |
| 1430 | { |
| 1431 | if (IS_NaT_COLLECTION_ADDR (addr)) |
| 1432 | { |
| 1433 | addr += 8; |
| 1434 | } |
| 1435 | if (i+32 == cfm_reg) |
| 1436 | cache->saved_regs[IA64_CFM_REGNUM] = addr; |
| 1437 | if (i+32 == ret_reg) |
| 1438 | cache->saved_regs[IA64_VRAP_REGNUM] = addr; |
| 1439 | if (i+32 == fp_reg) |
| 1440 | cache->saved_regs[IA64_VFP_REGNUM] = addr; |
| 1441 | } |
| 1442 | |
| 1443 | /* For the previous argument registers we require the previous bof. |
| 1444 | If we can't find the previous cfm, then we can do nothing. */ |
| 1445 | if (cache->saved_regs[IA64_CFM_REGNUM] != 0) |
| 1446 | { |
| 1447 | cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8); |
| 1448 | sor = ((cfm >> 14) & 0xf) * 8; |
| 1449 | sof = (cfm & 0x7f); |
| 1450 | sol = (cfm >> 7) & 0x7f; |
| 1451 | rrb_gr = (cfm >> 18) & 0x7f; |
| 1452 | |
| 1453 | /* The previous bof only requires subtraction of the sol (size of locals) |
| 1454 | due to the overlap between output and input of subsequent frames. */ |
| 1455 | bof = rse_address_add (bof, -sol); |
| 1456 | |
| 1457 | for (i = 0, addr = bof; |
| 1458 | i < sof; |
| 1459 | i++, addr += 8) |
| 1460 | { |
| 1461 | if (IS_NaT_COLLECTION_ADDR (addr)) |
| 1462 | { |
| 1463 | addr += 8; |
| 1464 | } |
| 1465 | if (i < sor) |
| 1466 | cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)] |
| 1467 | = addr; |
| 1468 | else |
| 1469 | cache->saved_regs[IA64_GR32_REGNUM + i] = addr; |
| 1470 | } |
| 1471 | |
| 1472 | } |
| 1473 | } |
| 1474 | |
| 1475 | /* Try and trust the lim_pc value whenever possible. */ |
| 1476 | if (trust_limit && lim_pc >= last_prologue_pc) |
| 1477 | last_prologue_pc = lim_pc; |
| 1478 | |
| 1479 | cache->frameless = frameless; |
| 1480 | cache->after_prologue = last_prologue_pc; |
| 1481 | cache->mem_stack_frame_size = mem_stack_frame_size; |
| 1482 | cache->fp_reg = fp_reg; |
| 1483 | |
| 1484 | return last_prologue_pc; |
| 1485 | } |
| 1486 | |
| 1487 | CORE_ADDR |
| 1488 | ia64_skip_prologue (CORE_ADDR pc) |
| 1489 | { |
| 1490 | struct ia64_frame_cache cache; |
| 1491 | cache.base = 0; |
| 1492 | cache.after_prologue = 0; |
| 1493 | cache.cfm = 0; |
| 1494 | cache.bsp = 0; |
| 1495 | |
| 1496 | /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */ |
| 1497 | return examine_prologue (pc, pc+1024, 0, &cache); |
| 1498 | } |
| 1499 | |
| 1500 | |
| 1501 | /* Normal frames. */ |
| 1502 | |
| 1503 | static struct ia64_frame_cache * |
| 1504 | ia64_frame_cache (struct frame_info *next_frame, void **this_cache) |
| 1505 | { |
| 1506 | struct ia64_frame_cache *cache; |
| 1507 | char buf[8]; |
| 1508 | CORE_ADDR cfm, sof, sol, bsp, psr; |
| 1509 | int i; |
| 1510 | |
| 1511 | if (*this_cache) |
| 1512 | return *this_cache; |
| 1513 | |
| 1514 | cache = ia64_alloc_frame_cache (); |
| 1515 | *this_cache = cache; |
| 1516 | |
| 1517 | frame_unwind_register (next_frame, sp_regnum, buf); |
| 1518 | cache->saved_sp = extract_unsigned_integer (buf, 8); |
| 1519 | |
| 1520 | /* We always want the bsp to point to the end of frame. |
| 1521 | This way, we can always get the beginning of frame (bof) |
| 1522 | by subtracting frame size. */ |
| 1523 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); |
| 1524 | cache->bsp = extract_unsigned_integer (buf, 8); |
| 1525 | |
| 1526 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); |
| 1527 | psr = extract_unsigned_integer (buf, 8); |
| 1528 | |
| 1529 | frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf); |
| 1530 | cfm = extract_unsigned_integer (buf, 8); |
| 1531 | |
| 1532 | cache->sof = (cfm & 0x7f); |
| 1533 | cache->sol = (cfm >> 7) & 0x7f; |
| 1534 | cache->sor = ((cfm >> 14) & 0xf) * 8; |
| 1535 | |
| 1536 | cache->cfm = cfm; |
| 1537 | |
| 1538 | cache->pc = frame_func_unwind (next_frame); |
| 1539 | |
| 1540 | if (cache->pc != 0) |
| 1541 | examine_prologue (cache->pc, frame_pc_unwind (next_frame), next_frame, cache); |
| 1542 | |
| 1543 | cache->base = cache->saved_sp + cache->mem_stack_frame_size; |
| 1544 | |
| 1545 | return cache; |
| 1546 | } |
| 1547 | |
| 1548 | static void |
| 1549 | ia64_frame_this_id (struct frame_info *next_frame, void **this_cache, |
| 1550 | struct frame_id *this_id) |
| 1551 | { |
| 1552 | struct ia64_frame_cache *cache = |
| 1553 | ia64_frame_cache (next_frame, this_cache); |
| 1554 | |
| 1555 | /* This marks the outermost frame. */ |
| 1556 | if (cache->base == 0) |
| 1557 | return; |
| 1558 | |
| 1559 | (*this_id) = frame_id_build (cache->base, cache->pc); |
| 1560 | } |
| 1561 | |
| 1562 | static void |
| 1563 | ia64_frame_prev_register (struct frame_info *next_frame, void **this_cache, |
| 1564 | int regnum, int *optimizedp, |
| 1565 | enum lval_type *lvalp, CORE_ADDR *addrp, |
| 1566 | int *realnump, void *valuep) |
| 1567 | { |
| 1568 | struct ia64_frame_cache *cache = |
| 1569 | ia64_frame_cache (next_frame, this_cache); |
| 1570 | char dummy_valp[MAX_REGISTER_SIZE]; |
| 1571 | char buf[8]; |
| 1572 | |
| 1573 | gdb_assert (regnum >= 0); |
| 1574 | |
| 1575 | if (!target_has_registers) |
| 1576 | error ("No registers."); |
| 1577 | |
| 1578 | *optimizedp = 0; |
| 1579 | *addrp = 0; |
| 1580 | *lvalp = not_lval; |
| 1581 | *realnump = -1; |
| 1582 | |
| 1583 | /* Rather than check each time if valuep is non-null, supply a dummy buffer |
| 1584 | when valuep is not supplied. */ |
| 1585 | if (!valuep) |
| 1586 | valuep = dummy_valp; |
| 1587 | |
| 1588 | memset (valuep, 0, REGISTER_RAW_SIZE (regnum)); |
| 1589 | |
| 1590 | if (regnum == SP_REGNUM) |
| 1591 | { |
| 1592 | /* Handle SP values for all frames but the topmost. */ |
| 1593 | store_unsigned_integer (valuep, REGISTER_RAW_SIZE (regnum), |
| 1594 | cache->base); |
| 1595 | } |
| 1596 | else if (regnum == IA64_BSP_REGNUM) |
| 1597 | { |
| 1598 | char cfm_valuep[MAX_REGISTER_SIZE]; |
| 1599 | int cfm_optim; |
| 1600 | int cfm_realnum; |
| 1601 | enum lval_type cfm_lval; |
| 1602 | CORE_ADDR cfm_addr; |
| 1603 | CORE_ADDR bsp, prev_cfm, prev_bsp; |
| 1604 | |
| 1605 | /* We want to calculate the previous bsp as the end of the previous register stack frame. |
| 1606 | This corresponds to what the hardware bsp register will be if we pop the frame |
| 1607 | back which is why we might have been called. We know the beginning of the current |
| 1608 | frame is cache->bsp - cache->sof. This value in the previous frame points to |
| 1609 | the start of the output registers. We can calculate the end of that frame by adding |
| 1610 | the size of output (sof (size of frame) - sol (size of locals)). */ |
| 1611 | ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM, |
| 1612 | &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep); |
| 1613 | prev_cfm = extract_unsigned_integer (cfm_valuep, 8); |
| 1614 | |
| 1615 | bsp = rse_address_add (cache->bsp, -(cache->sof)); |
| 1616 | prev_bsp = rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f)); |
| 1617 | |
| 1618 | store_unsigned_integer (valuep, REGISTER_RAW_SIZE (regnum), |
| 1619 | prev_bsp); |
| 1620 | } |
| 1621 | else if (regnum == IA64_CFM_REGNUM) |
| 1622 | { |
| 1623 | CORE_ADDR addr = 0; |
| 1624 | |
| 1625 | if (cache->frameless) |
| 1626 | { |
| 1627 | CORE_ADDR cfm = 0; |
| 1628 | frame_unwind_register (next_frame, IA64_PFS_REGNUM, valuep); |
| 1629 | } |
| 1630 | else |
| 1631 | { |
| 1632 | addr = cache->saved_regs[IA64_CFM_REGNUM]; |
| 1633 | if (addr != 0) |
| 1634 | read_memory (addr, valuep, REGISTER_RAW_SIZE (regnum)); |
| 1635 | } |
| 1636 | } |
| 1637 | else if (regnum == IA64_VFP_REGNUM) |
| 1638 | { |
| 1639 | /* If the function in question uses an automatic register (r32-r127) |
| 1640 | for the frame pointer, it'll be found by ia64_find_saved_register() |
| 1641 | above. If the function lacks one of these frame pointers, we can |
| 1642 | still provide a value since we know the size of the frame. */ |
| 1643 | CORE_ADDR vfp = cache->base; |
| 1644 | store_unsigned_integer (valuep, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp); |
| 1645 | } |
| 1646 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) |
| 1647 | { |
| 1648 | char pr_valuep[MAX_REGISTER_SIZE]; |
| 1649 | int pr_optim; |
| 1650 | int pr_realnum; |
| 1651 | enum lval_type pr_lval; |
| 1652 | CORE_ADDR pr_addr; |
| 1653 | ULONGEST prN_val; |
| 1654 | ia64_frame_prev_register (next_frame, this_cache, IA64_PR_REGNUM, |
| 1655 | &pr_optim, &pr_lval, &pr_addr, &pr_realnum, pr_valuep); |
| 1656 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) |
| 1657 | { |
| 1658 | /* Fetch predicate register rename base from current frame |
| 1659 | marker for this frame. */ |
| 1660 | int rrb_pr = (cache->cfm >> 32) & 0x3f; |
| 1661 | |
| 1662 | /* Adjust the register number to account for register rotation. */ |
| 1663 | regnum = VP16_REGNUM |
| 1664 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; |
| 1665 | } |
| 1666 | prN_val = extract_bit_field ((unsigned char *) pr_valuep, |
| 1667 | regnum - VP0_REGNUM, 1); |
| 1668 | store_unsigned_integer (valuep, REGISTER_RAW_SIZE (regnum), prN_val); |
| 1669 | } |
| 1670 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) |
| 1671 | { |
| 1672 | char unat_valuep[MAX_REGISTER_SIZE]; |
| 1673 | int unat_optim; |
| 1674 | int unat_realnum; |
| 1675 | enum lval_type unat_lval; |
| 1676 | CORE_ADDR unat_addr; |
| 1677 | ULONGEST unatN_val; |
| 1678 | ia64_frame_prev_register (next_frame, this_cache, IA64_UNAT_REGNUM, |
| 1679 | &unat_optim, &unat_lval, &unat_addr, &unat_realnum, unat_valuep); |
| 1680 | unatN_val = extract_bit_field ((unsigned char *) unat_valuep, |
| 1681 | regnum - IA64_NAT0_REGNUM, 1); |
| 1682 | store_unsigned_integer (valuep, REGISTER_RAW_SIZE (regnum), |
| 1683 | unatN_val); |
| 1684 | } |
| 1685 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) |
| 1686 | { |
| 1687 | int natval = 0; |
| 1688 | /* Find address of general register corresponding to nat bit we're |
| 1689 | interested in. */ |
| 1690 | CORE_ADDR gr_addr; |
| 1691 | |
| 1692 | gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM |
| 1693 | + IA64_GR0_REGNUM]; |
| 1694 | if (gr_addr != 0) |
| 1695 | { |
| 1696 | /* Compute address of nat collection bits. */ |
| 1697 | CORE_ADDR nat_addr = gr_addr | 0x1f8; |
| 1698 | CORE_ADDR bsp; |
| 1699 | CORE_ADDR nat_collection; |
| 1700 | int nat_bit; |
| 1701 | /* If our nat collection address is bigger than bsp, we have to get |
| 1702 | the nat collection from rnat. Otherwise, we fetch the nat |
| 1703 | collection from the computed address. */ |
| 1704 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); |
| 1705 | bsp = extract_unsigned_integer (buf, 8); |
| 1706 | if (nat_addr >= bsp) |
| 1707 | { |
| 1708 | frame_unwind_register (next_frame, IA64_RNAT_REGNUM, buf); |
| 1709 | nat_collection = extract_unsigned_integer (buf, 8); |
| 1710 | } |
| 1711 | else |
| 1712 | nat_collection = read_memory_integer (nat_addr, 8); |
| 1713 | nat_bit = (gr_addr >> 3) & 0x3f; |
| 1714 | natval = (nat_collection >> nat_bit) & 1; |
| 1715 | } |
| 1716 | |
| 1717 | store_unsigned_integer (valuep, REGISTER_RAW_SIZE (regnum), natval); |
| 1718 | } |
| 1719 | else if (regnum == IA64_IP_REGNUM) |
| 1720 | { |
| 1721 | CORE_ADDR pc = 0; |
| 1722 | |
| 1723 | if (cache->frameless) |
| 1724 | { |
| 1725 | frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf); |
| 1726 | pc = extract_unsigned_integer (buf, 8); |
| 1727 | } |
| 1728 | else |
| 1729 | { |
| 1730 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; |
| 1731 | if (addr != 0) |
| 1732 | { |
| 1733 | read_memory (addr, buf, REGISTER_RAW_SIZE (IA64_IP_REGNUM)); |
| 1734 | pc = extract_unsigned_integer (buf, 8); |
| 1735 | } |
| 1736 | } |
| 1737 | pc &= ~0xf; |
| 1738 | store_unsigned_integer (valuep, 8, pc); |
| 1739 | } |
| 1740 | else if (regnum == IA64_PSR_REGNUM) |
| 1741 | { |
| 1742 | ULONGEST slot_num = 0; |
| 1743 | CORE_ADDR pc= 0; |
| 1744 | CORE_ADDR psr = 0; |
| 1745 | |
| 1746 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); |
| 1747 | psr = extract_unsigned_integer (buf, 8); |
| 1748 | |
| 1749 | if (cache->frameless) |
| 1750 | { |
| 1751 | CORE_ADDR pc; |
| 1752 | frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf); |
| 1753 | pc = extract_unsigned_integer (buf, 8); |
| 1754 | } |
| 1755 | else |
| 1756 | { |
| 1757 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; |
| 1758 | if (addr != 0) |
| 1759 | { |
| 1760 | read_memory (addr, buf, REGISTER_RAW_SIZE (IA64_IP_REGNUM)); |
| 1761 | pc = extract_unsigned_integer (buf, 8); |
| 1762 | } |
| 1763 | } |
| 1764 | psr &= ~(3LL << 41); |
| 1765 | slot_num = pc & 0x3LL; |
| 1766 | psr |= (CORE_ADDR)slot_num << 41; |
| 1767 | store_unsigned_integer (valuep, 8, psr); |
| 1768 | } |
| 1769 | else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) || |
| 1770 | (regnum >= V32_REGNUM && regnum <= V127_REGNUM)) |
| 1771 | { |
| 1772 | CORE_ADDR addr = 0; |
| 1773 | if (regnum >= V32_REGNUM) |
| 1774 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); |
| 1775 | addr = cache->saved_regs[regnum]; |
| 1776 | if (addr != 0) |
| 1777 | { |
| 1778 | *lvalp = lval_memory; |
| 1779 | *addrp = addr; |
| 1780 | read_memory (addr, valuep, REGISTER_RAW_SIZE (regnum)); |
| 1781 | } |
| 1782 | else if (cache->frameless) |
| 1783 | { |
| 1784 | char r_valuep[MAX_REGISTER_SIZE]; |
| 1785 | int r_optim; |
| 1786 | int r_realnum; |
| 1787 | enum lval_type r_lval; |
| 1788 | CORE_ADDR r_addr; |
| 1789 | CORE_ADDR prev_cfm, prev_bsp, prev_bof; |
| 1790 | CORE_ADDR addr = 0; |
| 1791 | if (regnum >= V32_REGNUM) |
| 1792 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); |
| 1793 | ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM, |
| 1794 | &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep); |
| 1795 | prev_cfm = extract_unsigned_integer (r_valuep, 8); |
| 1796 | ia64_frame_prev_register (next_frame, this_cache, IA64_BSP_REGNUM, |
| 1797 | &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep); |
| 1798 | prev_bsp = extract_unsigned_integer (r_valuep, 8); |
| 1799 | prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f)); |
| 1800 | |
| 1801 | addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM)); |
| 1802 | *lvalp = lval_memory; |
| 1803 | *addrp = addr; |
| 1804 | read_memory (addr, valuep, REGISTER_RAW_SIZE (regnum)); |
| 1805 | } |
| 1806 | } |
| 1807 | else |
| 1808 | { |
| 1809 | CORE_ADDR addr = 0; |
| 1810 | if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM) |
| 1811 | { |
| 1812 | /* Fetch floating point register rename base from current |
| 1813 | frame marker for this frame. */ |
| 1814 | int rrb_fr = (cache->cfm >> 25) & 0x7f; |
| 1815 | |
| 1816 | /* Adjust the floating point register number to account for |
| 1817 | register rotation. */ |
| 1818 | regnum = IA64_FR32_REGNUM |
| 1819 | + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96; |
| 1820 | } |
| 1821 | |
| 1822 | /* If we have stored a memory address, access the register. */ |
| 1823 | addr = cache->saved_regs[regnum]; |
| 1824 | if (addr != 0) |
| 1825 | { |
| 1826 | *lvalp = lval_memory; |
| 1827 | *addrp = addr; |
| 1828 | read_memory (addr, valuep, REGISTER_RAW_SIZE (regnum)); |
| 1829 | } |
| 1830 | /* Otherwise, punt and get the current value of the register. */ |
| 1831 | else |
| 1832 | frame_unwind_register (next_frame, regnum, valuep); |
| 1833 | } |
| 1834 | } |
| 1835 | |
| 1836 | static const struct frame_unwind ia64_frame_unwind = |
| 1837 | { |
| 1838 | NORMAL_FRAME, |
| 1839 | &ia64_frame_this_id, |
| 1840 | &ia64_frame_prev_register |
| 1841 | }; |
| 1842 | |
| 1843 | static const struct frame_unwind * |
| 1844 | ia64_frame_sniffer (struct frame_info *next_frame) |
| 1845 | { |
| 1846 | return &ia64_frame_unwind; |
| 1847 | } |
| 1848 | |
| 1849 | /* Signal trampolines. */ |
| 1850 | |
| 1851 | static void |
| 1852 | ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache *cache) |
| 1853 | { |
| 1854 | if (SIGCONTEXT_REGISTER_ADDRESS) |
| 1855 | { |
| 1856 | int regno; |
| 1857 | |
| 1858 | cache->saved_regs[IA64_VRAP_REGNUM] = |
| 1859 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_IP_REGNUM); |
| 1860 | cache->saved_regs[IA64_CFM_REGNUM] = |
| 1861 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_CFM_REGNUM); |
| 1862 | cache->saved_regs[IA64_PSR_REGNUM] = |
| 1863 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_PSR_REGNUM); |
| 1864 | #if 0 |
| 1865 | cache->saved_regs[IA64_BSP_REGNUM] = |
| 1866 | SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM); |
| 1867 | #endif |
| 1868 | cache->saved_regs[IA64_RNAT_REGNUM] = |
| 1869 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_RNAT_REGNUM); |
| 1870 | cache->saved_regs[IA64_CCV_REGNUM] = |
| 1871 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_CCV_REGNUM); |
| 1872 | cache->saved_regs[IA64_UNAT_REGNUM] = |
| 1873 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_UNAT_REGNUM); |
| 1874 | cache->saved_regs[IA64_FPSR_REGNUM] = |
| 1875 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_FPSR_REGNUM); |
| 1876 | cache->saved_regs[IA64_PFS_REGNUM] = |
| 1877 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_PFS_REGNUM); |
| 1878 | cache->saved_regs[IA64_LC_REGNUM] = |
| 1879 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_LC_REGNUM); |
| 1880 | for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++) |
| 1881 | if (regno != sp_regnum) |
| 1882 | cache->saved_regs[regno] = |
| 1883 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno); |
| 1884 | for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++) |
| 1885 | cache->saved_regs[regno] = |
| 1886 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno); |
| 1887 | for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++) |
| 1888 | cache->saved_regs[regno] = |
| 1889 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno); |
| 1890 | } |
| 1891 | } |
| 1892 | |
| 1893 | static struct ia64_frame_cache * |
| 1894 | ia64_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) |
| 1895 | { |
| 1896 | struct ia64_frame_cache *cache; |
| 1897 | CORE_ADDR addr; |
| 1898 | char buf[8]; |
| 1899 | int i; |
| 1900 | |
| 1901 | if (*this_cache) |
| 1902 | return *this_cache; |
| 1903 | |
| 1904 | cache = ia64_alloc_frame_cache (); |
| 1905 | |
| 1906 | frame_unwind_register (next_frame, sp_regnum, buf); |
| 1907 | cache->base = extract_unsigned_integer (buf, 8) + cache->mem_stack_frame_size; |
| 1908 | |
| 1909 | ia64_sigtramp_frame_init_saved_regs (cache); |
| 1910 | |
| 1911 | *this_cache = cache; |
| 1912 | return cache; |
| 1913 | } |
| 1914 | |
| 1915 | static void |
| 1916 | ia64_sigtramp_frame_this_id (struct frame_info *next_frame, |
| 1917 | void **this_cache, struct frame_id *this_id) |
| 1918 | { |
| 1919 | struct ia64_frame_cache *cache = |
| 1920 | ia64_sigtramp_frame_cache (next_frame, this_cache); |
| 1921 | |
| 1922 | (*this_id) = frame_id_build (cache->base, frame_pc_unwind (next_frame)); |
| 1923 | } |
| 1924 | |
| 1925 | static void |
| 1926 | ia64_sigtramp_frame_prev_register (struct frame_info *next_frame, |
| 1927 | void **this_cache, |
| 1928 | int regnum, int *optimizedp, |
| 1929 | enum lval_type *lvalp, CORE_ADDR *addrp, |
| 1930 | int *realnump, void *valuep) |
| 1931 | { |
| 1932 | /* Make sure we've initialized the cache. */ |
| 1933 | ia64_sigtramp_frame_cache (next_frame, this_cache); |
| 1934 | |
| 1935 | ia64_frame_prev_register (next_frame, this_cache, regnum, |
| 1936 | optimizedp, lvalp, addrp, realnump, valuep); |
| 1937 | } |
| 1938 | |
| 1939 | static const struct frame_unwind ia64_sigtramp_frame_unwind = |
| 1940 | { |
| 1941 | SIGTRAMP_FRAME, |
| 1942 | ia64_sigtramp_frame_this_id, |
| 1943 | ia64_sigtramp_frame_prev_register |
| 1944 | }; |
| 1945 | |
| 1946 | static const struct frame_unwind * |
| 1947 | ia64_sigtramp_frame_sniffer (struct frame_info *next_frame) |
| 1948 | { |
| 1949 | char *name; |
| 1950 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
| 1951 | |
| 1952 | find_pc_partial_function (pc, &name, NULL, NULL); |
| 1953 | if (PC_IN_SIGTRAMP (pc, name)) |
| 1954 | return &ia64_sigtramp_frame_unwind; |
| 1955 | |
| 1956 | return NULL; |
| 1957 | } |
| 1958 | \f |
| 1959 | |
| 1960 | static CORE_ADDR |
| 1961 | ia64_frame_base_address (struct frame_info *next_frame, void **this_cache) |
| 1962 | { |
| 1963 | struct ia64_frame_cache *cache = |
| 1964 | ia64_frame_cache (next_frame, this_cache); |
| 1965 | |
| 1966 | return cache->base; |
| 1967 | } |
| 1968 | |
| 1969 | static const struct frame_base ia64_frame_base = |
| 1970 | { |
| 1971 | &ia64_frame_unwind, |
| 1972 | ia64_frame_base_address, |
| 1973 | ia64_frame_base_address, |
| 1974 | ia64_frame_base_address |
| 1975 | }; |
| 1976 | |
| 1977 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of |
| 1978 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc |
| 1979 | and TYPE is the type (which is known to be struct, union or array). */ |
| 1980 | int |
| 1981 | ia64_use_struct_convention (int gcc_p, struct type *type) |
| 1982 | { |
| 1983 | struct type *float_elt_type; |
| 1984 | |
| 1985 | /* HFAs are structures (or arrays) consisting entirely of floating |
| 1986 | point values of the same length. Up to 8 of these are returned |
| 1987 | in registers. Don't use the struct convention when this is the |
| 1988 | case. */ |
| 1989 | float_elt_type = is_float_or_hfa_type (type); |
| 1990 | if (float_elt_type != NULL |
| 1991 | && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8) |
| 1992 | return 0; |
| 1993 | |
| 1994 | /* Other structs of length 32 or less are returned in r8-r11. |
| 1995 | Don't use the struct convention for those either. */ |
| 1996 | return TYPE_LENGTH (type) > 32; |
| 1997 | } |
| 1998 | |
| 1999 | void |
| 2000 | ia64_extract_return_value (struct type *type, struct regcache *regcache, void *valbuf) |
| 2001 | { |
| 2002 | struct type *float_elt_type; |
| 2003 | |
| 2004 | float_elt_type = is_float_or_hfa_type (type); |
| 2005 | if (float_elt_type != NULL) |
| 2006 | { |
| 2007 | char from[MAX_REGISTER_SIZE]; |
| 2008 | int offset = 0; |
| 2009 | int regnum = IA64_FR8_REGNUM; |
| 2010 | int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type); |
| 2011 | |
| 2012 | while (n-- > 0) |
| 2013 | { |
| 2014 | regcache_cooked_read (regcache, regnum, from); |
| 2015 | convert_typed_floating (from, builtin_type_ia64_ext, |
| 2016 | (char *)valbuf + offset, float_elt_type); |
| 2017 | offset += TYPE_LENGTH (float_elt_type); |
| 2018 | regnum++; |
| 2019 | } |
| 2020 | } |
| 2021 | else |
| 2022 | { |
| 2023 | ULONGEST val; |
| 2024 | int offset = 0; |
| 2025 | int regnum = IA64_GR8_REGNUM; |
| 2026 | int reglen = TYPE_LENGTH (ia64_register_type (NULL, IA64_GR8_REGNUM)); |
| 2027 | int n = TYPE_LENGTH (type) / reglen; |
| 2028 | int m = TYPE_LENGTH (type) % reglen; |
| 2029 | |
| 2030 | while (n-- > 0) |
| 2031 | { |
| 2032 | ULONGEST val; |
| 2033 | regcache_cooked_read_unsigned (regcache, regnum, &val); |
| 2034 | memcpy ((char *)valbuf + offset, &val, reglen); |
| 2035 | offset += reglen; |
| 2036 | regnum++; |
| 2037 | } |
| 2038 | |
| 2039 | if (m) |
| 2040 | { |
| 2041 | regcache_cooked_read_unsigned (regcache, regnum, &val); |
| 2042 | memcpy ((char *)valbuf + offset, &val, m); |
| 2043 | } |
| 2044 | } |
| 2045 | } |
| 2046 | |
| 2047 | CORE_ADDR |
| 2048 | ia64_extract_struct_value_address (struct regcache *regcache) |
| 2049 | { |
| 2050 | error ("ia64_extract_struct_value_address called and cannot get struct value address"); |
| 2051 | return 0; |
| 2052 | } |
| 2053 | |
| 2054 | |
| 2055 | static int |
| 2056 | is_float_or_hfa_type_recurse (struct type *t, struct type **etp) |
| 2057 | { |
| 2058 | switch (TYPE_CODE (t)) |
| 2059 | { |
| 2060 | case TYPE_CODE_FLT: |
| 2061 | if (*etp) |
| 2062 | return TYPE_LENGTH (*etp) == TYPE_LENGTH (t); |
| 2063 | else |
| 2064 | { |
| 2065 | *etp = t; |
| 2066 | return 1; |
| 2067 | } |
| 2068 | break; |
| 2069 | case TYPE_CODE_ARRAY: |
| 2070 | return |
| 2071 | is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)), |
| 2072 | etp); |
| 2073 | break; |
| 2074 | case TYPE_CODE_STRUCT: |
| 2075 | { |
| 2076 | int i; |
| 2077 | |
| 2078 | for (i = 0; i < TYPE_NFIELDS (t); i++) |
| 2079 | if (!is_float_or_hfa_type_recurse |
| 2080 | (check_typedef (TYPE_FIELD_TYPE (t, i)), etp)) |
| 2081 | return 0; |
| 2082 | return 1; |
| 2083 | } |
| 2084 | break; |
| 2085 | default: |
| 2086 | return 0; |
| 2087 | break; |
| 2088 | } |
| 2089 | } |
| 2090 | |
| 2091 | /* Determine if the given type is one of the floating point types or |
| 2092 | and HFA (which is a struct, array, or combination thereof whose |
| 2093 | bottom-most elements are all of the same floating point type). */ |
| 2094 | |
| 2095 | static struct type * |
| 2096 | is_float_or_hfa_type (struct type *t) |
| 2097 | { |
| 2098 | struct type *et = 0; |
| 2099 | |
| 2100 | return is_float_or_hfa_type_recurse (t, &et) ? et : 0; |
| 2101 | } |
| 2102 | |
| 2103 | |
| 2104 | /* Return 1 if the alignment of T is such that the next even slot |
| 2105 | should be used. Return 0, if the next available slot should |
| 2106 | be used. (See section 8.5.1 of the IA-64 Software Conventions |
| 2107 | and Runtime manual). */ |
| 2108 | |
| 2109 | static int |
| 2110 | slot_alignment_is_next_even (struct type *t) |
| 2111 | { |
| 2112 | switch (TYPE_CODE (t)) |
| 2113 | { |
| 2114 | case TYPE_CODE_INT: |
| 2115 | case TYPE_CODE_FLT: |
| 2116 | if (TYPE_LENGTH (t) > 8) |
| 2117 | return 1; |
| 2118 | else |
| 2119 | return 0; |
| 2120 | case TYPE_CODE_ARRAY: |
| 2121 | return |
| 2122 | slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t))); |
| 2123 | case TYPE_CODE_STRUCT: |
| 2124 | { |
| 2125 | int i; |
| 2126 | |
| 2127 | for (i = 0; i < TYPE_NFIELDS (t); i++) |
| 2128 | if (slot_alignment_is_next_even |
| 2129 | (check_typedef (TYPE_FIELD_TYPE (t, i)))) |
| 2130 | return 1; |
| 2131 | return 0; |
| 2132 | } |
| 2133 | default: |
| 2134 | return 0; |
| 2135 | } |
| 2136 | } |
| 2137 | |
| 2138 | /* Attempt to find (and return) the global pointer for the given |
| 2139 | function. |
| 2140 | |
| 2141 | This is a rather nasty bit of code searchs for the .dynamic section |
| 2142 | in the objfile corresponding to the pc of the function we're trying |
| 2143 | to call. Once it finds the addresses at which the .dynamic section |
| 2144 | lives in the child process, it scans the Elf64_Dyn entries for a |
| 2145 | DT_PLTGOT tag. If it finds one of these, the corresponding |
| 2146 | d_un.d_ptr value is the global pointer. */ |
| 2147 | |
| 2148 | static CORE_ADDR |
| 2149 | generic_elf_find_global_pointer (CORE_ADDR faddr) |
| 2150 | { |
| 2151 | struct obj_section *faddr_sect; |
| 2152 | |
| 2153 | faddr_sect = find_pc_section (faddr); |
| 2154 | if (faddr_sect != NULL) |
| 2155 | { |
| 2156 | struct obj_section *osect; |
| 2157 | |
| 2158 | ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect) |
| 2159 | { |
| 2160 | if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0) |
| 2161 | break; |
| 2162 | } |
| 2163 | |
| 2164 | if (osect < faddr_sect->objfile->sections_end) |
| 2165 | { |
| 2166 | CORE_ADDR addr; |
| 2167 | |
| 2168 | addr = osect->addr; |
| 2169 | while (addr < osect->endaddr) |
| 2170 | { |
| 2171 | int status; |
| 2172 | LONGEST tag; |
| 2173 | char buf[8]; |
| 2174 | |
| 2175 | status = target_read_memory (addr, buf, sizeof (buf)); |
| 2176 | if (status != 0) |
| 2177 | break; |
| 2178 | tag = extract_signed_integer (buf, sizeof (buf)); |
| 2179 | |
| 2180 | if (tag == DT_PLTGOT) |
| 2181 | { |
| 2182 | CORE_ADDR global_pointer; |
| 2183 | |
| 2184 | status = target_read_memory (addr + 8, buf, sizeof (buf)); |
| 2185 | if (status != 0) |
| 2186 | break; |
| 2187 | global_pointer = extract_unsigned_integer (buf, sizeof (buf)); |
| 2188 | |
| 2189 | /* The payoff... */ |
| 2190 | return global_pointer; |
| 2191 | } |
| 2192 | |
| 2193 | if (tag == DT_NULL) |
| 2194 | break; |
| 2195 | |
| 2196 | addr += 16; |
| 2197 | } |
| 2198 | } |
| 2199 | } |
| 2200 | return 0; |
| 2201 | } |
| 2202 | |
| 2203 | /* Given a function's address, attempt to find (and return) the |
| 2204 | corresponding (canonical) function descriptor. Return 0 if |
| 2205 | not found. */ |
| 2206 | static CORE_ADDR |
| 2207 | find_extant_func_descr (CORE_ADDR faddr) |
| 2208 | { |
| 2209 | struct obj_section *faddr_sect; |
| 2210 | |
| 2211 | /* Return early if faddr is already a function descriptor. */ |
| 2212 | faddr_sect = find_pc_section (faddr); |
| 2213 | if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0) |
| 2214 | return faddr; |
| 2215 | |
| 2216 | if (faddr_sect != NULL) |
| 2217 | { |
| 2218 | struct obj_section *osect; |
| 2219 | ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect) |
| 2220 | { |
| 2221 | if (strcmp (osect->the_bfd_section->name, ".opd") == 0) |
| 2222 | break; |
| 2223 | } |
| 2224 | |
| 2225 | if (osect < faddr_sect->objfile->sections_end) |
| 2226 | { |
| 2227 | CORE_ADDR addr; |
| 2228 | |
| 2229 | addr = osect->addr; |
| 2230 | while (addr < osect->endaddr) |
| 2231 | { |
| 2232 | int status; |
| 2233 | LONGEST faddr2; |
| 2234 | char buf[8]; |
| 2235 | |
| 2236 | status = target_read_memory (addr, buf, sizeof (buf)); |
| 2237 | if (status != 0) |
| 2238 | break; |
| 2239 | faddr2 = extract_signed_integer (buf, sizeof (buf)); |
| 2240 | |
| 2241 | if (faddr == faddr2) |
| 2242 | return addr; |
| 2243 | |
| 2244 | addr += 16; |
| 2245 | } |
| 2246 | } |
| 2247 | } |
| 2248 | return 0; |
| 2249 | } |
| 2250 | |
| 2251 | /* Attempt to find a function descriptor corresponding to the |
| 2252 | given address. If none is found, construct one on the |
| 2253 | stack using the address at fdaptr. */ |
| 2254 | |
| 2255 | static CORE_ADDR |
| 2256 | find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr) |
| 2257 | { |
| 2258 | CORE_ADDR fdesc; |
| 2259 | |
| 2260 | fdesc = find_extant_func_descr (faddr); |
| 2261 | |
| 2262 | if (fdesc == 0) |
| 2263 | { |
| 2264 | CORE_ADDR global_pointer; |
| 2265 | char buf[16]; |
| 2266 | |
| 2267 | fdesc = *fdaptr; |
| 2268 | *fdaptr += 16; |
| 2269 | |
| 2270 | global_pointer = FIND_GLOBAL_POINTER (faddr); |
| 2271 | |
| 2272 | if (global_pointer == 0) |
| 2273 | global_pointer = read_register (IA64_GR1_REGNUM); |
| 2274 | |
| 2275 | store_unsigned_integer (buf, 8, faddr); |
| 2276 | store_unsigned_integer (buf + 8, 8, global_pointer); |
| 2277 | |
| 2278 | write_memory (fdesc, buf, 16); |
| 2279 | } |
| 2280 | |
| 2281 | return fdesc; |
| 2282 | } |
| 2283 | |
| 2284 | /* Use the following routine when printing out function pointers |
| 2285 | so the user can see the function address rather than just the |
| 2286 | function descriptor. */ |
| 2287 | static CORE_ADDR |
| 2288 | ia64_convert_from_func_ptr_addr (CORE_ADDR addr) |
| 2289 | { |
| 2290 | struct obj_section *s; |
| 2291 | |
| 2292 | s = find_pc_section (addr); |
| 2293 | |
| 2294 | /* check if ADDR points to a function descriptor. */ |
| 2295 | if (s && strcmp (s->the_bfd_section->name, ".opd") == 0) |
| 2296 | return read_memory_unsigned_integer (addr, 8); |
| 2297 | |
| 2298 | return addr; |
| 2299 | } |
| 2300 | |
| 2301 | static CORE_ADDR |
| 2302 | ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) |
| 2303 | { |
| 2304 | return sp & ~0xfLL; |
| 2305 | } |
| 2306 | |
| 2307 | static CORE_ADDR |
| 2308 | ia64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
| 2309 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 2310 | int nargs, struct value **args, CORE_ADDR sp, |
| 2311 | int struct_return, CORE_ADDR struct_addr) |
| 2312 | { |
| 2313 | int argno; |
| 2314 | struct value *arg; |
| 2315 | struct type *type; |
| 2316 | int len, argoffset; |
| 2317 | int nslots, rseslots, memslots, slotnum, nfuncargs; |
| 2318 | int floatreg; |
| 2319 | CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr, pc, global_pointer; |
| 2320 | |
| 2321 | nslots = 0; |
| 2322 | nfuncargs = 0; |
| 2323 | /* Count the number of slots needed for the arguments. */ |
| 2324 | for (argno = 0; argno < nargs; argno++) |
| 2325 | { |
| 2326 | arg = args[argno]; |
| 2327 | type = check_typedef (VALUE_TYPE (arg)); |
| 2328 | len = TYPE_LENGTH (type); |
| 2329 | |
| 2330 | if ((nslots & 1) && slot_alignment_is_next_even (type)) |
| 2331 | nslots++; |
| 2332 | |
| 2333 | if (TYPE_CODE (type) == TYPE_CODE_FUNC) |
| 2334 | nfuncargs++; |
| 2335 | |
| 2336 | nslots += (len + 7) / 8; |
| 2337 | } |
| 2338 | |
| 2339 | /* Divvy up the slots between the RSE and the memory stack. */ |
| 2340 | rseslots = (nslots > 8) ? 8 : nslots; |
| 2341 | memslots = nslots - rseslots; |
| 2342 | |
| 2343 | /* Allocate a new RSE frame. */ |
| 2344 | cfm = read_register (IA64_CFM_REGNUM); |
| 2345 | |
| 2346 | bsp = read_register (IA64_BSP_REGNUM); |
| 2347 | new_bsp = rse_address_add (bsp, rseslots); |
| 2348 | write_register (IA64_BSP_REGNUM, new_bsp); |
| 2349 | |
| 2350 | pfs = read_register (IA64_PFS_REGNUM); |
| 2351 | pfs &= 0xc000000000000000LL; |
| 2352 | pfs |= (cfm & 0xffffffffffffLL); |
| 2353 | write_register (IA64_PFS_REGNUM, pfs); |
| 2354 | |
| 2355 | cfm &= 0xc000000000000000LL; |
| 2356 | cfm |= rseslots; |
| 2357 | write_register (IA64_CFM_REGNUM, cfm); |
| 2358 | |
| 2359 | /* We will attempt to find function descriptors in the .opd segment, |
| 2360 | but if we can't we'll construct them ourselves. That being the |
| 2361 | case, we'll need to reserve space on the stack for them. */ |
| 2362 | funcdescaddr = sp - nfuncargs * 16; |
| 2363 | funcdescaddr &= ~0xfLL; |
| 2364 | |
| 2365 | /* Adjust the stack pointer to it's new value. The calling conventions |
| 2366 | require us to have 16 bytes of scratch, plus whatever space is |
| 2367 | necessary for the memory slots and our function descriptors. */ |
| 2368 | sp = sp - 16 - (memslots + nfuncargs) * 8; |
| 2369 | sp &= ~0xfLL; /* Maintain 16 byte alignment. */ |
| 2370 | |
| 2371 | /* Place the arguments where they belong. The arguments will be |
| 2372 | either placed in the RSE backing store or on the memory stack. |
| 2373 | In addition, floating point arguments or HFAs are placed in |
| 2374 | floating point registers. */ |
| 2375 | slotnum = 0; |
| 2376 | floatreg = IA64_FR8_REGNUM; |
| 2377 | for (argno = 0; argno < nargs; argno++) |
| 2378 | { |
| 2379 | struct type *float_elt_type; |
| 2380 | |
| 2381 | arg = args[argno]; |
| 2382 | type = check_typedef (VALUE_TYPE (arg)); |
| 2383 | len = TYPE_LENGTH (type); |
| 2384 | |
| 2385 | /* Special handling for function parameters. */ |
| 2386 | if (len == 8 |
| 2387 | && TYPE_CODE (type) == TYPE_CODE_PTR |
| 2388 | && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC) |
| 2389 | { |
| 2390 | char val_buf[8]; |
| 2391 | |
| 2392 | store_unsigned_integer (val_buf, 8, |
| 2393 | find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg), 8), |
| 2394 | &funcdescaddr)); |
| 2395 | if (slotnum < rseslots) |
| 2396 | write_memory (rse_address_add (bsp, slotnum), val_buf, 8); |
| 2397 | else |
| 2398 | write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); |
| 2399 | slotnum++; |
| 2400 | continue; |
| 2401 | } |
| 2402 | |
| 2403 | /* Normal slots. */ |
| 2404 | |
| 2405 | /* Skip odd slot if necessary... */ |
| 2406 | if ((slotnum & 1) && slot_alignment_is_next_even (type)) |
| 2407 | slotnum++; |
| 2408 | |
| 2409 | argoffset = 0; |
| 2410 | while (len > 0) |
| 2411 | { |
| 2412 | char val_buf[8]; |
| 2413 | |
| 2414 | memset (val_buf, 0, 8); |
| 2415 | memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len); |
| 2416 | |
| 2417 | if (slotnum < rseslots) |
| 2418 | write_memory (rse_address_add (bsp, slotnum), val_buf, 8); |
| 2419 | else |
| 2420 | write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); |
| 2421 | |
| 2422 | argoffset += 8; |
| 2423 | len -= 8; |
| 2424 | slotnum++; |
| 2425 | } |
| 2426 | |
| 2427 | /* Handle floating point types (including HFAs). */ |
| 2428 | float_elt_type = is_float_or_hfa_type (type); |
| 2429 | if (float_elt_type != NULL) |
| 2430 | { |
| 2431 | argoffset = 0; |
| 2432 | len = TYPE_LENGTH (type); |
| 2433 | while (len > 0 && floatreg < IA64_FR16_REGNUM) |
| 2434 | { |
| 2435 | char to[MAX_REGISTER_SIZE]; |
| 2436 | convert_typed_floating (VALUE_CONTENTS (arg) + argoffset, float_elt_type, |
| 2437 | to, builtin_type_ia64_ext); |
| 2438 | regcache_cooked_write (regcache, floatreg, (void *)to); |
| 2439 | floatreg++; |
| 2440 | argoffset += TYPE_LENGTH (float_elt_type); |
| 2441 | len -= TYPE_LENGTH (float_elt_type); |
| 2442 | } |
| 2443 | } |
| 2444 | } |
| 2445 | |
| 2446 | /* Store the struct return value in r8 if necessary. */ |
| 2447 | if (struct_return) |
| 2448 | { |
| 2449 | regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr); |
| 2450 | } |
| 2451 | |
| 2452 | global_pointer = FIND_GLOBAL_POINTER (func_addr); |
| 2453 | |
| 2454 | if (global_pointer != 0) |
| 2455 | write_register (IA64_GR1_REGNUM, global_pointer); |
| 2456 | |
| 2457 | write_register (IA64_BR0_REGNUM, bp_addr); |
| 2458 | |
| 2459 | write_register (sp_regnum, sp); |
| 2460 | |
| 2461 | return sp; |
| 2462 | } |
| 2463 | |
| 2464 | static struct frame_id |
| 2465 | ia64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 2466 | { |
| 2467 | char buf[8]; |
| 2468 | CORE_ADDR sp; |
| 2469 | |
| 2470 | frame_unwind_register (next_frame, sp_regnum, buf); |
| 2471 | sp = extract_unsigned_integer (buf, 8); |
| 2472 | |
| 2473 | return frame_id_build (sp, frame_pc_unwind (next_frame)); |
| 2474 | } |
| 2475 | |
| 2476 | static CORE_ADDR |
| 2477 | ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 2478 | { |
| 2479 | char buf[8]; |
| 2480 | CORE_ADDR ip, psr, pc; |
| 2481 | |
| 2482 | frame_unwind_register (next_frame, IA64_IP_REGNUM, buf); |
| 2483 | ip = extract_unsigned_integer (buf, 8); |
| 2484 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); |
| 2485 | psr = extract_unsigned_integer (buf, 8); |
| 2486 | |
| 2487 | pc = (ip & ~0xf) | ((psr >> 41) & 3); |
| 2488 | return pc; |
| 2489 | } |
| 2490 | |
| 2491 | static void |
| 2492 | ia64_store_return_value (struct type *type, struct regcache *regcache, const void *valbuf) |
| 2493 | { |
| 2494 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
| 2495 | { |
| 2496 | char to[MAX_REGISTER_SIZE]; |
| 2497 | convert_typed_floating (valbuf, type, to, builtin_type_ia64_ext); |
| 2498 | regcache_cooked_write (regcache, IA64_FR8_REGNUM, (void *)to); |
| 2499 | target_store_registers (IA64_FR8_REGNUM); |
| 2500 | } |
| 2501 | else |
| 2502 | regcache_cooked_write (regcache, IA64_GR8_REGNUM, valbuf); |
| 2503 | } |
| 2504 | |
| 2505 | static void |
| 2506 | ia64_remote_translate_xfer_address (struct gdbarch *gdbarch, |
| 2507 | struct regcache *regcache, |
| 2508 | CORE_ADDR memaddr, int nr_bytes, |
| 2509 | CORE_ADDR *targ_addr, int *targ_len) |
| 2510 | { |
| 2511 | *targ_addr = memaddr; |
| 2512 | *targ_len = nr_bytes; |
| 2513 | } |
| 2514 | |
| 2515 | static void |
| 2516 | process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj) |
| 2517 | { |
| 2518 | int *os_ident_ptr = obj; |
| 2519 | const char *name; |
| 2520 | unsigned int sectsize; |
| 2521 | |
| 2522 | name = bfd_get_section_name (abfd, sect); |
| 2523 | sectsize = bfd_section_size (abfd, sect); |
| 2524 | if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0) |
| 2525 | { |
| 2526 | unsigned int name_length, data_length, note_type; |
| 2527 | char *note = alloca (sectsize); |
| 2528 | |
| 2529 | bfd_get_section_contents (abfd, sect, note, |
| 2530 | (file_ptr) 0, (bfd_size_type) sectsize); |
| 2531 | |
| 2532 | name_length = bfd_h_get_32 (abfd, note); |
| 2533 | data_length = bfd_h_get_32 (abfd, note + 4); |
| 2534 | note_type = bfd_h_get_32 (abfd, note + 8); |
| 2535 | |
| 2536 | if (name_length == 4 && data_length == 16 && note_type == 1 |
| 2537 | && strcmp (note + 12, "GNU") == 0) |
| 2538 | { |
| 2539 | int os_number = bfd_h_get_32 (abfd, note + 16); |
| 2540 | |
| 2541 | /* The case numbers are from abi-tags in glibc. */ |
| 2542 | switch (os_number) |
| 2543 | { |
| 2544 | case 0 : |
| 2545 | *os_ident_ptr = ELFOSABI_LINUX; |
| 2546 | break; |
| 2547 | case 1 : |
| 2548 | *os_ident_ptr = ELFOSABI_HURD; |
| 2549 | break; |
| 2550 | case 2 : |
| 2551 | *os_ident_ptr = ELFOSABI_SOLARIS; |
| 2552 | break; |
| 2553 | default : |
| 2554 | internal_error (__FILE__, __LINE__, |
| 2555 | "process_note_abi_sections: unknown OS number %d", os_number); |
| 2556 | break; |
| 2557 | } |
| 2558 | } |
| 2559 | } |
| 2560 | } |
| 2561 | |
| 2562 | static int |
| 2563 | ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info) |
| 2564 | { |
| 2565 | info->bytes_per_line = SLOT_MULTIPLIER; |
| 2566 | return print_insn_ia64 (memaddr, info); |
| 2567 | } |
| 2568 | |
| 2569 | static struct gdbarch * |
| 2570 | ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 2571 | { |
| 2572 | struct gdbarch *gdbarch; |
| 2573 | struct gdbarch_tdep *tdep; |
| 2574 | int os_ident; |
| 2575 | |
| 2576 | if (info.abfd != NULL |
| 2577 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) |
| 2578 | { |
| 2579 | os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI]; |
| 2580 | |
| 2581 | /* If os_ident is 0, it is not necessarily the case that we're |
| 2582 | on a SYSV system. (ELFOSABI_NONE is defined to be 0.) |
| 2583 | GNU/Linux uses a note section to record OS/ABI info, but |
| 2584 | leaves e_ident[EI_OSABI] zero. So we have to check for note |
| 2585 | sections too. */ |
| 2586 | if (os_ident == 0) |
| 2587 | { |
| 2588 | bfd_map_over_sections (info.abfd, |
| 2589 | process_note_abi_tag_sections, |
| 2590 | &os_ident); |
| 2591 | } |
| 2592 | } |
| 2593 | else |
| 2594 | os_ident = -1; |
| 2595 | |
| 2596 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
| 2597 | arches != NULL; |
| 2598 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) |
| 2599 | { |
| 2600 | tdep = gdbarch_tdep (arches->gdbarch); |
| 2601 | if (tdep &&tdep->os_ident == os_ident) |
| 2602 | return arches->gdbarch; |
| 2603 | } |
| 2604 | |
| 2605 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); |
| 2606 | gdbarch = gdbarch_alloc (&info, tdep); |
| 2607 | tdep->os_ident = os_ident; |
| 2608 | |
| 2609 | /* Set the method of obtaining the sigcontext addresses at which |
| 2610 | registers are saved. The method of checking to see if |
| 2611 | native_find_global_pointer is nonzero to indicate that we're |
| 2612 | on AIX is kind of hokey, but I can't think of a better way |
| 2613 | to do it. */ |
| 2614 | if (os_ident == ELFOSABI_LINUX) |
| 2615 | tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address; |
| 2616 | else if (native_find_global_pointer != 0) |
| 2617 | tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address; |
| 2618 | else |
| 2619 | tdep->sigcontext_register_address = 0; |
| 2620 | |
| 2621 | /* We know that GNU/Linux won't have to resort to the |
| 2622 | native_find_global_pointer hackery. But that's the only one we |
| 2623 | know about so far, so if native_find_global_pointer is set to |
| 2624 | something non-zero, then use it. Otherwise fall back to using |
| 2625 | generic_elf_find_global_pointer. This arrangement should (in |
| 2626 | theory) allow us to cross debug GNU/Linux binaries from an AIX |
| 2627 | machine. */ |
| 2628 | if (os_ident == ELFOSABI_LINUX) |
| 2629 | tdep->find_global_pointer = generic_elf_find_global_pointer; |
| 2630 | else if (native_find_global_pointer != 0) |
| 2631 | tdep->find_global_pointer = native_find_global_pointer; |
| 2632 | else |
| 2633 | tdep->find_global_pointer = generic_elf_find_global_pointer; |
| 2634 | |
| 2635 | /* Define the ia64 floating-point format to gdb. */ |
| 2636 | builtin_type_ia64_ext = |
| 2637 | init_type (TYPE_CODE_FLT, 128 / 8, |
| 2638 | 0, "builtin_type_ia64_ext", NULL); |
| 2639 | TYPE_FLOATFORMAT (builtin_type_ia64_ext) = &floatformat_ia64_ext; |
| 2640 | |
| 2641 | set_gdbarch_short_bit (gdbarch, 16); |
| 2642 | set_gdbarch_int_bit (gdbarch, 32); |
| 2643 | set_gdbarch_long_bit (gdbarch, 64); |
| 2644 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 2645 | set_gdbarch_float_bit (gdbarch, 32); |
| 2646 | set_gdbarch_double_bit (gdbarch, 64); |
| 2647 | set_gdbarch_long_double_bit (gdbarch, 128); |
| 2648 | set_gdbarch_ptr_bit (gdbarch, 64); |
| 2649 | |
| 2650 | set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS); |
| 2651 | set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM); |
| 2652 | set_gdbarch_sp_regnum (gdbarch, sp_regnum); |
| 2653 | set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM); |
| 2654 | |
| 2655 | set_gdbarch_register_name (gdbarch, ia64_register_name); |
| 2656 | /* FIXME: Following interface should not be needed, however, without it recurse.exp |
| 2657 | gets a number of extra failures. */ |
| 2658 | set_gdbarch_deprecated_register_size (gdbarch, 8); |
| 2659 | set_gdbarch_register_type (gdbarch, ia64_register_type); |
| 2660 | |
| 2661 | set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read); |
| 2662 | set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write); |
| 2663 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum); |
| 2664 | set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p); |
| 2665 | set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p); |
| 2666 | set_gdbarch_register_to_value (gdbarch, ia64_register_to_value); |
| 2667 | set_gdbarch_value_to_register (gdbarch, ia64_value_to_register); |
| 2668 | |
| 2669 | set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue); |
| 2670 | |
| 2671 | set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention); |
| 2672 | set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value); |
| 2673 | |
| 2674 | set_gdbarch_store_return_value (gdbarch, ia64_store_return_value); |
| 2675 | set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address); |
| 2676 | |
| 2677 | set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint); |
| 2678 | set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint); |
| 2679 | set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc); |
| 2680 | set_gdbarch_read_pc (gdbarch, ia64_read_pc); |
| 2681 | set_gdbarch_write_pc (gdbarch, ia64_write_pc); |
| 2682 | |
| 2683 | /* Settings for calling functions in the inferior. */ |
| 2684 | set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call); |
| 2685 | set_gdbarch_frame_align (gdbarch, ia64_frame_align); |
| 2686 | set_gdbarch_unwind_dummy_id (gdbarch, ia64_unwind_dummy_id); |
| 2687 | |
| 2688 | set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc); |
| 2689 | frame_unwind_append_sniffer (gdbarch, ia64_sigtramp_frame_sniffer); |
| 2690 | frame_unwind_append_sniffer (gdbarch, ia64_frame_sniffer); |
| 2691 | frame_base_set_default (gdbarch, &ia64_frame_base); |
| 2692 | |
| 2693 | /* Settings that should be unnecessary. */ |
| 2694 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 2695 | |
| 2696 | set_gdbarch_decr_pc_after_break (gdbarch, 0); |
| 2697 | set_gdbarch_function_start_offset (gdbarch, 0); |
| 2698 | set_gdbarch_frame_args_skip (gdbarch, 0); |
| 2699 | |
| 2700 | set_gdbarch_remote_translate_xfer_address ( |
| 2701 | gdbarch, ia64_remote_translate_xfer_address); |
| 2702 | |
| 2703 | set_gdbarch_print_insn (gdbarch, ia64_print_insn); |
| 2704 | set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr); |
| 2705 | |
| 2706 | return gdbarch; |
| 2707 | } |
| 2708 | |
| 2709 | extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */ |
| 2710 | |
| 2711 | void |
| 2712 | _initialize_ia64_tdep (void) |
| 2713 | { |
| 2714 | register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init); |
| 2715 | } |