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1/* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@worldnet.fr
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21
22#include "defs.h"
23#include "frame.h"
24#include "symtab.h"
25#include "gdbtypes.h"
26#include "gdbcmd.h"
27#include "gdbcore.h"
28#include "gdb_string.h"
29#include "value.h"
30#include "inferior.h"
31#include "dis-asm.h"
32#include "symfile.h"
33#include "objfiles.h"
34#include "arch-utils.h"
35#include "regcache.h"
36
37#include "target.h"
38#include "opcode/m68hc11.h"
39
40/* Register numbers of various important registers.
41 Note that some of these values are "real" register numbers,
42 and correspond to the general registers of the machine,
43 and some are "phony" register numbers which are too large
44 to be actual register numbers as far as the user is concerned
45 but do serve to get the desired values when passed to read_register. */
46
47#define HARD_X_REGNUM 0
48#define HARD_D_REGNUM 1
49#define HARD_Y_REGNUM 2
50#define HARD_SP_REGNUM 3
51#define HARD_PC_REGNUM 4
52
53#define HARD_A_REGNUM 5
54#define HARD_B_REGNUM 6
55#define HARD_CCR_REGNUM 7
56#define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM)
57
58/* Z is replaced by X or Y by gcc during machine reorg.
59 ??? There is no way to get it and even know whether
60 it's in X or Y or in ZS. */
61#define SOFT_Z_REGNUM 8
62
63/* Soft registers. These registers are special. There are treated
64 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
65 They are physically located in memory. */
66#define SOFT_FP_REGNUM 9
67#define SOFT_TMP_REGNUM 10
68#define SOFT_ZS_REGNUM 11
69#define SOFT_XY_REGNUM 12
70#define SOFT_UNUSED_REGNUM 13
71#define SOFT_D1_REGNUM 14
72#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
73#define M68HC11_MAX_SOFT_REGS 32
74
75#define M68HC11_NUM_REGS (8)
76#define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
77#define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
78
79#define M68HC11_REG_SIZE (2)
80
81struct insn_sequence;
82struct gdbarch_tdep
83 {
84 /* Stack pointer correction value. For 68hc11, the stack pointer points
85 to the next push location. An offset of 1 must be applied to obtain
86 the address where the last value is saved. For 68hc12, the stack
87 pointer points to the last value pushed. No offset is necessary. */
88 int stack_correction;
89
90 /* Description of instructions in the prologue. */
91 struct insn_sequence *prologue;
92 };
93
94#define M6811_TDEP gdbarch_tdep (current_gdbarch)
95#define STACK_CORRECTION (M6811_TDEP->stack_correction)
96
97struct frame_extra_info
98{
99 int frame_reg;
100 CORE_ADDR return_pc;
101 CORE_ADDR dummy;
102 int frameless;
103 int size;
104};
105
106/* Table of registers for 68HC11. This includes the hard registers
107 and the soft registers used by GCC. */
108static char *
109m68hc11_register_names[] =
110{
111 "x", "d", "y", "sp", "pc", "a", "b",
112 "ccr", "z", "frame","tmp", "zs", "xy", 0,
113 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
114 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
115 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
116 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
117 "d29", "d30", "d31", "d32"
118};
119
120struct m68hc11_soft_reg
121{
122 const char *name;
123 CORE_ADDR addr;
124};
125
126static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
127
128#define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
129
130static int soft_min_addr;
131static int soft_max_addr;
132static int soft_reg_initialized = 0;
133
134/* Look in the symbol table for the address of a pseudo register
135 in memory. If we don't find it, pretend the register is not used
136 and not available. */
137static void
138m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
139{
140 struct minimal_symbol *msymbol;
141
142 msymbol = lookup_minimal_symbol (name, NULL, NULL);
143 if (msymbol)
144 {
145 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
146 reg->name = xstrdup (name);
147
148 /* Keep track of the address range for soft registers. */
149 if (reg->addr < (CORE_ADDR) soft_min_addr)
150 soft_min_addr = reg->addr;
151 if (reg->addr > (CORE_ADDR) soft_max_addr)
152 soft_max_addr = reg->addr;
153 }
154 else
155 {
156 reg->name = 0;
157 reg->addr = 0;
158 }
159}
160
161/* Initialize the table of soft register addresses according
162 to the symbol table. */
163 static void
164m68hc11_initialize_register_info (void)
165{
166 int i;
167
168 if (soft_reg_initialized)
169 return;
170
171 soft_min_addr = INT_MAX;
172 soft_max_addr = 0;
173 for (i = 0; i < M68HC11_ALL_REGS; i++)
174 {
175 soft_regs[i].name = 0;
176 }
177
178 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
179 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
180 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
181 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
182 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
183
184 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
185 {
186 char buf[10];
187
188 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
189 m68hc11_get_register_info (&soft_regs[i], buf);
190 }
191
192 if (soft_regs[SOFT_FP_REGNUM].name == 0)
193 {
194 warning ("No frame soft register found in the symbol table.\n");
195 warning ("Stack backtrace will not work.\n");
196 }
197 soft_reg_initialized = 1;
198}
199
200/* Given an address in memory, return the soft register number if
201 that address corresponds to a soft register. Returns -1 if not. */
202static int
203m68hc11_which_soft_register (CORE_ADDR addr)
204{
205 int i;
206
207 if (addr < soft_min_addr || addr > soft_max_addr)
208 return -1;
209
210 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
211 {
212 if (soft_regs[i].name && soft_regs[i].addr == addr)
213 return i;
214 }
215 return -1;
216}
217
218/* Fetch a pseudo register. The 68hc11 soft registers are treated like
219 pseudo registers. They are located in memory. Translate the register
220 fetch into a memory read. */
221void
222m68hc11_fetch_pseudo_register (int regno)
223{
224 char buf[MAX_REGISTER_RAW_SIZE];
225
226 m68hc11_initialize_register_info ();
227
228 /* Fetch a soft register: translate into a memory read. */
229 if (soft_regs[regno].name)
230 {
231 target_read_memory (soft_regs[regno].addr, buf, 2);
232 }
233 else
234 {
235 memset (buf, 0, 2);
236 }
237 supply_register (regno, buf);
238}
239
240/* Store a pseudo register. Translate the register store
241 into a memory write. */
242static void
243m68hc11_store_pseudo_register (int regno)
244{
245 m68hc11_initialize_register_info ();
246
247 /* Store a soft register: translate into a memory write. */
248 if (soft_regs[regno].name)
249 {
250 char buf[MAX_REGISTER_RAW_SIZE];
251
252 read_register_gen (regno, buf);
253 target_write_memory (soft_regs[regno].addr, buf, 2);
254 }
255}
256
257static const char *
258m68hc11_register_name (int reg_nr)
259{
260 if (reg_nr < 0)
261 return NULL;
262 if (reg_nr >= M68HC11_ALL_REGS)
263 return NULL;
264
265 /* If we don't know the address of a soft register, pretend it
266 does not exist. */
267 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
268 return NULL;
269 return m68hc11_register_names[reg_nr];
270}
271
272static const unsigned char *
273m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
274{
275 static unsigned char breakpoint[] = {0x0};
276
277 *lenptr = sizeof (breakpoint);
278 return breakpoint;
279}
280
281/* Immediately after a function call, return the saved pc before the frame
282 is setup. */
283
284static CORE_ADDR
285m68hc11_saved_pc_after_call (struct frame_info *frame)
286{
287 CORE_ADDR addr;
288
289 addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
290 addr &= 0x0ffff;
291 return read_memory_integer (addr, 2) & 0x0FFFF;
292}
293
294static CORE_ADDR
295m68hc11_frame_saved_pc (struct frame_info *frame)
296{
297 return frame->extra_info->return_pc;
298}
299
300static CORE_ADDR
301m68hc11_frame_args_address (struct frame_info *frame)
302{
303 return frame->frame + frame->extra_info->size + STACK_CORRECTION + 2;
304}
305
306static CORE_ADDR
307m68hc11_frame_locals_address (struct frame_info *frame)
308{
309 return frame->frame;
310}
311
312/* Discard from the stack the innermost frame, restoring all saved
313 registers. */
314
315static void
316m68hc11_pop_frame (void)
317{
318 register struct frame_info *frame = get_current_frame ();
319 register CORE_ADDR fp, sp;
320 register int regnum;
321
322 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
323 generic_pop_dummy_frame ();
324 else
325 {
326 fp = FRAME_FP (frame);
327 FRAME_INIT_SAVED_REGS (frame);
328
329 /* Copy regs from where they were saved in the frame. */
330 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
331 if (frame->saved_regs[regnum])
332 write_register (regnum,
333 read_memory_integer (frame->saved_regs[regnum], 2));
334
335 write_register (HARD_PC_REGNUM, frame->extra_info->return_pc);
336 sp = (fp + frame->extra_info->size + 2) & 0x0ffff;
337 write_register (HARD_SP_REGNUM, sp);
338 }
339 flush_cached_frames ();
340}
341
342\f
343/* 68HC11 & 68HC12 prologue analysis.
344
345 */
346#define MAX_CODES 12
347
348/* 68HC11 opcodes. */
349#undef M6811_OP_PAGE2
350#define M6811_OP_PAGE2 (0x18)
351#define M6811_OP_LDX (0xde)
352#define M6811_OP_PSHX (0x3c)
353#define M6811_OP_STS (0x9f)
354#define M6811_OP_TSX (0x30)
355#define M6811_OP_XGDX (0x8f)
356#define M6811_OP_ADDD (0xc3)
357#define M6811_OP_TXS (0x35)
358#define M6811_OP_DES (0x34)
359
360/* 68HC12 opcodes. */
361#define M6812_OP_PAGE2 (0x18)
362#define M6812_OP_MOVW (0x01)
363#define M6812_PB_PSHW (0xae)
364#define M6812_OP_STS (0x7f)
365#define M6812_OP_LEAS (0x1b)
366
367/* Operand extraction. */
368#define OP_DIRECT (0x100) /* 8-byte direct addressing. */
369#define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
370#define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
371#define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
372
373/* Identification of the sequence. */
374enum m6811_seq_type
375{
376 P_LAST = 0,
377 P_SAVE_REG, /* Save a register on the stack. */
378 P_SET_FRAME, /* Setup the frame pointer. */
379 P_LOCAL_1, /* Allocate 1 byte for locals. */
380 P_LOCAL_2, /* Allocate 2 bytes for locals. */
381 P_LOCAL_N /* Allocate N bytes for locals. */
382};
383
384struct insn_sequence {
385 enum m6811_seq_type type;
386 unsigned length;
387 unsigned short code[MAX_CODES];
388};
389
390/* Sequence of instructions in the 68HC11 function prologue. */
391static struct insn_sequence m6811_prologue[] = {
392 /* Sequences to save a soft-register. */
393 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
394 M6811_OP_PSHX } },
395 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
396 M6811_OP_PAGE2, M6811_OP_PSHX } },
397
398 /* Sequences to allocate local variables. */
399 { P_LOCAL_N, 7, { M6811_OP_TSX,
400 M6811_OP_XGDX,
401 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
402 M6811_OP_XGDX,
403 M6811_OP_TXS } },
404 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
405 M6811_OP_PAGE2, M6811_OP_XGDX,
406 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
407 M6811_OP_PAGE2, M6811_OP_XGDX,
408 M6811_OP_PAGE2, M6811_OP_TXS } },
409 { P_LOCAL_1, 1, { M6811_OP_DES } },
410 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
411 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
412
413 /* Initialize the frame pointer. */
414 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
415 { P_LAST, 0, { 0 } }
416};
417
418
419/* Sequence of instructions in the 68HC12 function prologue. */
420static struct insn_sequence m6812_prologue[] = {
421 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
422 OP_IMM_HIGH, OP_IMM_LOW } },
423 { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } },
424 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
425 { P_LAST, 0 }
426};
427
428
429/* Analyze the sequence of instructions starting at the given address.
430 Returns a pointer to the sequence when it is recognized and
431 the optional value (constant/address) associated with it.
432 Advance the pc for the next sequence. */
433static struct insn_sequence *
434m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
435 CORE_ADDR *val)
436{
437 unsigned char buffer[MAX_CODES];
438 unsigned bufsize;
439 unsigned j;
440 CORE_ADDR cur_val;
441 short v = 0;
442
443 bufsize = 0;
444 for (; seq->type != P_LAST; seq++)
445 {
446 cur_val = 0;
447 for (j = 0; j < seq->length; j++)
448 {
449 if (bufsize < j + 1)
450 {
451 buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
452 1);
453 bufsize++;
454 }
455 /* Continue while we match the opcode. */
456 if (seq->code[j] == buffer[j])
457 continue;
458
459 if ((seq->code[j] & 0xf00) == 0)
460 break;
461
462 /* Extract a sequence parameter (address or constant). */
463 switch (seq->code[j])
464 {
465 case OP_DIRECT:
466 cur_val = (CORE_ADDR) buffer[j];
467 break;
468
469 case OP_IMM_HIGH:
470 cur_val = cur_val & 0x0ff;
471 cur_val |= (buffer[j] << 8);
472 break;
473
474 case OP_IMM_LOW:
475 cur_val &= 0x0ff00;
476 cur_val |= buffer[j];
477 break;
478
479 case OP_PBYTE:
480 if ((buffer[j] & 0xE0) == 0x80)
481 {
482 v = buffer[j] & 0x1f;
483 if (v & 0x10)
484 v |= 0xfff0;
485 }
486 else if ((buffer[j] & 0xfe) == 0xf0)
487 {
488 v = read_memory_unsigned_integer (*pc + j + 1, 1);
489 if (buffer[j] & 1)
490 v |= 0xff00;
491 *pc = *pc + 1;
492 }
493 else if (buffer[j] == 0xf2)
494 {
495 v = read_memory_unsigned_integer (*pc + j + 1, 2);
496 *pc = *pc + 2;
497 }
498 cur_val = v;
499 break;
500 }
501 }
502
503 /* We have a full match. */
504 if (j == seq->length)
505 {
506 *val = cur_val;
507 *pc = *pc + j;
508 return seq;
509 }
510 }
511 return 0;
512}
513
514/* Analyze the function prologue to find some information
515 about the function:
516 - the PC of the first line (for m68hc11_skip_prologue)
517 - the offset of the previous frame saved address (from current frame)
518 - the soft registers which are pushed. */
519static void
520m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
521 CORE_ADDR *first_line,
522 int *frame_offset, CORE_ADDR *pushed_regs)
523{
524 CORE_ADDR save_addr;
525 CORE_ADDR func_end;
526 int size;
527 int found_frame_point;
528 int saved_reg;
529 CORE_ADDR first_pc;
530 int done = 0;
531 struct insn_sequence *seq_table;
532
533 first_pc = get_pc_function_start (pc);
534 size = 0;
535
536 m68hc11_initialize_register_info ();
537 if (first_pc == 0)
538 {
539 *frame_offset = 0;
540 *first_line = pc;
541 return;
542 }
543
544 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
545
546 /* The 68hc11 stack is as follows:
547
548
549 | |
550 +-----------+
551 | |
552 | args |
553 | |
554 +-----------+
555 | PC-return |
556 +-----------+
557 | Old frame |
558 +-----------+
559 | |
560 | Locals |
561 | |
562 +-----------+ <--- current frame
563 | |
564
565 With most processors (like 68K) the previous frame can be computed
566 easily because it is always at a fixed offset (see link/unlink).
567 That is, locals are accessed with negative offsets, arguments are
568 accessed with positive ones. Since 68hc11 only supports offsets
569 in the range [0..255], the frame is defined at the bottom of
570 locals (see picture).
571
572 The purpose of the analysis made here is to find out the size
573 of locals in this function. An alternative to this is to use
574 DWARF2 info. This would be better but I don't know how to
575 access dwarf2 debug from this function.
576
577 Walk from the function entry point to the point where we save
578 the frame. While walking instructions, compute the size of bytes
579 which are pushed. This gives us the index to access the previous
580 frame.
581
582 We limit the search to 128 bytes so that the algorithm is bounded
583 in case of random and wrong code. We also stop and abort if
584 we find an instruction which is not supposed to appear in the
585 prologue (as generated by gcc 2.95, 2.96).
586 */
587 pc = first_pc;
588 func_end = pc + 128;
589 found_frame_point = 0;
590 *frame_offset = 0;
591 save_addr = fp + STACK_CORRECTION;
592 while (!done && pc + 2 < func_end)
593 {
594 struct insn_sequence *seq;
595 CORE_ADDR val;
596
597 seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
598 if (seq == 0)
599 break;
600
601 if (seq->type == P_SAVE_REG)
602 {
603 if (found_frame_point)
604 {
605 saved_reg = m68hc11_which_soft_register (val);
606 if (saved_reg < 0)
607 break;
608
609 save_addr -= 2;
610 if (pushed_regs)
611 pushed_regs[saved_reg] = save_addr;
612 }
613 else
614 {
615 size += 2;
616 }
617 }
618 else if (seq->type == P_SET_FRAME)
619 {
620 found_frame_point = 1;
621 *frame_offset = size;
622 }
623 else if (seq->type == P_LOCAL_1)
624 {
625 size += 1;
626 }
627 else if (seq->type == P_LOCAL_2)
628 {
629 size += 2;
630 }
631 else if (seq->type == P_LOCAL_N)
632 {
633 /* Stack pointer is decremented for the allocation. */
634 if (val & 0x8000)
635 size -= (int) (val) | 0xffff0000;
636 else
637 size -= val;
638 }
639 }
640 *first_line = pc;
641}
642
643static CORE_ADDR
644m68hc11_skip_prologue (CORE_ADDR pc)
645{
646 CORE_ADDR func_addr, func_end;
647 struct symtab_and_line sal;
648 int frame_offset;
649
650 /* If we have line debugging information, then the end of the
651 prologue should be the first assembly instruction of the
652 first source line. */
653 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
654 {
655 sal = find_pc_line (func_addr, 0);
656 if (sal.end && sal.end < func_end)
657 return sal.end;
658 }
659
660 m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
661 return pc;
662}
663
664/* Given a GDB frame, determine the address of the calling function's frame.
665 This will be used to create a new GDB frame struct, and then
666 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
667*/
668
669static CORE_ADDR
670m68hc11_frame_chain (struct frame_info *frame)
671{
672 CORE_ADDR addr;
673
674 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
675 return frame->frame; /* dummy frame same as caller's frame */
676
677 if (frame->extra_info->return_pc == 0
678 || inside_entry_file (frame->extra_info->return_pc))
679 return (CORE_ADDR) 0;
680
681 if (frame->frame == 0)
682 {
683 return (CORE_ADDR) 0;
684 }
685
686 addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2;
687 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
688 if (addr == 0)
689 {
690 return (CORE_ADDR) 0;
691 }
692
693 return addr;
694}
695
696/* Put here the code to store, into a struct frame_saved_regs, the
697 addresses of the saved registers of frame described by FRAME_INFO.
698 This includes special registers such as pc and fp saved in special
699 ways in the stack frame. sp is even more special: the address we
700 return for it IS the sp for the next frame. */
701static void
702m68hc11_frame_init_saved_regs (struct frame_info *fi)
703{
704 CORE_ADDR pc;
705 CORE_ADDR addr;
706
707 if (fi->saved_regs == NULL)
708 frame_saved_regs_zalloc (fi);
709 else
710 memset (fi->saved_regs, 0, sizeof (fi->saved_regs));
711
712 pc = fi->pc;
713 m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size,
714 fi->saved_regs);
715
716 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
717 if (soft_regs[SOFT_FP_REGNUM].name)
718 fi->saved_regs[SOFT_FP_REGNUM] = addr - 2;
719 fi->saved_regs[HARD_SP_REGNUM] = addr;
720 fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM];
721}
722
723static void
724m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
725{
726 CORE_ADDR addr;
727
728 fi->extra_info = (struct frame_extra_info *)
729 frame_obstack_alloc (sizeof (struct frame_extra_info));
730
731 if (fi->next)
732 fi->pc = FRAME_SAVED_PC (fi->next);
733
734 m68hc11_frame_init_saved_regs (fi);
735
736 if (fromleaf)
737 {
738 fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi);
739 }
740 else
741 {
742 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
743 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
744 fi->extra_info->return_pc = addr;
745#if 0
746 printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n",
747 fi->pc,
748 fi->frame, fi->size,
749 addr & 0x0ffff,
750 fi->return_pc);
751#endif
752 }
753}
754
755/* Same as 'info reg' but prints the registers in a different way. */
756static void
757show_regs (char *args, int from_tty)
758{
759 int ccr = read_register (HARD_CCR_REGNUM);
760 int i;
761 int nr;
762
763 printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
764 (int) read_register (HARD_PC_REGNUM),
765 (int) read_register (HARD_SP_REGNUM),
766 (int) read_register (SOFT_FP_REGNUM),
767 ccr,
768 ccr & M6811_S_BIT ? 'S' : '-',
769 ccr & M6811_X_BIT ? 'X' : '-',
770 ccr & M6811_H_BIT ? 'H' : '-',
771 ccr & M6811_I_BIT ? 'I' : '-',
772 ccr & M6811_N_BIT ? 'N' : '-',
773 ccr & M6811_Z_BIT ? 'Z' : '-',
774 ccr & M6811_V_BIT ? 'V' : '-',
775 ccr & M6811_C_BIT ? 'C' : '-');
776
777 printf_filtered ("D=%04x IX=%04x IY=%04x\n",
778 (int) read_register (HARD_D_REGNUM),
779 (int) read_register (HARD_X_REGNUM),
780 (int) read_register (HARD_Y_REGNUM));
781
782 nr = 0;
783 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
784 {
785 /* Skip registers which are not defined in the symbol table. */
786 if (soft_regs[i].name == 0)
787 continue;
788
789 printf_filtered ("D%d=%04x",
790 i - SOFT_D1_REGNUM + 1,
791 (int) read_register (i));
792 nr++;
793 if ((nr % 8) == 7)
794 printf_filtered ("\n");
795 else
796 printf_filtered (" ");
797 }
798 if (nr && (nr % 8) != 7)
799 printf_filtered ("\n");
800}
801
802static CORE_ADDR
803m68hc11_stack_align (CORE_ADDR addr)
804{
805 return ((addr + 1) & -2);
806}
807
808static CORE_ADDR
809m68hc11_push_arguments (int nargs,
810 struct value **args,
811 CORE_ADDR sp,
812 int struct_return,
813 CORE_ADDR struct_addr)
814{
815 int stack_alloc;
816 int argnum;
817 int first_stack_argnum;
818 int stack_offset;
819 struct type *type;
820 char *val;
821 int len;
822
823 stack_alloc = 0;
824 first_stack_argnum = 0;
825 if (struct_return)
826 {
827 /* The struct is allocated on the stack and gdb used the stack
828 pointer for the address of that struct. We must apply the
829 stack offset on the address. */
830 write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
831 }
832 else if (nargs > 0)
833 {
834 type = VALUE_TYPE (args[0]);
835 len = TYPE_LENGTH (type);
836
837 /* First argument is passed in D and X registers. */
838 if (len <= 4)
839 {
840 LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
841 first_stack_argnum = 1;
842 write_register (HARD_D_REGNUM, v);
843 if (len > 2)
844 {
845 v >>= 16;
846 write_register (HARD_X_REGNUM, v);
847 }
848 }
849 }
850 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
851 {
852 type = VALUE_TYPE (args[argnum]);
853 stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
854 }
855 sp -= stack_alloc;
856
857 stack_offset = STACK_CORRECTION;
858 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
859 {
860 type = VALUE_TYPE (args[argnum]);
861 len = TYPE_LENGTH (type);
862
863 val = (char*) VALUE_CONTENTS (args[argnum]);
864 write_memory (sp + stack_offset, val, len);
865 stack_offset += len;
866 if (len & 1)
867 {
868 static char zero = 0;
869
870 write_memory (sp + stack_offset, &zero, 1);
871 stack_offset++;
872 }
873 }
874 return sp;
875}
876
877
878/* Return a location where we can set a breakpoint that will be hit
879 when an inferior function call returns. */
880CORE_ADDR
881m68hc11_call_dummy_address (void)
882{
883 return entry_point_address ();
884}
885
886static struct type *
887m68hc11_register_virtual_type (int reg_nr)
888{
889 return builtin_type_uint16;
890}
891
892static void
893m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
894{
895 /* The struct address computed by gdb is on the stack.
896 It uses the stack pointer so we must apply the stack
897 correction offset. */
898 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
899}
900
901static void
902m68hc11_store_return_value (struct type *type, char *valbuf)
903{
904 int len;
905
906 len = TYPE_LENGTH (type);
907
908 /* First argument is passed in D and X registers. */
909 if (len <= 4)
910 {
911 LONGEST v = extract_unsigned_integer (valbuf, len);
912
913 write_register (HARD_D_REGNUM, v);
914 if (len > 2)
915 {
916 v >>= 16;
917 write_register (HARD_X_REGNUM, v);
918 }
919 }
920 else
921 error ("return of value > 4 is not supported.");
922}
923
924
925/* Given a return value in `regbuf' with a type `type',
926 extract and copy its value into `valbuf'. */
927
928static void
929m68hc11_extract_return_value (struct type *type,
930 char *regbuf,
931 char *valbuf)
932{
933 int len = TYPE_LENGTH (type);
934
935 switch (len)
936 {
937 case 1:
938 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2 + 1], len);
939 break;
940
941 case 2:
942 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2], len);
943 break;
944
945 case 3:
946 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2 + 1], 1);
947 memcpy (&valbuf[1], &regbuf[HARD_D_REGNUM * 2], 2);
948 break;
949
950 case 4:
951 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2], 2);
952 memcpy (&valbuf[2], &regbuf[HARD_D_REGNUM * 2], 2);
953 break;
954
955 default:
956 error ("bad size for return value");
957 }
958}
959
960/* Should call_function allocate stack space for a struct return? */
961static int
962m68hc11_use_struct_convention (int gcc_p, struct type *type)
963{
964 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
965 || TYPE_CODE (type) == TYPE_CODE_UNION
966 || TYPE_LENGTH (type) > 4);
967}
968
969static int
970m68hc11_return_value_on_stack (struct type *type)
971{
972 return TYPE_LENGTH (type) > 4;
973}
974
975/* Extract from an array REGBUF containing the (raw) register state
976 the address in which a function should return its structure value,
977 as a CORE_ADDR (or an expression that can be used as one). */
978static CORE_ADDR
979m68hc11_extract_struct_value_address (char *regbuf)
980{
981 return extract_address (&regbuf[HARD_D_REGNUM * 2],
982 REGISTER_RAW_SIZE (HARD_D_REGNUM));
983}
984
985/* Function: push_return_address (pc)
986 Set up the return address for the inferior function call.
987 Needed for targets where we don't actually execute a JSR/BSR instruction */
988
989static CORE_ADDR
990m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
991{
992 char valbuf[2];
993
994 pc = CALL_DUMMY_ADDRESS ();
995 sp -= 2;
996 store_unsigned_integer (valbuf, 2, pc);
997 write_memory (sp + STACK_CORRECTION, valbuf, 2);
998 return sp;
999}
1000
1001/* Index within `registers' of the first byte of the space for
1002 register N. */
1003static int
1004m68hc11_register_byte (int reg_nr)
1005{
1006 return (reg_nr * M68HC11_REG_SIZE);
1007}
1008
1009static int
1010m68hc11_register_raw_size (int reg_nr)
1011{
1012 return M68HC11_REG_SIZE;
1013}
1014
1015static int
1016gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1017{
1018 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1019 return print_insn_m68hc11 (memaddr, info);
1020 else
1021 return print_insn_m68hc12 (memaddr, info);
1022}
1023
1024static struct gdbarch *
1025m68hc11_gdbarch_init (struct gdbarch_info info,
1026 struct gdbarch_list *arches)
1027{
1028 static LONGEST m68hc11_call_dummy_words[] =
1029 {0};
1030 struct gdbarch *gdbarch;
1031 struct gdbarch_tdep *tdep;
1032
1033 soft_reg_initialized = 0;
1034
1035 /* try to find a pre-existing architecture */
1036 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1037 arches != NULL;
1038 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1039 {
1040 return arches->gdbarch;
1041 }
1042
1043 /* Need a new architecture. Fill in a target specific vector. */
1044 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1045 gdbarch = gdbarch_alloc (&info, tdep);
1046
1047 switch (info.bfd_arch_info->arch)
1048 {
1049 case bfd_arch_m68hc11:
1050 tdep->stack_correction = 1;
1051 tdep->prologue = m6811_prologue;
1052 break;
1053
1054 case bfd_arch_m68hc12:
1055 tdep->stack_correction = 0;
1056 tdep->prologue = m6812_prologue;
1057 break;
1058
1059 default:
1060 break;
1061 }
1062
1063 /* Initially set everything according to the ABI.
1064 Use 16-bit integers since it will be the case for most
1065 programs. The size of these types should normally be set
1066 according to the dwarf2 debug information. */
1067 set_gdbarch_short_bit (gdbarch, 16);
1068 set_gdbarch_int_bit (gdbarch, 16);
1069 set_gdbarch_float_bit (gdbarch, 32);
1070 set_gdbarch_double_bit (gdbarch, 64);
1071 set_gdbarch_long_double_bit (gdbarch, 64);
1072 set_gdbarch_long_bit (gdbarch, 32);
1073 set_gdbarch_ptr_bit (gdbarch, 16);
1074 set_gdbarch_long_long_bit (gdbarch, 64);
1075
1076 /* Set register info. */
1077 set_gdbarch_fp0_regnum (gdbarch, -1);
1078 set_gdbarch_max_register_raw_size (gdbarch, 2);
1079 set_gdbarch_max_register_virtual_size (gdbarch, 2);
1080 set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size);
1081 set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size);
1082 set_gdbarch_register_byte (gdbarch, m68hc11_register_byte);
1083 set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
1084 set_gdbarch_frame_args_skip (gdbarch, 0);
1085
1086 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1087 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1088 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1089 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1090 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1091
1092 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1093 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1094 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1095 set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
1096 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1097 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1098 set_gdbarch_register_size (gdbarch, 2);
1099 set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
1100 set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
1101 set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register);
1102 set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register);
1103
1104 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1105 set_gdbarch_call_dummy_length (gdbarch, 0);
1106 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1107 set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address);
1108 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
1109 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1110 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1111 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1112 set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
1113 set_gdbarch_sizeof_call_dummy_words (gdbarch,
1114 sizeof (m68hc11_call_dummy_words));
1115 set_gdbarch_call_dummy_p (gdbarch, 1);
1116 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1117 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1118 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1119 set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value);
1120 set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
1121 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1122 set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
1123 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1124
1125 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1126 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1127 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1128 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
1129
1130
1131 set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain);
1132 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1133 set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
1134 set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address);
1135 set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address);
1136 set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
1137 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1138
1139 set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
1140 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1141
1142 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1143 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1144 set_gdbarch_deprecated_extract_struct_value_address
1145 (gdbarch, m68hc11_extract_struct_value_address);
1146 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1147 set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
1148 set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame);
1149 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1150 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1151 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1152 set_gdbarch_function_start_offset (gdbarch, 0);
1153 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1154 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
1155 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1156
1157 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1158
1159 return gdbarch;
1160}
1161
1162void
1163_initialize_m68hc11_tdep (void)
1164{
1165 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1166 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1167
1168 add_com ("regs", class_vars, show_regs, "Print all registers");
1169}
1170
GDB Binutils - Deliverables
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