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1/* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@nerim.fr
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21
22#include "defs.h"
23#include "frame.h"
24#include "symtab.h"
25#include "gdbtypes.h"
26#include "gdbcmd.h"
27#include "gdbcore.h"
28#include "gdb_string.h"
29#include "value.h"
30#include "inferior.h"
31#include "dis-asm.h"
32#include "symfile.h"
33#include "objfiles.h"
34#include "arch-utils.h"
35#include "regcache.h"
36#include "reggroups.h"
37
38#include "target.h"
39#include "opcode/m68hc11.h"
40#include "elf/m68hc11.h"
41#include "elf-bfd.h"
42
43/* Macros for setting and testing a bit in a minimal symbol.
44 For 68HC11/68HC12 we have two flags that tell which return
45 type the function is using. This is used for prologue and frame
46 analysis to compute correct stack frame layout.
47
48 The MSB of the minimal symbol's "info" field is used for this purpose.
49 This field is already being used to store the symbol size, so the
50 assumption is that the symbol size cannot exceed 2^30.
51
52 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
53 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
54 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
55 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
56 MSYMBOL_SIZE Returns the size of the minimal symbol,
57 i.e. the "info" field with the "special" bit
58 masked out. */
59
60#define MSYMBOL_SET_RTC(msym) \
61 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
62 | 0x80000000)
63
64#define MSYMBOL_SET_RTI(msym) \
65 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
66 | 0x40000000)
67
68#define MSYMBOL_IS_RTC(msym) \
69 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
70
71#define MSYMBOL_IS_RTI(msym) \
72 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
73
74#define MSYMBOL_SIZE(msym) \
75 ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
76
77enum insn_return_kind {
78 RETURN_RTS,
79 RETURN_RTC,
80 RETURN_RTI
81};
82
83
84/* Register numbers of various important registers.
85 Note that some of these values are "real" register numbers,
86 and correspond to the general registers of the machine,
87 and some are "phony" register numbers which are too large
88 to be actual register numbers as far as the user is concerned
89 but do serve to get the desired values when passed to read_register. */
90
91#define HARD_X_REGNUM 0
92#define HARD_D_REGNUM 1
93#define HARD_Y_REGNUM 2
94#define HARD_SP_REGNUM 3
95#define HARD_PC_REGNUM 4
96
97#define HARD_A_REGNUM 5
98#define HARD_B_REGNUM 6
99#define HARD_CCR_REGNUM 7
100
101/* 68HC12 page number register.
102 Note: to keep a compatibility with gcc register naming, we must
103 not have to rename FP and other soft registers. The page register
104 is a real hard register and must therefore be counted by NUM_REGS.
105 For this it has the same number as Z register (which is not used). */
106#define HARD_PAGE_REGNUM 8
107#define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
108
109/* Z is replaced by X or Y by gcc during machine reorg.
110 ??? There is no way to get it and even know whether
111 it's in X or Y or in ZS. */
112#define SOFT_Z_REGNUM 8
113
114/* Soft registers. These registers are special. There are treated
115 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
116 They are physically located in memory. */
117#define SOFT_FP_REGNUM 9
118#define SOFT_TMP_REGNUM 10
119#define SOFT_ZS_REGNUM 11
120#define SOFT_XY_REGNUM 12
121#define SOFT_UNUSED_REGNUM 13
122#define SOFT_D1_REGNUM 14
123#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
124#define M68HC11_MAX_SOFT_REGS 32
125
126#define M68HC11_NUM_REGS (8)
127#define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
128#define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
129
130#define M68HC11_REG_SIZE (2)
131
132#define M68HC12_NUM_REGS (9)
133#define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
134#define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
135
136struct insn_sequence;
137struct gdbarch_tdep
138 {
139 /* Stack pointer correction value. For 68hc11, the stack pointer points
140 to the next push location. An offset of 1 must be applied to obtain
141 the address where the last value is saved. For 68hc12, the stack
142 pointer points to the last value pushed. No offset is necessary. */
143 int stack_correction;
144
145 /* Description of instructions in the prologue. */
146 struct insn_sequence *prologue;
147
148 /* True if the page memory bank register is available
149 and must be used. */
150 int use_page_register;
151
152 /* ELF flags for ABI. */
153 int elf_flags;
154 };
155
156#define M6811_TDEP gdbarch_tdep (current_gdbarch)
157#define STACK_CORRECTION (M6811_TDEP->stack_correction)
158#define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
159
160struct frame_extra_info
161{
162 CORE_ADDR return_pc;
163 int frameless;
164 int size;
165 enum insn_return_kind return_kind;
166};
167
168/* Table of registers for 68HC11. This includes the hard registers
169 and the soft registers used by GCC. */
170static char *
171m68hc11_register_names[] =
172{
173 "x", "d", "y", "sp", "pc", "a", "b",
174 "ccr", "page", "frame","tmp", "zs", "xy", 0,
175 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
176 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
177 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
178 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
179 "d29", "d30", "d31", "d32"
180};
181
182struct m68hc11_soft_reg
183{
184 const char *name;
185 CORE_ADDR addr;
186};
187
188static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
189
190#define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
191
192static int soft_min_addr;
193static int soft_max_addr;
194static int soft_reg_initialized = 0;
195
196/* Look in the symbol table for the address of a pseudo register
197 in memory. If we don't find it, pretend the register is not used
198 and not available. */
199static void
200m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
201{
202 struct minimal_symbol *msymbol;
203
204 msymbol = lookup_minimal_symbol (name, NULL, NULL);
205 if (msymbol)
206 {
207 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
208 reg->name = xstrdup (name);
209
210 /* Keep track of the address range for soft registers. */
211 if (reg->addr < (CORE_ADDR) soft_min_addr)
212 soft_min_addr = reg->addr;
213 if (reg->addr > (CORE_ADDR) soft_max_addr)
214 soft_max_addr = reg->addr;
215 }
216 else
217 {
218 reg->name = 0;
219 reg->addr = 0;
220 }
221}
222
223/* Initialize the table of soft register addresses according
224 to the symbol table. */
225 static void
226m68hc11_initialize_register_info (void)
227{
228 int i;
229
230 if (soft_reg_initialized)
231 return;
232
233 soft_min_addr = INT_MAX;
234 soft_max_addr = 0;
235 for (i = 0; i < M68HC11_ALL_REGS; i++)
236 {
237 soft_regs[i].name = 0;
238 }
239
240 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
241 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
242 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
243 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
244 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
245
246 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
247 {
248 char buf[10];
249
250 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
251 m68hc11_get_register_info (&soft_regs[i], buf);
252 }
253
254 if (soft_regs[SOFT_FP_REGNUM].name == 0)
255 {
256 warning ("No frame soft register found in the symbol table.\n");
257 warning ("Stack backtrace will not work.\n");
258 }
259 soft_reg_initialized = 1;
260}
261
262/* Given an address in memory, return the soft register number if
263 that address corresponds to a soft register. Returns -1 if not. */
264static int
265m68hc11_which_soft_register (CORE_ADDR addr)
266{
267 int i;
268
269 if (addr < soft_min_addr || addr > soft_max_addr)
270 return -1;
271
272 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
273 {
274 if (soft_regs[i].name && soft_regs[i].addr == addr)
275 return i;
276 }
277 return -1;
278}
279
280/* Fetch a pseudo register. The 68hc11 soft registers are treated like
281 pseudo registers. They are located in memory. Translate the register
282 fetch into a memory read. */
283static void
284m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
285 struct regcache *regcache,
286 int regno, void *buf)
287{
288 /* The PC is a pseudo reg only for 68HC12 with the memory bank
289 addressing mode. */
290 if (regno == M68HC12_HARD_PC_REGNUM)
291 {
292 const int regsize = TYPE_LENGTH (builtin_type_uint32);
293 CORE_ADDR pc = read_register (HARD_PC_REGNUM);
294 int page = read_register (HARD_PAGE_REGNUM);
295
296 if (pc >= 0x8000 && pc < 0xc000)
297 {
298 pc -= 0x8000;
299 pc += (page << 14);
300 pc += 0x1000000;
301 }
302 store_unsigned_integer (buf, regsize, pc);
303 return;
304 }
305
306 m68hc11_initialize_register_info ();
307
308 /* Fetch a soft register: translate into a memory read. */
309 if (soft_regs[regno].name)
310 {
311 target_read_memory (soft_regs[regno].addr, buf, 2);
312 }
313 else
314 {
315 memset (buf, 0, 2);
316 }
317}
318
319/* Store a pseudo register. Translate the register store
320 into a memory write. */
321static void
322m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
323 struct regcache *regcache,
324 int regno, const void *buf)
325{
326 /* The PC is a pseudo reg only for 68HC12 with the memory bank
327 addressing mode. */
328 if (regno == M68HC12_HARD_PC_REGNUM)
329 {
330 const int regsize = TYPE_LENGTH (builtin_type_uint32);
331 char *tmp = alloca (regsize);
332 CORE_ADDR pc;
333
334 memcpy (tmp, buf, regsize);
335 pc = extract_unsigned_integer (tmp, regsize);
336 if (pc >= 0x1000000)
337 {
338 pc -= 0x1000000;
339 write_register (HARD_PAGE_REGNUM, (pc >> 14) & 0x0ff);
340 pc &= 0x03fff;
341 write_register (HARD_PC_REGNUM, pc + 0x8000);
342 }
343 else
344 write_register (HARD_PC_REGNUM, pc);
345 return;
346 }
347
348 m68hc11_initialize_register_info ();
349
350 /* Store a soft register: translate into a memory write. */
351 if (soft_regs[regno].name)
352 {
353 const int regsize = 2;
354 char *tmp = alloca (regsize);
355 memcpy (tmp, buf, regsize);
356 target_write_memory (soft_regs[regno].addr, tmp, regsize);
357 }
358}
359
360static const char *
361m68hc11_register_name (int reg_nr)
362{
363 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
364 return "pc";
365 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
366 return "ppc";
367
368 if (reg_nr < 0)
369 return NULL;
370 if (reg_nr >= M68HC11_ALL_REGS)
371 return NULL;
372
373 /* If we don't know the address of a soft register, pretend it
374 does not exist. */
375 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
376 return NULL;
377 return m68hc11_register_names[reg_nr];
378}
379
380static const unsigned char *
381m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
382{
383 static unsigned char breakpoint[] = {0x0};
384
385 *lenptr = sizeof (breakpoint);
386 return breakpoint;
387}
388
389/* Immediately after a function call, return the saved pc before the frame
390 is setup. */
391
392static CORE_ADDR
393m68hc11_saved_pc_after_call (struct frame_info *frame)
394{
395 CORE_ADDR addr;
396
397 addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
398 addr &= 0x0ffff;
399 return read_memory_integer (addr, 2) & 0x0FFFF;
400}
401
402static CORE_ADDR
403m68hc11_frame_saved_pc (struct frame_info *frame)
404{
405 return get_frame_extra_info (frame)->return_pc;
406}
407
408static CORE_ADDR
409m68hc11_frame_args_address (struct frame_info *frame)
410{
411 CORE_ADDR addr;
412
413 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION + 2;
414 if (get_frame_extra_info (frame)->return_kind == RETURN_RTC)
415 addr += 1;
416 else if (get_frame_extra_info (frame)->return_kind == RETURN_RTI)
417 addr += 7;
418
419 return addr;
420}
421
422static CORE_ADDR
423m68hc11_frame_locals_address (struct frame_info *frame)
424{
425 return get_frame_base (frame);
426}
427
428/* Discard from the stack the innermost frame, restoring all saved
429 registers. */
430
431static void
432m68hc11_pop_frame (void)
433{
434 register struct frame_info *frame = get_current_frame ();
435 register CORE_ADDR fp, sp;
436 register int regnum;
437
438 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
439 get_frame_base (frame),
440 get_frame_base (frame)))
441 generic_pop_dummy_frame ();
442 else
443 {
444 fp = get_frame_base (frame);
445 FRAME_INIT_SAVED_REGS (frame);
446
447 /* Copy regs from where they were saved in the frame. */
448 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
449 if (get_frame_saved_regs (frame)[regnum])
450 write_register (regnum,
451 read_memory_integer (get_frame_saved_regs (frame)[regnum], 2));
452
453 write_register (HARD_PC_REGNUM, get_frame_extra_info (frame)->return_pc);
454 sp = (fp + get_frame_extra_info (frame)->size + 2) & 0x0ffff;
455 write_register (HARD_SP_REGNUM, sp);
456 }
457 flush_cached_frames ();
458}
459
460\f
461/* 68HC11 & 68HC12 prologue analysis.
462
463 */
464#define MAX_CODES 12
465
466/* 68HC11 opcodes. */
467#undef M6811_OP_PAGE2
468#define M6811_OP_PAGE2 (0x18)
469#define M6811_OP_LDX (0xde)
470#define M6811_OP_PSHX (0x3c)
471#define M6811_OP_STS (0x9f)
472#define M6811_OP_TSX (0x30)
473#define M6811_OP_XGDX (0x8f)
474#define M6811_OP_ADDD (0xc3)
475#define M6811_OP_TXS (0x35)
476#define M6811_OP_DES (0x34)
477
478/* 68HC12 opcodes. */
479#define M6812_OP_PAGE2 (0x18)
480#define M6812_OP_MOVW (0x01)
481#define M6812_PB_PSHW (0xae)
482#define M6812_OP_STS (0x7f)
483#define M6812_OP_LEAS (0x1b)
484#define M6812_OP_PSHX (0x34)
485#define M6812_OP_PSHY (0x35)
486
487/* Operand extraction. */
488#define OP_DIRECT (0x100) /* 8-byte direct addressing. */
489#define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
490#define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
491#define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
492
493/* Identification of the sequence. */
494enum m6811_seq_type
495{
496 P_LAST = 0,
497 P_SAVE_REG, /* Save a register on the stack. */
498 P_SET_FRAME, /* Setup the frame pointer. */
499 P_LOCAL_1, /* Allocate 1 byte for locals. */
500 P_LOCAL_2, /* Allocate 2 bytes for locals. */
501 P_LOCAL_N /* Allocate N bytes for locals. */
502};
503
504struct insn_sequence {
505 enum m6811_seq_type type;
506 unsigned length;
507 unsigned short code[MAX_CODES];
508};
509
510/* Sequence of instructions in the 68HC11 function prologue. */
511static struct insn_sequence m6811_prologue[] = {
512 /* Sequences to save a soft-register. */
513 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
514 M6811_OP_PSHX } },
515 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
516 M6811_OP_PAGE2, M6811_OP_PSHX } },
517
518 /* Sequences to allocate local variables. */
519 { P_LOCAL_N, 7, { M6811_OP_TSX,
520 M6811_OP_XGDX,
521 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
522 M6811_OP_XGDX,
523 M6811_OP_TXS } },
524 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
525 M6811_OP_PAGE2, M6811_OP_XGDX,
526 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
527 M6811_OP_PAGE2, M6811_OP_XGDX,
528 M6811_OP_PAGE2, M6811_OP_TXS } },
529 { P_LOCAL_1, 1, { M6811_OP_DES } },
530 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
531 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
532
533 /* Initialize the frame pointer. */
534 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
535 { P_LAST, 0, { 0 } }
536};
537
538
539/* Sequence of instructions in the 68HC12 function prologue. */
540static struct insn_sequence m6812_prologue[] = {
541 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
542 OP_IMM_HIGH, OP_IMM_LOW } },
543 { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } },
544 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
545 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
546 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
547 { P_LAST, 0 }
548};
549
550
551/* Analyze the sequence of instructions starting at the given address.
552 Returns a pointer to the sequence when it is recognized and
553 the optional value (constant/address) associated with it.
554 Advance the pc for the next sequence. */
555static struct insn_sequence *
556m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
557 CORE_ADDR *val)
558{
559 unsigned char buffer[MAX_CODES];
560 unsigned bufsize;
561 unsigned j;
562 CORE_ADDR cur_val;
563 short v = 0;
564
565 bufsize = 0;
566 for (; seq->type != P_LAST; seq++)
567 {
568 cur_val = 0;
569 for (j = 0; j < seq->length; j++)
570 {
571 if (bufsize < j + 1)
572 {
573 buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
574 1);
575 bufsize++;
576 }
577 /* Continue while we match the opcode. */
578 if (seq->code[j] == buffer[j])
579 continue;
580
581 if ((seq->code[j] & 0xf00) == 0)
582 break;
583
584 /* Extract a sequence parameter (address or constant). */
585 switch (seq->code[j])
586 {
587 case OP_DIRECT:
588 cur_val = (CORE_ADDR) buffer[j];
589 break;
590
591 case OP_IMM_HIGH:
592 cur_val = cur_val & 0x0ff;
593 cur_val |= (buffer[j] << 8);
594 break;
595
596 case OP_IMM_LOW:
597 cur_val &= 0x0ff00;
598 cur_val |= buffer[j];
599 break;
600
601 case OP_PBYTE:
602 if ((buffer[j] & 0xE0) == 0x80)
603 {
604 v = buffer[j] & 0x1f;
605 if (v & 0x10)
606 v |= 0xfff0;
607 }
608 else if ((buffer[j] & 0xfe) == 0xf0)
609 {
610 v = read_memory_unsigned_integer (*pc + j + 1, 1);
611 if (buffer[j] & 1)
612 v |= 0xff00;
613 *pc = *pc + 1;
614 }
615 else if (buffer[j] == 0xf2)
616 {
617 v = read_memory_unsigned_integer (*pc + j + 1, 2);
618 *pc = *pc + 2;
619 }
620 cur_val = v;
621 break;
622 }
623 }
624
625 /* We have a full match. */
626 if (j == seq->length)
627 {
628 *val = cur_val;
629 *pc = *pc + j;
630 return seq;
631 }
632 }
633 return 0;
634}
635
636/* Return the instruction that the function at the PC is using. */
637static enum insn_return_kind
638m68hc11_get_return_insn (CORE_ADDR pc)
639{
640 struct minimal_symbol *sym;
641
642 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
643 function is stored by elfread.c in the high bit of the info field.
644 Use this to decide which instruction the function uses to return. */
645 sym = lookup_minimal_symbol_by_pc (pc);
646 if (sym == 0)
647 return RETURN_RTS;
648
649 if (MSYMBOL_IS_RTC (sym))
650 return RETURN_RTC;
651 else if (MSYMBOL_IS_RTI (sym))
652 return RETURN_RTI;
653 else
654 return RETURN_RTS;
655}
656
657
658/* Analyze the function prologue to find some information
659 about the function:
660 - the PC of the first line (for m68hc11_skip_prologue)
661 - the offset of the previous frame saved address (from current frame)
662 - the soft registers which are pushed. */
663static void
664m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
665 CORE_ADDR *first_line,
666 int *frame_offset, CORE_ADDR *pushed_regs)
667{
668 CORE_ADDR save_addr;
669 CORE_ADDR func_end;
670 int size;
671 int found_frame_point;
672 int saved_reg;
673 CORE_ADDR first_pc;
674 int done = 0;
675 struct insn_sequence *seq_table;
676
677 first_pc = get_pc_function_start (pc);
678 size = 0;
679
680 m68hc11_initialize_register_info ();
681 if (first_pc == 0)
682 {
683 *frame_offset = 0;
684 *first_line = pc;
685 return;
686 }
687
688 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
689
690 /* The 68hc11 stack is as follows:
691
692
693 | |
694 +-----------+
695 | |
696 | args |
697 | |
698 +-----------+
699 | PC-return |
700 +-----------+
701 | Old frame |
702 +-----------+
703 | |
704 | Locals |
705 | |
706 +-----------+ <--- current frame
707 | |
708
709 With most processors (like 68K) the previous frame can be computed
710 easily because it is always at a fixed offset (see link/unlink).
711 That is, locals are accessed with negative offsets, arguments are
712 accessed with positive ones. Since 68hc11 only supports offsets
713 in the range [0..255], the frame is defined at the bottom of
714 locals (see picture).
715
716 The purpose of the analysis made here is to find out the size
717 of locals in this function. An alternative to this is to use
718 DWARF2 info. This would be better but I don't know how to
719 access dwarf2 debug from this function.
720
721 Walk from the function entry point to the point where we save
722 the frame. While walking instructions, compute the size of bytes
723 which are pushed. This gives us the index to access the previous
724 frame.
725
726 We limit the search to 128 bytes so that the algorithm is bounded
727 in case of random and wrong code. We also stop and abort if
728 we find an instruction which is not supposed to appear in the
729 prologue (as generated by gcc 2.95, 2.96).
730 */
731 pc = first_pc;
732 func_end = pc + 128;
733 found_frame_point = 0;
734 *frame_offset = 0;
735 save_addr = fp + STACK_CORRECTION;
736 while (!done && pc + 2 < func_end)
737 {
738 struct insn_sequence *seq;
739 CORE_ADDR val;
740
741 seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
742 if (seq == 0)
743 break;
744
745 if (seq->type == P_SAVE_REG)
746 {
747 if (found_frame_point)
748 {
749 saved_reg = m68hc11_which_soft_register (val);
750 if (saved_reg < 0)
751 break;
752
753 save_addr -= 2;
754 if (pushed_regs)
755 pushed_regs[saved_reg] = save_addr;
756 }
757 else
758 {
759 size += 2;
760 }
761 }
762 else if (seq->type == P_SET_FRAME)
763 {
764 found_frame_point = 1;
765 *frame_offset = size;
766 }
767 else if (seq->type == P_LOCAL_1)
768 {
769 size += 1;
770 }
771 else if (seq->type == P_LOCAL_2)
772 {
773 size += 2;
774 }
775 else if (seq->type == P_LOCAL_N)
776 {
777 /* Stack pointer is decremented for the allocation. */
778 if (val & 0x8000)
779 size -= (int) (val) | 0xffff0000;
780 else
781 size -= val;
782 }
783 }
784 *first_line = pc;
785}
786
787static CORE_ADDR
788m68hc11_skip_prologue (CORE_ADDR pc)
789{
790 CORE_ADDR func_addr, func_end;
791 struct symtab_and_line sal;
792 int frame_offset;
793
794 /* If we have line debugging information, then the end of the
795 prologue should be the first assembly instruction of the
796 first source line. */
797 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
798 {
799 sal = find_pc_line (func_addr, 0);
800 if (sal.end && sal.end < func_end)
801 return sal.end;
802 }
803
804 m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
805 return pc;
806}
807
808/* Given a GDB frame, determine the address of the calling function's
809 frame. This will be used to create a new GDB frame struct, and
810 then INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC will be
811 called for the new frame. */
812
813static CORE_ADDR
814m68hc11_frame_chain (struct frame_info *frame)
815{
816 CORE_ADDR addr;
817
818 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
819 get_frame_base (frame),
820 get_frame_base (frame)))
821 return get_frame_base (frame); /* dummy frame same as caller's frame */
822
823 if (get_frame_extra_info (frame)->return_pc == 0
824 || inside_entry_file (get_frame_extra_info (frame)->return_pc))
825 return (CORE_ADDR) 0;
826
827 if (get_frame_base (frame) == 0)
828 {
829 return (CORE_ADDR) 0;
830 }
831
832 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION - 2;
833 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
834 return addr;
835}
836
837/* Put here the code to store, into a struct frame_saved_regs, the
838 addresses of the saved registers of frame described by FRAME_INFO.
839 This includes special registers such as pc and fp saved in special
840 ways in the stack frame. sp is even more special: the address we
841 return for it IS the sp for the next frame. */
842static void
843m68hc11_frame_init_saved_regs (struct frame_info *fi)
844{
845 CORE_ADDR pc;
846 CORE_ADDR addr;
847
848 if (get_frame_saved_regs (fi) == NULL)
849 frame_saved_regs_zalloc (fi);
850 else
851 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
852
853 pc = get_frame_pc (fi);
854 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (pc);
855 m68hc11_guess_from_prologue (pc, get_frame_base (fi), &pc,
856 &get_frame_extra_info (fi)->size,
857 get_frame_saved_regs (fi));
858
859 addr = get_frame_base (fi) + get_frame_extra_info (fi)->size + STACK_CORRECTION;
860 if (soft_regs[SOFT_FP_REGNUM].name)
861 get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2;
862
863 /* Take into account how the function was called/returns. */
864 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC)
865 {
866 get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr;
867 addr++;
868 }
869 else if (get_frame_extra_info (fi)->return_kind == RETURN_RTI)
870 {
871 get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr;
872 get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1;
873 get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3;
874 get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5;
875 addr += 7;
876 }
877 get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr;
878 get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM];
879}
880
881static void
882m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
883{
884 CORE_ADDR addr;
885
886 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
887
888 if (get_next_frame (fi))
889 deprecated_update_frame_pc_hack (fi, FRAME_SAVED_PC (get_next_frame (fi)));
890
891 m68hc11_frame_init_saved_regs (fi);
892
893 if (fromleaf)
894 {
895 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (get_frame_pc (fi));
896 get_frame_extra_info (fi)->return_pc = m68hc11_saved_pc_after_call (fi);
897 }
898 else
899 {
900 addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM];
901 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
902
903 /* Take into account the 68HC12 specific call (PC + page). */
904 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC
905 && addr >= 0x08000 && addr < 0x0c000
906 && USE_PAGE_REGISTER)
907 {
908 CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM];
909
910 unsigned page = read_memory_unsigned_integer (page_addr, 1);
911 addr -= 0x08000;
912 addr += ((page & 0x0ff) << 14);
913 addr += 0x1000000;
914 }
915 get_frame_extra_info (fi)->return_pc = addr;
916 }
917}
918
919/* Same as 'info reg' but prints the registers in a different way. */
920static void
921show_regs (char *args, int from_tty)
922{
923 int ccr = read_register (HARD_CCR_REGNUM);
924 int i;
925 int nr;
926
927 printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
928 (int) read_register (HARD_PC_REGNUM),
929 (int) read_register (HARD_SP_REGNUM),
930 (int) read_register (SOFT_FP_REGNUM),
931 ccr,
932 ccr & M6811_S_BIT ? 'S' : '-',
933 ccr & M6811_X_BIT ? 'X' : '-',
934 ccr & M6811_H_BIT ? 'H' : '-',
935 ccr & M6811_I_BIT ? 'I' : '-',
936 ccr & M6811_N_BIT ? 'N' : '-',
937 ccr & M6811_Z_BIT ? 'Z' : '-',
938 ccr & M6811_V_BIT ? 'V' : '-',
939 ccr & M6811_C_BIT ? 'C' : '-');
940
941 printf_filtered ("D=%04x IX=%04x IY=%04x",
942 (int) read_register (HARD_D_REGNUM),
943 (int) read_register (HARD_X_REGNUM),
944 (int) read_register (HARD_Y_REGNUM));
945
946 if (USE_PAGE_REGISTER)
947 {
948 printf_filtered (" Page=%02x",
949 (int) read_register (HARD_PAGE_REGNUM));
950 }
951 printf_filtered ("\n");
952
953 nr = 0;
954 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
955 {
956 /* Skip registers which are not defined in the symbol table. */
957 if (soft_regs[i].name == 0)
958 continue;
959
960 printf_filtered ("D%d=%04x",
961 i - SOFT_D1_REGNUM + 1,
962 (int) read_register (i));
963 nr++;
964 if ((nr % 8) == 7)
965 printf_filtered ("\n");
966 else
967 printf_filtered (" ");
968 }
969 if (nr && (nr % 8) != 7)
970 printf_filtered ("\n");
971}
972
973static CORE_ADDR
974m68hc11_stack_align (CORE_ADDR addr)
975{
976 return ((addr + 1) & -2);
977}
978
979static CORE_ADDR
980m68hc11_push_arguments (int nargs,
981 struct value **args,
982 CORE_ADDR sp,
983 int struct_return,
984 CORE_ADDR struct_addr)
985{
986 int stack_alloc;
987 int argnum;
988 int first_stack_argnum;
989 int stack_offset;
990 struct type *type;
991 char *val;
992 int len;
993
994 stack_alloc = 0;
995 first_stack_argnum = 0;
996 if (struct_return)
997 {
998 /* The struct is allocated on the stack and gdb used the stack
999 pointer for the address of that struct. We must apply the
1000 stack offset on the address. */
1001 write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
1002 }
1003 else if (nargs > 0)
1004 {
1005 type = VALUE_TYPE (args[0]);
1006 len = TYPE_LENGTH (type);
1007
1008 /* First argument is passed in D and X registers. */
1009 if (len <= 4)
1010 {
1011 LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
1012 first_stack_argnum = 1;
1013 write_register (HARD_D_REGNUM, v);
1014 if (len > 2)
1015 {
1016 v >>= 16;
1017 write_register (HARD_X_REGNUM, v);
1018 }
1019 }
1020 }
1021 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
1022 {
1023 type = VALUE_TYPE (args[argnum]);
1024 stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
1025 }
1026 sp -= stack_alloc;
1027
1028 stack_offset = STACK_CORRECTION;
1029 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
1030 {
1031 type = VALUE_TYPE (args[argnum]);
1032 len = TYPE_LENGTH (type);
1033
1034 val = (char*) VALUE_CONTENTS (args[argnum]);
1035 write_memory (sp + stack_offset, val, len);
1036 stack_offset += len;
1037 if (len & 1)
1038 {
1039 static char zero = 0;
1040
1041 write_memory (sp + stack_offset, &zero, 1);
1042 stack_offset++;
1043 }
1044 }
1045 return sp;
1046}
1047
1048
1049/* Return a location where we can set a breakpoint that will be hit
1050 when an inferior function call returns. */
1051CORE_ADDR
1052m68hc11_call_dummy_address (void)
1053{
1054 return entry_point_address ();
1055}
1056
1057static struct type *
1058m68hc11_register_virtual_type (int reg_nr)
1059{
1060 switch (reg_nr)
1061 {
1062 case HARD_PAGE_REGNUM:
1063 case HARD_A_REGNUM:
1064 case HARD_B_REGNUM:
1065 case HARD_CCR_REGNUM:
1066 return builtin_type_uint8;
1067
1068 case M68HC12_HARD_PC_REGNUM:
1069 return builtin_type_uint32;
1070
1071 default:
1072 return builtin_type_uint16;
1073 }
1074}
1075
1076static void
1077m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1078{
1079 /* The struct address computed by gdb is on the stack.
1080 It uses the stack pointer so we must apply the stack
1081 correction offset. */
1082 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
1083}
1084
1085static void
1086m68hc11_store_return_value (struct type *type, char *valbuf)
1087{
1088 int len;
1089
1090 len = TYPE_LENGTH (type);
1091
1092 /* First argument is passed in D and X registers. */
1093 if (len <= 4)
1094 {
1095 LONGEST v = extract_unsigned_integer (valbuf, len);
1096
1097 write_register (HARD_D_REGNUM, v);
1098 if (len > 2)
1099 {
1100 v >>= 16;
1101 write_register (HARD_X_REGNUM, v);
1102 }
1103 }
1104 else
1105 error ("return of value > 4 is not supported.");
1106}
1107
1108
1109/* Given a return value in `regbuf' with a type `type',
1110 extract and copy its value into `valbuf'. */
1111
1112static void
1113m68hc11_extract_return_value (struct type *type,
1114 char *regbuf,
1115 char *valbuf)
1116{
1117 int len = TYPE_LENGTH (type);
1118
1119 switch (len)
1120 {
1121 case 1:
1122 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2 + 1], len);
1123 break;
1124
1125 case 2:
1126 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2], len);
1127 break;
1128
1129 case 3:
1130 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2 + 1], 1);
1131 memcpy (&valbuf[1], &regbuf[HARD_D_REGNUM * 2], 2);
1132 break;
1133
1134 case 4:
1135 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2], 2);
1136 memcpy (&valbuf[2], &regbuf[HARD_D_REGNUM * 2], 2);
1137 break;
1138
1139 default:
1140 error ("bad size for return value");
1141 }
1142}
1143
1144/* Should call_function allocate stack space for a struct return? */
1145static int
1146m68hc11_use_struct_convention (int gcc_p, struct type *type)
1147{
1148 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
1149 || TYPE_CODE (type) == TYPE_CODE_UNION
1150 || TYPE_LENGTH (type) > 4);
1151}
1152
1153static int
1154m68hc11_return_value_on_stack (struct type *type)
1155{
1156 return TYPE_LENGTH (type) > 4;
1157}
1158
1159/* Extract from an array REGBUF containing the (raw) register state
1160 the address in which a function should return its structure value,
1161 as a CORE_ADDR (or an expression that can be used as one). */
1162static CORE_ADDR
1163m68hc11_extract_struct_value_address (char *regbuf)
1164{
1165 return extract_address (&regbuf[HARD_D_REGNUM * 2],
1166 REGISTER_RAW_SIZE (HARD_D_REGNUM));
1167}
1168
1169/* Function: push_return_address (pc)
1170 Set up the return address for the inferior function call.
1171 Needed for targets where we don't actually execute a JSR/BSR instruction */
1172
1173static CORE_ADDR
1174m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1175{
1176 char valbuf[2];
1177
1178 pc = CALL_DUMMY_ADDRESS ();
1179 sp -= 2;
1180 store_unsigned_integer (valbuf, 2, pc);
1181 write_memory (sp + STACK_CORRECTION, valbuf, 2);
1182 return sp;
1183}
1184
1185/* Test whether the ELF symbol corresponds to a function using rtc or
1186 rti to return. */
1187
1188static void
1189m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1190{
1191 unsigned char flags;
1192
1193 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1194 if (flags & STO_M68HC12_FAR)
1195 MSYMBOL_SET_RTC (msym);
1196 if (flags & STO_M68HC12_INTERRUPT)
1197 MSYMBOL_SET_RTI (msym);
1198}
1199
1200static int
1201gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1202{
1203 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1204 return print_insn_m68hc11 (memaddr, info);
1205 else
1206 return print_insn_m68hc12 (memaddr, info);
1207}
1208
1209\f
1210
1211/* 68HC11/68HC12 register groups.
1212 Identify real hard registers and soft registers used by gcc. */
1213
1214static struct reggroup *m68hc11_soft_reggroup;
1215static struct reggroup *m68hc11_hard_reggroup;
1216
1217static void
1218m68hc11_init_reggroups (void)
1219{
1220 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1221 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1222}
1223
1224static void
1225m68hc11_add_reggroups (struct gdbarch *gdbarch)
1226{
1227 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1228 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1229 reggroup_add (gdbarch, general_reggroup);
1230 reggroup_add (gdbarch, float_reggroup);
1231 reggroup_add (gdbarch, all_reggroup);
1232 reggroup_add (gdbarch, save_reggroup);
1233 reggroup_add (gdbarch, restore_reggroup);
1234 reggroup_add (gdbarch, vector_reggroup);
1235 reggroup_add (gdbarch, system_reggroup);
1236}
1237
1238static int
1239m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1240 struct reggroup *group)
1241{
1242 /* We must save the real hard register as well as gcc
1243 soft registers including the frame pointer. */
1244 if (group == save_reggroup || group == restore_reggroup)
1245 {
1246 return (regnum <= gdbarch_num_regs (gdbarch)
1247 || ((regnum == SOFT_FP_REGNUM
1248 || regnum == SOFT_TMP_REGNUM
1249 || regnum == SOFT_ZS_REGNUM
1250 || regnum == SOFT_XY_REGNUM)
1251 && m68hc11_register_name (regnum)));
1252 }
1253
1254 /* Group to identify gcc soft registers (d1..dN). */
1255 if (group == m68hc11_soft_reggroup)
1256 {
1257 return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
1258 }
1259
1260 if (group == m68hc11_hard_reggroup)
1261 {
1262 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1263 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1264 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1265 }
1266 return default_register_reggroup_p (gdbarch, regnum, group);
1267}
1268
1269static struct gdbarch *
1270m68hc11_gdbarch_init (struct gdbarch_info info,
1271 struct gdbarch_list *arches)
1272{
1273 static LONGEST m68hc11_call_dummy_words[] =
1274 {0};
1275 struct gdbarch *gdbarch;
1276 struct gdbarch_tdep *tdep;
1277 int elf_flags;
1278
1279 soft_reg_initialized = 0;
1280
1281 /* Extract the elf_flags if available. */
1282 if (info.abfd != NULL
1283 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1284 elf_flags = elf_elfheader (info.abfd)->e_flags;
1285 else
1286 elf_flags = 0;
1287
1288 /* try to find a pre-existing architecture */
1289 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1290 arches != NULL;
1291 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1292 {
1293 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1294 continue;
1295
1296 return arches->gdbarch;
1297 }
1298
1299 /* Need a new architecture. Fill in a target specific vector. */
1300 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1301 gdbarch = gdbarch_alloc (&info, tdep);
1302 tdep->elf_flags = elf_flags;
1303
1304 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1305 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1306 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1307
1308 switch (info.bfd_arch_info->arch)
1309 {
1310 case bfd_arch_m68hc11:
1311 tdep->stack_correction = 1;
1312 tdep->use_page_register = 0;
1313 tdep->prologue = m6811_prologue;
1314 set_gdbarch_addr_bit (gdbarch, 16);
1315 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1316 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1317 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1318 break;
1319
1320 case bfd_arch_m68hc12:
1321 tdep->stack_correction = 0;
1322 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1323 tdep->prologue = m6812_prologue;
1324 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1325 set_gdbarch_num_pseudo_regs (gdbarch,
1326 elf_flags & E_M68HC12_BANKS
1327 ? M68HC12_NUM_PSEUDO_REGS
1328 : M68HC11_NUM_PSEUDO_REGS);
1329 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1330 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1331 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1332 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1333 break;
1334
1335 default:
1336 break;
1337 }
1338
1339 /* Initially set everything according to the ABI.
1340 Use 16-bit integers since it will be the case for most
1341 programs. The size of these types should normally be set
1342 according to the dwarf2 debug information. */
1343 set_gdbarch_short_bit (gdbarch, 16);
1344 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1345 set_gdbarch_float_bit (gdbarch, 32);
1346 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1347 set_gdbarch_long_double_bit (gdbarch, 64);
1348 set_gdbarch_long_bit (gdbarch, 32);
1349 set_gdbarch_ptr_bit (gdbarch, 16);
1350 set_gdbarch_long_long_bit (gdbarch, 64);
1351
1352 /* Set register info. */
1353 set_gdbarch_fp0_regnum (gdbarch, -1);
1354 set_gdbarch_max_register_raw_size (gdbarch, 2);
1355 set_gdbarch_max_register_virtual_size (gdbarch, 2);
1356 set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
1357 set_gdbarch_frame_args_skip (gdbarch, 0);
1358
1359 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1360 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1361 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1362 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1363 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1364
1365 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1366 set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
1367 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1368 set_gdbarch_register_size (gdbarch, 2);
1369 set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
1370 set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
1371 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1372 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1373
1374 set_gdbarch_call_dummy_length (gdbarch, 0);
1375 set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address);
1376 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
1377 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1378 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1379 set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
1380 set_gdbarch_sizeof_call_dummy_words (gdbarch,
1381 sizeof (m68hc11_call_dummy_words));
1382 set_gdbarch_call_dummy_p (gdbarch, 1);
1383 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1384 set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
1385 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1386 set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value);
1387 set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
1388 set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
1389 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1390
1391 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1392 set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value);
1393 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1394 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
1395
1396
1397 set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain);
1398 set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
1399 set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address);
1400 set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address);
1401 set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
1402 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1403
1404 set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
1405
1406 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1407 set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value);
1408 set_gdbarch_deprecated_extract_struct_value_address
1409 (gdbarch, m68hc11_extract_struct_value_address);
1410 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1411 set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
1412 set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame);
1413 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1414 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1415 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1416 set_gdbarch_function_start_offset (gdbarch, 0);
1417 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1418 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
1419 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1420
1421 m68hc11_add_reggroups (gdbarch);
1422 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1423
1424 /* Minsymbol frobbing. */
1425 set_gdbarch_elf_make_msymbol_special (gdbarch,
1426 m68hc11_elf_make_msymbol_special);
1427
1428 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1429
1430 return gdbarch;
1431}
1432
1433void
1434_initialize_m68hc11_tdep (void)
1435{
1436 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1437 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1438 m68hc11_init_reggroups ();
1439
1440 add_com ("regs", class_vars, show_regs, "Print all registers");
1441}
1442
GDB Binutils - Deliverables
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