| 1 | /* Target-dependent code for GDB, the GNU debugger. |
| 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
| 3 | 1998, 1999, 2000, 2001 |
| 4 | Free Software Foundation, Inc. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 2 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program; if not, write to the Free Software |
| 20 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 21 | Boston, MA 02111-1307, USA. */ |
| 22 | |
| 23 | #include "defs.h" |
| 24 | #include "frame.h" |
| 25 | #include "inferior.h" |
| 26 | #include "symtab.h" |
| 27 | #include "target.h" |
| 28 | #include "gdbcore.h" |
| 29 | #include "gdbcmd.h" |
| 30 | #include "symfile.h" |
| 31 | #include "objfiles.h" |
| 32 | #include "arch-utils.h" |
| 33 | #include "regcache.h" |
| 34 | |
| 35 | #include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */ |
| 36 | #include "coff/internal.h" /* for libcoff.h */ |
| 37 | #include "bfd/libcoff.h" /* for xcoff_data */ |
| 38 | |
| 39 | #include "elf-bfd.h" |
| 40 | |
| 41 | #include "ppc-tdep.h" |
| 42 | |
| 43 | /* If the kernel has to deliver a signal, it pushes a sigcontext |
| 44 | structure on the stack and then calls the signal handler, passing |
| 45 | the address of the sigcontext in an argument register. Usually |
| 46 | the signal handler doesn't save this register, so we have to |
| 47 | access the sigcontext structure via an offset from the signal handler |
| 48 | frame. |
| 49 | The following constants were determined by experimentation on AIX 3.2. */ |
| 50 | #define SIG_FRAME_PC_OFFSET 96 |
| 51 | #define SIG_FRAME_LR_OFFSET 108 |
| 52 | #define SIG_FRAME_FP_OFFSET 284 |
| 53 | |
| 54 | /* To be used by skip_prologue. */ |
| 55 | |
| 56 | struct rs6000_framedata |
| 57 | { |
| 58 | int offset; /* total size of frame --- the distance |
| 59 | by which we decrement sp to allocate |
| 60 | the frame */ |
| 61 | int saved_gpr; /* smallest # of saved gpr */ |
| 62 | int saved_fpr; /* smallest # of saved fpr */ |
| 63 | int alloca_reg; /* alloca register number (frame ptr) */ |
| 64 | char frameless; /* true if frameless functions. */ |
| 65 | char nosavedpc; /* true if pc not saved. */ |
| 66 | int gpr_offset; /* offset of saved gprs from prev sp */ |
| 67 | int fpr_offset; /* offset of saved fprs from prev sp */ |
| 68 | int lr_offset; /* offset of saved lr */ |
| 69 | int cr_offset; /* offset of saved cr */ |
| 70 | }; |
| 71 | |
| 72 | /* Description of a single register. */ |
| 73 | |
| 74 | struct reg |
| 75 | { |
| 76 | char *name; /* name of register */ |
| 77 | unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */ |
| 78 | unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */ |
| 79 | unsigned char fpr; /* whether register is floating-point */ |
| 80 | }; |
| 81 | |
| 82 | /* Private data that this module attaches to struct gdbarch. */ |
| 83 | |
| 84 | struct gdbarch_tdep |
| 85 | { |
| 86 | int wordsize; /* size in bytes of fixed-point word */ |
| 87 | int osabi; /* OS / ABI from ELF header */ |
| 88 | int *regoff; /* byte offsets in register arrays */ |
| 89 | const struct reg *regs; /* from current variant */ |
| 90 | }; |
| 91 | |
| 92 | /* Return the current architecture's gdbarch_tdep structure. */ |
| 93 | |
| 94 | #define TDEP gdbarch_tdep (current_gdbarch) |
| 95 | |
| 96 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
| 97 | |
| 98 | static struct sstep_breaks |
| 99 | { |
| 100 | /* Address, or 0 if this is not in use. */ |
| 101 | CORE_ADDR address; |
| 102 | /* Shadow contents. */ |
| 103 | char data[4]; |
| 104 | } |
| 105 | stepBreaks[2]; |
| 106 | |
| 107 | /* Hook for determining the TOC address when calling functions in the |
| 108 | inferior under AIX. The initialization code in rs6000-nat.c sets |
| 109 | this hook to point to find_toc_address. */ |
| 110 | |
| 111 | CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL; |
| 112 | |
| 113 | /* Hook to set the current architecture when starting a child process. |
| 114 | rs6000-nat.c sets this. */ |
| 115 | |
| 116 | void (*rs6000_set_host_arch_hook) (int) = NULL; |
| 117 | |
| 118 | /* Static function prototypes */ |
| 119 | |
| 120 | static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc, |
| 121 | CORE_ADDR safety); |
| 122 | static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR, |
| 123 | struct rs6000_framedata *); |
| 124 | static void frame_get_saved_regs (struct frame_info * fi, |
| 125 | struct rs6000_framedata * fdatap); |
| 126 | static CORE_ADDR frame_initial_stack_address (struct frame_info *); |
| 127 | |
| 128 | /* Read a LEN-byte address from debugged memory address MEMADDR. */ |
| 129 | |
| 130 | static CORE_ADDR |
| 131 | read_memory_addr (CORE_ADDR memaddr, int len) |
| 132 | { |
| 133 | return read_memory_unsigned_integer (memaddr, len); |
| 134 | } |
| 135 | |
| 136 | static CORE_ADDR |
| 137 | rs6000_skip_prologue (CORE_ADDR pc) |
| 138 | { |
| 139 | struct rs6000_framedata frame; |
| 140 | pc = skip_prologue (pc, 0, &frame); |
| 141 | return pc; |
| 142 | } |
| 143 | |
| 144 | |
| 145 | /* Fill in fi->saved_regs */ |
| 146 | |
| 147 | struct frame_extra_info |
| 148 | { |
| 149 | /* Functions calling alloca() change the value of the stack |
| 150 | pointer. We need to use initial stack pointer (which is saved in |
| 151 | r31 by gcc) in such cases. If a compiler emits traceback table, |
| 152 | then we should use the alloca register specified in traceback |
| 153 | table. FIXME. */ |
| 154 | CORE_ADDR initial_sp; /* initial stack pointer. */ |
| 155 | }; |
| 156 | |
| 157 | void |
| 158 | rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
| 159 | { |
| 160 | fi->extra_info = (struct frame_extra_info *) |
| 161 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
| 162 | fi->extra_info->initial_sp = 0; |
| 163 | if (fi->next != (CORE_ADDR) 0 |
| 164 | && fi->pc < TEXT_SEGMENT_BASE) |
| 165 | /* We're in get_prev_frame */ |
| 166 | /* and this is a special signal frame. */ |
| 167 | /* (fi->pc will be some low address in the kernel, */ |
| 168 | /* to which the signal handler returns). */ |
| 169 | fi->signal_handler_caller = 1; |
| 170 | } |
| 171 | |
| 172 | /* Put here the code to store, into a struct frame_saved_regs, |
| 173 | the addresses of the saved registers of frame described by FRAME_INFO. |
| 174 | This includes special registers such as pc and fp saved in special |
| 175 | ways in the stack frame. sp is even more special: |
| 176 | the address we return for it IS the sp for the next frame. */ |
| 177 | |
| 178 | /* In this implementation for RS/6000, we do *not* save sp. I am |
| 179 | not sure if it will be needed. The following function takes care of gpr's |
| 180 | and fpr's only. */ |
| 181 | |
| 182 | void |
| 183 | rs6000_frame_init_saved_regs (struct frame_info *fi) |
| 184 | { |
| 185 | frame_get_saved_regs (fi, NULL); |
| 186 | } |
| 187 | |
| 188 | static CORE_ADDR |
| 189 | rs6000_frame_args_address (struct frame_info *fi) |
| 190 | { |
| 191 | if (fi->extra_info->initial_sp != 0) |
| 192 | return fi->extra_info->initial_sp; |
| 193 | else |
| 194 | return frame_initial_stack_address (fi); |
| 195 | } |
| 196 | |
| 197 | /* Immediately after a function call, return the saved pc. |
| 198 | Can't go through the frames for this because on some machines |
| 199 | the new frame is not set up until the new function executes |
| 200 | some instructions. */ |
| 201 | |
| 202 | static CORE_ADDR |
| 203 | rs6000_saved_pc_after_call (struct frame_info *fi) |
| 204 | { |
| 205 | return read_register (PPC_LR_REGNUM); |
| 206 | } |
| 207 | |
| 208 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ |
| 209 | |
| 210 | static CORE_ADDR |
| 211 | branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety) |
| 212 | { |
| 213 | CORE_ADDR dest; |
| 214 | int immediate; |
| 215 | int absolute; |
| 216 | int ext_op; |
| 217 | |
| 218 | absolute = (int) ((instr >> 1) & 1); |
| 219 | |
| 220 | switch (opcode) |
| 221 | { |
| 222 | case 18: |
| 223 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
| 224 | if (absolute) |
| 225 | dest = immediate; |
| 226 | else |
| 227 | dest = pc + immediate; |
| 228 | break; |
| 229 | |
| 230 | case 16: |
| 231 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ |
| 232 | if (absolute) |
| 233 | dest = immediate; |
| 234 | else |
| 235 | dest = pc + immediate; |
| 236 | break; |
| 237 | |
| 238 | case 19: |
| 239 | ext_op = (instr >> 1) & 0x3ff; |
| 240 | |
| 241 | if (ext_op == 16) /* br conditional register */ |
| 242 | { |
| 243 | dest = read_register (PPC_LR_REGNUM) & ~3; |
| 244 | |
| 245 | /* If we are about to return from a signal handler, dest is |
| 246 | something like 0x3c90. The current frame is a signal handler |
| 247 | caller frame, upon completion of the sigreturn system call |
| 248 | execution will return to the saved PC in the frame. */ |
| 249 | if (dest < TEXT_SEGMENT_BASE) |
| 250 | { |
| 251 | struct frame_info *fi; |
| 252 | |
| 253 | fi = get_current_frame (); |
| 254 | if (fi != NULL) |
| 255 | dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, |
| 256 | TDEP->wordsize); |
| 257 | } |
| 258 | } |
| 259 | |
| 260 | else if (ext_op == 528) /* br cond to count reg */ |
| 261 | { |
| 262 | dest = read_register (PPC_CTR_REGNUM) & ~3; |
| 263 | |
| 264 | /* If we are about to execute a system call, dest is something |
| 265 | like 0x22fc or 0x3b00. Upon completion the system call |
| 266 | will return to the address in the link register. */ |
| 267 | if (dest < TEXT_SEGMENT_BASE) |
| 268 | dest = read_register (PPC_LR_REGNUM) & ~3; |
| 269 | } |
| 270 | else |
| 271 | return -1; |
| 272 | break; |
| 273 | |
| 274 | default: |
| 275 | return -1; |
| 276 | } |
| 277 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
| 278 | } |
| 279 | |
| 280 | |
| 281 | /* Sequence of bytes for breakpoint instruction. */ |
| 282 | |
| 283 | #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 } |
| 284 | #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d } |
| 285 | |
| 286 | static unsigned char * |
| 287 | rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) |
| 288 | { |
| 289 | static unsigned char big_breakpoint[] = BIG_BREAKPOINT; |
| 290 | static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT; |
| 291 | *bp_size = 4; |
| 292 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 293 | return big_breakpoint; |
| 294 | else |
| 295 | return little_breakpoint; |
| 296 | } |
| 297 | |
| 298 | |
| 299 | /* AIX does not support PT_STEP. Simulate it. */ |
| 300 | |
| 301 | void |
| 302 | rs6000_software_single_step (unsigned int signal, int insert_breakpoints_p) |
| 303 | { |
| 304 | #define INSNLEN(OPCODE) 4 |
| 305 | |
| 306 | static char le_breakp[] = LITTLE_BREAKPOINT; |
| 307 | static char be_breakp[] = BIG_BREAKPOINT; |
| 308 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; |
| 309 | int ii, insn; |
| 310 | CORE_ADDR loc; |
| 311 | CORE_ADDR breaks[2]; |
| 312 | int opcode; |
| 313 | |
| 314 | if (insert_breakpoints_p) |
| 315 | { |
| 316 | |
| 317 | loc = read_pc (); |
| 318 | |
| 319 | insn = read_memory_integer (loc, 4); |
| 320 | |
| 321 | breaks[0] = loc + INSNLEN (insn); |
| 322 | opcode = insn >> 26; |
| 323 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); |
| 324 | |
| 325 | /* Don't put two breakpoints on the same address. */ |
| 326 | if (breaks[1] == breaks[0]) |
| 327 | breaks[1] = -1; |
| 328 | |
| 329 | stepBreaks[1].address = 0; |
| 330 | |
| 331 | for (ii = 0; ii < 2; ++ii) |
| 332 | { |
| 333 | |
| 334 | /* ignore invalid breakpoint. */ |
| 335 | if (breaks[ii] == -1) |
| 336 | continue; |
| 337 | |
| 338 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
| 339 | |
| 340 | write_memory (breaks[ii], breakp, 4); |
| 341 | stepBreaks[ii].address = breaks[ii]; |
| 342 | } |
| 343 | |
| 344 | } |
| 345 | else |
| 346 | { |
| 347 | |
| 348 | /* remove step breakpoints. */ |
| 349 | for (ii = 0; ii < 2; ++ii) |
| 350 | if (stepBreaks[ii].address != 0) |
| 351 | write_memory |
| 352 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
| 353 | |
| 354 | } |
| 355 | errno = 0; /* FIXME, don't ignore errors! */ |
| 356 | /* What errors? {read,write}_memory call error(). */ |
| 357 | } |
| 358 | |
| 359 | |
| 360 | /* return pc value after skipping a function prologue and also return |
| 361 | information about a function frame. |
| 362 | |
| 363 | in struct rs6000_framedata fdata: |
| 364 | - frameless is TRUE, if function does not have a frame. |
| 365 | - nosavedpc is TRUE, if function does not save %pc value in its frame. |
| 366 | - offset is the initial size of this stack frame --- the amount by |
| 367 | which we decrement the sp to allocate the frame. |
| 368 | - saved_gpr is the number of the first saved gpr. |
| 369 | - saved_fpr is the number of the first saved fpr. |
| 370 | - alloca_reg is the number of the register used for alloca() handling. |
| 371 | Otherwise -1. |
| 372 | - gpr_offset is the offset of the first saved gpr from the previous frame. |
| 373 | - fpr_offset is the offset of the first saved fpr from the previous frame. |
| 374 | - lr_offset is the offset of the saved lr |
| 375 | - cr_offset is the offset of the saved cr |
| 376 | */ |
| 377 | |
| 378 | #define SIGNED_SHORT(x) \ |
| 379 | ((sizeof (short) == 2) \ |
| 380 | ? ((int)(short)(x)) \ |
| 381 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) |
| 382 | |
| 383 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) |
| 384 | |
| 385 | /* Limit the number of skipped non-prologue instructions, as the examining |
| 386 | of the prologue is expensive. */ |
| 387 | static int max_skip_non_prologue_insns = 10; |
| 388 | |
| 389 | /* Given PC representing the starting address of a function, and |
| 390 | LIM_PC which is the (sloppy) limit to which to scan when looking |
| 391 | for a prologue, attempt to further refine this limit by using |
| 392 | the line data in the symbol table. If successful, a better guess |
| 393 | on where the prologue ends is returned, otherwise the previous |
| 394 | value of lim_pc is returned. */ |
| 395 | static CORE_ADDR |
| 396 | refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc) |
| 397 | { |
| 398 | struct symtab_and_line prologue_sal; |
| 399 | |
| 400 | prologue_sal = find_pc_line (pc, 0); |
| 401 | if (prologue_sal.line != 0) |
| 402 | { |
| 403 | int i; |
| 404 | CORE_ADDR addr = prologue_sal.end; |
| 405 | |
| 406 | /* Handle the case in which compiler's optimizer/scheduler |
| 407 | has moved instructions into the prologue. We scan ahead |
| 408 | in the function looking for address ranges whose corresponding |
| 409 | line number is less than or equal to the first one that we |
| 410 | found for the function. (It can be less than when the |
| 411 | scheduler puts a body instruction before the first prologue |
| 412 | instruction.) */ |
| 413 | for (i = 2 * max_skip_non_prologue_insns; |
| 414 | i > 0 && (lim_pc == 0 || addr < lim_pc); |
| 415 | i--) |
| 416 | { |
| 417 | struct symtab_and_line sal; |
| 418 | |
| 419 | sal = find_pc_line (addr, 0); |
| 420 | if (sal.line == 0) |
| 421 | break; |
| 422 | if (sal.line <= prologue_sal.line |
| 423 | && sal.symtab == prologue_sal.symtab) |
| 424 | { |
| 425 | prologue_sal = sal; |
| 426 | } |
| 427 | addr = sal.end; |
| 428 | } |
| 429 | |
| 430 | if (lim_pc == 0 || prologue_sal.end < lim_pc) |
| 431 | lim_pc = prologue_sal.end; |
| 432 | } |
| 433 | return lim_pc; |
| 434 | } |
| 435 | |
| 436 | |
| 437 | static CORE_ADDR |
| 438 | skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata) |
| 439 | { |
| 440 | CORE_ADDR orig_pc = pc; |
| 441 | CORE_ADDR last_prologue_pc = pc; |
| 442 | char buf[4]; |
| 443 | unsigned long op; |
| 444 | long offset = 0; |
| 445 | int lr_reg = -1; |
| 446 | int cr_reg = -1; |
| 447 | int reg; |
| 448 | int framep = 0; |
| 449 | int minimal_toc_loaded = 0; |
| 450 | int prev_insn_was_prologue_insn = 1; |
| 451 | int num_skip_non_prologue_insns = 0; |
| 452 | |
| 453 | /* Attempt to find the end of the prologue when no limit is specified. |
| 454 | Note that refine_prologue_limit() has been written so that it may |
| 455 | be used to "refine" the limits of non-zero PC values too, but this |
| 456 | is only safe if we 1) trust the line information provided by the |
| 457 | compiler and 2) iterate enough to actually find the end of the |
| 458 | prologue. |
| 459 | |
| 460 | It may become a good idea at some point (for both performance and |
| 461 | accuracy) to unconditionally call refine_prologue_limit(). But, |
| 462 | until we can make a clear determination that this is beneficial, |
| 463 | we'll play it safe and only use it to obtain a limit when none |
| 464 | has been specified. */ |
| 465 | if (lim_pc == 0) |
| 466 | lim_pc = refine_prologue_limit (pc, lim_pc); |
| 467 | |
| 468 | memset (fdata, 0, sizeof (struct rs6000_framedata)); |
| 469 | fdata->saved_gpr = -1; |
| 470 | fdata->saved_fpr = -1; |
| 471 | fdata->alloca_reg = -1; |
| 472 | fdata->frameless = 1; |
| 473 | fdata->nosavedpc = 1; |
| 474 | |
| 475 | for (;; pc += 4) |
| 476 | { |
| 477 | /* Sometimes it isn't clear if an instruction is a prologue |
| 478 | instruction or not. When we encounter one of these ambiguous |
| 479 | cases, we'll set prev_insn_was_prologue_insn to 0 (false). |
| 480 | Otherwise, we'll assume that it really is a prologue instruction. */ |
| 481 | if (prev_insn_was_prologue_insn) |
| 482 | last_prologue_pc = pc; |
| 483 | |
| 484 | /* Stop scanning if we've hit the limit. */ |
| 485 | if (lim_pc != 0 && pc >= lim_pc) |
| 486 | break; |
| 487 | |
| 488 | prev_insn_was_prologue_insn = 1; |
| 489 | |
| 490 | /* Fetch the instruction and convert it to an integer. */ |
| 491 | if (target_read_memory (pc, buf, 4)) |
| 492 | break; |
| 493 | op = extract_signed_integer (buf, 4); |
| 494 | |
| 495 | if ((op & 0xfc1fffff) == 0x7c0802a6) |
| 496 | { /* mflr Rx */ |
| 497 | lr_reg = (op & 0x03e00000) | 0x90010000; |
| 498 | continue; |
| 499 | |
| 500 | } |
| 501 | else if ((op & 0xfc1fffff) == 0x7c000026) |
| 502 | { /* mfcr Rx */ |
| 503 | cr_reg = (op & 0x03e00000) | 0x90010000; |
| 504 | continue; |
| 505 | |
| 506 | } |
| 507 | else if ((op & 0xfc1f0000) == 0xd8010000) |
| 508 | { /* stfd Rx,NUM(r1) */ |
| 509 | reg = GET_SRC_REG (op); |
| 510 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) |
| 511 | { |
| 512 | fdata->saved_fpr = reg; |
| 513 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; |
| 514 | } |
| 515 | continue; |
| 516 | |
| 517 | } |
| 518 | else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ |
| 519 | (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ |
| 520 | (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */ |
| 521 | (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */ |
| 522 | { |
| 523 | |
| 524 | reg = GET_SRC_REG (op); |
| 525 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) |
| 526 | { |
| 527 | fdata->saved_gpr = reg; |
| 528 | if ((op & 0xfc1f0003) == 0xf8010000) |
| 529 | op = (op >> 1) << 1; |
| 530 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
| 531 | } |
| 532 | continue; |
| 533 | |
| 534 | } |
| 535 | else if ((op & 0xffff0000) == 0x60000000) |
| 536 | { |
| 537 | /* nop */ |
| 538 | /* Allow nops in the prologue, but do not consider them to |
| 539 | be part of the prologue unless followed by other prologue |
| 540 | instructions. */ |
| 541 | prev_insn_was_prologue_insn = 0; |
| 542 | continue; |
| 543 | |
| 544 | } |
| 545 | else if ((op & 0xffff0000) == 0x3c000000) |
| 546 | { /* addis 0,0,NUM, used |
| 547 | for >= 32k frames */ |
| 548 | fdata->offset = (op & 0x0000ffff) << 16; |
| 549 | fdata->frameless = 0; |
| 550 | continue; |
| 551 | |
| 552 | } |
| 553 | else if ((op & 0xffff0000) == 0x60000000) |
| 554 | { /* ori 0,0,NUM, 2nd ha |
| 555 | lf of >= 32k frames */ |
| 556 | fdata->offset |= (op & 0x0000ffff); |
| 557 | fdata->frameless = 0; |
| 558 | continue; |
| 559 | |
| 560 | } |
| 561 | else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg) |
| 562 | { /* st Rx,NUM(r1) |
| 563 | where Rx == lr */ |
| 564 | fdata->lr_offset = SIGNED_SHORT (op) + offset; |
| 565 | fdata->nosavedpc = 0; |
| 566 | lr_reg = 0; |
| 567 | continue; |
| 568 | |
| 569 | } |
| 570 | else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg) |
| 571 | { /* st Rx,NUM(r1) |
| 572 | where Rx == cr */ |
| 573 | fdata->cr_offset = SIGNED_SHORT (op) + offset; |
| 574 | cr_reg = 0; |
| 575 | continue; |
| 576 | |
| 577 | } |
| 578 | else if (op == 0x48000005) |
| 579 | { /* bl .+4 used in |
| 580 | -mrelocatable */ |
| 581 | continue; |
| 582 | |
| 583 | } |
| 584 | else if (op == 0x48000004) |
| 585 | { /* b .+4 (xlc) */ |
| 586 | break; |
| 587 | |
| 588 | } |
| 589 | else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used |
| 590 | in V.4 -mrelocatable */ |
| 591 | op == 0x7fc0f214) && /* add r30,r0,r30, used |
| 592 | in V.4 -mrelocatable */ |
| 593 | lr_reg == 0x901e0000) |
| 594 | { |
| 595 | continue; |
| 596 | |
| 597 | } |
| 598 | else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used |
| 599 | in V.4 -mminimal-toc */ |
| 600 | (op & 0xffff0000) == 0x3bde0000) |
| 601 | { /* addi 30,30,foo@l */ |
| 602 | continue; |
| 603 | |
| 604 | } |
| 605 | else if ((op & 0xfc000001) == 0x48000001) |
| 606 | { /* bl foo, |
| 607 | to save fprs??? */ |
| 608 | |
| 609 | fdata->frameless = 0; |
| 610 | /* Don't skip over the subroutine call if it is not within the first |
| 611 | three instructions of the prologue. */ |
| 612 | if ((pc - orig_pc) > 8) |
| 613 | break; |
| 614 | |
| 615 | op = read_memory_integer (pc + 4, 4); |
| 616 | |
| 617 | /* At this point, make sure this is not a trampoline function |
| 618 | (a function that simply calls another functions, and nothing else). |
| 619 | If the next is not a nop, this branch was part of the function |
| 620 | prologue. */ |
| 621 | |
| 622 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ |
| 623 | break; /* don't skip over |
| 624 | this branch */ |
| 625 | continue; |
| 626 | |
| 627 | /* update stack pointer */ |
| 628 | } |
| 629 | else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */ |
| 630 | (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */ |
| 631 | { |
| 632 | fdata->frameless = 0; |
| 633 | if ((op & 0xffff0003) == 0xf8210001) |
| 634 | op = (op >> 1) << 1; |
| 635 | fdata->offset = SIGNED_SHORT (op); |
| 636 | offset = fdata->offset; |
| 637 | continue; |
| 638 | |
| 639 | } |
| 640 | else if (op == 0x7c21016e) |
| 641 | { /* stwux 1,1,0 */ |
| 642 | fdata->frameless = 0; |
| 643 | offset = fdata->offset; |
| 644 | continue; |
| 645 | |
| 646 | /* Load up minimal toc pointer */ |
| 647 | } |
| 648 | else if ((op >> 22) == 0x20f |
| 649 | && !minimal_toc_loaded) |
| 650 | { /* l r31,... or l r30,... */ |
| 651 | minimal_toc_loaded = 1; |
| 652 | continue; |
| 653 | |
| 654 | /* move parameters from argument registers to local variable |
| 655 | registers */ |
| 656 | } |
| 657 | else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */ |
| 658 | (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */ |
| 659 | (((op >> 21) & 31) <= 10) && |
| 660 | (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */ |
| 661 | { |
| 662 | continue; |
| 663 | |
| 664 | /* store parameters in stack */ |
| 665 | } |
| 666 | else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ |
| 667 | (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */ |
| 668 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ |
| 669 | (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */ |
| 670 | { |
| 671 | continue; |
| 672 | |
| 673 | /* store parameters in stack via frame pointer */ |
| 674 | } |
| 675 | else if (framep && |
| 676 | ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ |
| 677 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ |
| 678 | (op & 0xfc1f0000) == 0xfc1f0000)) |
| 679 | { /* frsp, fp?,NUM(r1) */ |
| 680 | continue; |
| 681 | |
| 682 | /* Set up frame pointer */ |
| 683 | } |
| 684 | else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ |
| 685 | || op == 0x7c3f0b78) |
| 686 | { /* mr r31, r1 */ |
| 687 | fdata->frameless = 0; |
| 688 | framep = 1; |
| 689 | fdata->alloca_reg = 31; |
| 690 | continue; |
| 691 | |
| 692 | /* Another way to set up the frame pointer. */ |
| 693 | } |
| 694 | else if ((op & 0xfc1fffff) == 0x38010000) |
| 695 | { /* addi rX, r1, 0x0 */ |
| 696 | fdata->frameless = 0; |
| 697 | framep = 1; |
| 698 | fdata->alloca_reg = (op & ~0x38010000) >> 21; |
| 699 | continue; |
| 700 | |
| 701 | } |
| 702 | else |
| 703 | { |
| 704 | /* Not a recognized prologue instruction. |
| 705 | Handle optimizer code motions into the prologue by continuing |
| 706 | the search if we have no valid frame yet or if the return |
| 707 | address is not yet saved in the frame. */ |
| 708 | if (fdata->frameless == 0 |
| 709 | && (lr_reg == -1 || fdata->nosavedpc == 0)) |
| 710 | break; |
| 711 | |
| 712 | if (op == 0x4e800020 /* blr */ |
| 713 | || op == 0x4e800420) /* bctr */ |
| 714 | /* Do not scan past epilogue in frameless functions or |
| 715 | trampolines. */ |
| 716 | break; |
| 717 | if ((op & 0xf4000000) == 0x40000000) /* bxx */ |
| 718 | /* Never skip branches. */ |
| 719 | break; |
| 720 | |
| 721 | if (num_skip_non_prologue_insns++ > max_skip_non_prologue_insns) |
| 722 | /* Do not scan too many insns, scanning insns is expensive with |
| 723 | remote targets. */ |
| 724 | break; |
| 725 | |
| 726 | /* Continue scanning. */ |
| 727 | prev_insn_was_prologue_insn = 0; |
| 728 | continue; |
| 729 | } |
| 730 | } |
| 731 | |
| 732 | #if 0 |
| 733 | /* I have problems with skipping over __main() that I need to address |
| 734 | * sometime. Previously, I used to use misc_function_vector which |
| 735 | * didn't work as well as I wanted to be. -MGO */ |
| 736 | |
| 737 | /* If the first thing after skipping a prolog is a branch to a function, |
| 738 | this might be a call to an initializer in main(), introduced by gcc2. |
| 739 | We'd like to skip over it as well. Fortunately, xlc does some extra |
| 740 | work before calling a function right after a prologue, thus we can |
| 741 | single out such gcc2 behaviour. */ |
| 742 | |
| 743 | |
| 744 | if ((op & 0xfc000001) == 0x48000001) |
| 745 | { /* bl foo, an initializer function? */ |
| 746 | op = read_memory_integer (pc + 4, 4); |
| 747 | |
| 748 | if (op == 0x4def7b82) |
| 749 | { /* cror 0xf, 0xf, 0xf (nop) */ |
| 750 | |
| 751 | /* check and see if we are in main. If so, skip over this initializer |
| 752 | function as well. */ |
| 753 | |
| 754 | tmp = find_pc_misc_function (pc); |
| 755 | if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main")) |
| 756 | return pc + 8; |
| 757 | } |
| 758 | } |
| 759 | #endif /* 0 */ |
| 760 | |
| 761 | fdata->offset = -fdata->offset; |
| 762 | return last_prologue_pc; |
| 763 | } |
| 764 | |
| 765 | |
| 766 | /************************************************************************* |
| 767 | Support for creating pushing a dummy frame into the stack, and popping |
| 768 | frames, etc. |
| 769 | *************************************************************************/ |
| 770 | |
| 771 | |
| 772 | /* Pop the innermost frame, go back to the caller. */ |
| 773 | |
| 774 | static void |
| 775 | rs6000_pop_frame (void) |
| 776 | { |
| 777 | CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */ |
| 778 | struct rs6000_framedata fdata; |
| 779 | struct frame_info *frame = get_current_frame (); |
| 780 | int ii, wordsize; |
| 781 | |
| 782 | pc = read_pc (); |
| 783 | sp = FRAME_FP (frame); |
| 784 | |
| 785 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
| 786 | { |
| 787 | generic_pop_dummy_frame (); |
| 788 | flush_cached_frames (); |
| 789 | return; |
| 790 | } |
| 791 | |
| 792 | /* Make sure that all registers are valid. */ |
| 793 | read_register_bytes (0, NULL, REGISTER_BYTES); |
| 794 | |
| 795 | /* figure out previous %pc value. If the function is frameless, it is |
| 796 | still in the link register, otherwise walk the frames and retrieve the |
| 797 | saved %pc value in the previous frame. */ |
| 798 | |
| 799 | addr = get_pc_function_start (frame->pc); |
| 800 | (void) skip_prologue (addr, frame->pc, &fdata); |
| 801 | |
| 802 | wordsize = TDEP->wordsize; |
| 803 | if (fdata.frameless) |
| 804 | prev_sp = sp; |
| 805 | else |
| 806 | prev_sp = read_memory_addr (sp, wordsize); |
| 807 | if (fdata.lr_offset == 0) |
| 808 | lr = read_register (PPC_LR_REGNUM); |
| 809 | else |
| 810 | lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize); |
| 811 | |
| 812 | /* reset %pc value. */ |
| 813 | write_register (PC_REGNUM, lr); |
| 814 | |
| 815 | /* reset register values if any was saved earlier. */ |
| 816 | |
| 817 | if (fdata.saved_gpr != -1) |
| 818 | { |
| 819 | addr = prev_sp + fdata.gpr_offset; |
| 820 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) |
| 821 | { |
| 822 | read_memory (addr, ®isters[REGISTER_BYTE (ii)], wordsize); |
| 823 | addr += wordsize; |
| 824 | } |
| 825 | } |
| 826 | |
| 827 | if (fdata.saved_fpr != -1) |
| 828 | { |
| 829 | addr = prev_sp + fdata.fpr_offset; |
| 830 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) |
| 831 | { |
| 832 | read_memory (addr, ®isters[REGISTER_BYTE (ii + FP0_REGNUM)], 8); |
| 833 | addr += 8; |
| 834 | } |
| 835 | } |
| 836 | |
| 837 | write_register (SP_REGNUM, prev_sp); |
| 838 | target_store_registers (-1); |
| 839 | flush_cached_frames (); |
| 840 | } |
| 841 | |
| 842 | /* Fixup the call sequence of a dummy function, with the real function |
| 843 | address. Its arguments will be passed by gdb. */ |
| 844 | |
| 845 | static void |
| 846 | rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun, |
| 847 | int nargs, value_ptr *args, struct type *type, |
| 848 | int gcc_p) |
| 849 | { |
| 850 | #define TOC_ADDR_OFFSET 20 |
| 851 | #define TARGET_ADDR_OFFSET 28 |
| 852 | |
| 853 | int ii; |
| 854 | CORE_ADDR target_addr; |
| 855 | |
| 856 | if (rs6000_find_toc_address_hook != NULL) |
| 857 | { |
| 858 | CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun); |
| 859 | write_register (PPC_TOC_REGNUM, tocvalue); |
| 860 | } |
| 861 | } |
| 862 | |
| 863 | /* Pass the arguments in either registers, or in the stack. In RS/6000, |
| 864 | the first eight words of the argument list (that might be less than |
| 865 | eight parameters if some parameters occupy more than one word) are |
| 866 | passed in r3..r10 registers. float and double parameters are |
| 867 | passed in fpr's, in addition to that. Rest of the parameters if any |
| 868 | are passed in user stack. There might be cases in which half of the |
| 869 | parameter is copied into registers, the other half is pushed into |
| 870 | stack. |
| 871 | |
| 872 | Stack must be aligned on 64-bit boundaries when synthesizing |
| 873 | function calls. |
| 874 | |
| 875 | If the function is returning a structure, then the return address is passed |
| 876 | in r3, then the first 7 words of the parameters can be passed in registers, |
| 877 | starting from r4. */ |
| 878 | |
| 879 | static CORE_ADDR |
| 880 | rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp, |
| 881 | int struct_return, CORE_ADDR struct_addr) |
| 882 | { |
| 883 | int ii; |
| 884 | int len = 0; |
| 885 | int argno; /* current argument number */ |
| 886 | int argbytes; /* current argument byte */ |
| 887 | char tmp_buffer[50]; |
| 888 | int f_argno = 0; /* current floating point argno */ |
| 889 | int wordsize = TDEP->wordsize; |
| 890 | |
| 891 | value_ptr arg = 0; |
| 892 | struct type *type; |
| 893 | |
| 894 | CORE_ADDR saved_sp; |
| 895 | |
| 896 | /* The first eight words of ther arguments are passed in registers. Copy |
| 897 | them appropriately. |
| 898 | |
| 899 | If the function is returning a `struct', then the first word (which |
| 900 | will be passed in r3) is used for struct return address. In that |
| 901 | case we should advance one word and start from r4 register to copy |
| 902 | parameters. */ |
| 903 | |
| 904 | ii = struct_return ? 1 : 0; |
| 905 | |
| 906 | /* |
| 907 | effectively indirect call... gcc does... |
| 908 | |
| 909 | return_val example( float, int); |
| 910 | |
| 911 | eabi: |
| 912 | float in fp0, int in r3 |
| 913 | offset of stack on overflow 8/16 |
| 914 | for varargs, must go by type. |
| 915 | power open: |
| 916 | float in r3&r4, int in r5 |
| 917 | offset of stack on overflow different |
| 918 | both: |
| 919 | return in r3 or f0. If no float, must study how gcc emulates floats; |
| 920 | pay attention to arg promotion. |
| 921 | User may have to cast\args to handle promotion correctly |
| 922 | since gdb won't know if prototype supplied or not. |
| 923 | */ |
| 924 | |
| 925 | for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii) |
| 926 | { |
| 927 | int reg_size = REGISTER_RAW_SIZE (ii + 3); |
| 928 | |
| 929 | arg = args[argno]; |
| 930 | type = check_typedef (VALUE_TYPE (arg)); |
| 931 | len = TYPE_LENGTH (type); |
| 932 | |
| 933 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
| 934 | { |
| 935 | |
| 936 | /* floating point arguments are passed in fpr's, as well as gpr's. |
| 937 | There are 13 fpr's reserved for passing parameters. At this point |
| 938 | there is no way we would run out of them. */ |
| 939 | |
| 940 | if (len > 8) |
| 941 | printf_unfiltered ( |
| 942 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
| 943 | |
| 944 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], |
| 945 | VALUE_CONTENTS (arg), |
| 946 | len); |
| 947 | ++f_argno; |
| 948 | } |
| 949 | |
| 950 | if (len > reg_size) |
| 951 | { |
| 952 | |
| 953 | /* Argument takes more than one register. */ |
| 954 | while (argbytes < len) |
| 955 | { |
| 956 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); |
| 957 | memcpy (®isters[REGISTER_BYTE (ii + 3)], |
| 958 | ((char *) VALUE_CONTENTS (arg)) + argbytes, |
| 959 | (len - argbytes) > reg_size |
| 960 | ? reg_size : len - argbytes); |
| 961 | ++ii, argbytes += reg_size; |
| 962 | |
| 963 | if (ii >= 8) |
| 964 | goto ran_out_of_registers_for_arguments; |
| 965 | } |
| 966 | argbytes = 0; |
| 967 | --ii; |
| 968 | } |
| 969 | else |
| 970 | { /* Argument can fit in one register. No problem. */ |
| 971 | int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0; |
| 972 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); |
| 973 | memcpy ((char *)®isters[REGISTER_BYTE (ii + 3)] + adj, |
| 974 | VALUE_CONTENTS (arg), len); |
| 975 | } |
| 976 | ++argno; |
| 977 | } |
| 978 | |
| 979 | ran_out_of_registers_for_arguments: |
| 980 | |
| 981 | saved_sp = read_sp (); |
| 982 | #ifndef ELF_OBJECT_FORMAT |
| 983 | /* location for 8 parameters are always reserved. */ |
| 984 | sp -= wordsize * 8; |
| 985 | |
| 986 | /* another six words for back chain, TOC register, link register, etc. */ |
| 987 | sp -= wordsize * 6; |
| 988 | |
| 989 | /* stack pointer must be quadword aligned */ |
| 990 | sp &= -16; |
| 991 | #endif |
| 992 | |
| 993 | /* if there are more arguments, allocate space for them in |
| 994 | the stack, then push them starting from the ninth one. */ |
| 995 | |
| 996 | if ((argno < nargs) || argbytes) |
| 997 | { |
| 998 | int space = 0, jj; |
| 999 | |
| 1000 | if (argbytes) |
| 1001 | { |
| 1002 | space += ((len - argbytes + 3) & -4); |
| 1003 | jj = argno + 1; |
| 1004 | } |
| 1005 | else |
| 1006 | jj = argno; |
| 1007 | |
| 1008 | for (; jj < nargs; ++jj) |
| 1009 | { |
| 1010 | value_ptr val = args[jj]; |
| 1011 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; |
| 1012 | } |
| 1013 | |
| 1014 | /* add location required for the rest of the parameters */ |
| 1015 | space = (space + 15) & -16; |
| 1016 | sp -= space; |
| 1017 | |
| 1018 | /* This is another instance we need to be concerned about securing our |
| 1019 | stack space. If we write anything underneath %sp (r1), we might conflict |
| 1020 | with the kernel who thinks he is free to use this area. So, update %sp |
| 1021 | first before doing anything else. */ |
| 1022 | |
| 1023 | write_register (SP_REGNUM, sp); |
| 1024 | |
| 1025 | /* if the last argument copied into the registers didn't fit there |
| 1026 | completely, push the rest of it into stack. */ |
| 1027 | |
| 1028 | if (argbytes) |
| 1029 | { |
| 1030 | write_memory (sp + 24 + (ii * 4), |
| 1031 | ((char *) VALUE_CONTENTS (arg)) + argbytes, |
| 1032 | len - argbytes); |
| 1033 | ++argno; |
| 1034 | ii += ((len - argbytes + 3) & -4) / 4; |
| 1035 | } |
| 1036 | |
| 1037 | /* push the rest of the arguments into stack. */ |
| 1038 | for (; argno < nargs; ++argno) |
| 1039 | { |
| 1040 | |
| 1041 | arg = args[argno]; |
| 1042 | type = check_typedef (VALUE_TYPE (arg)); |
| 1043 | len = TYPE_LENGTH (type); |
| 1044 | |
| 1045 | |
| 1046 | /* float types should be passed in fpr's, as well as in the stack. */ |
| 1047 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) |
| 1048 | { |
| 1049 | |
| 1050 | if (len > 8) |
| 1051 | printf_unfiltered ( |
| 1052 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
| 1053 | |
| 1054 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], |
| 1055 | VALUE_CONTENTS (arg), |
| 1056 | len); |
| 1057 | ++f_argno; |
| 1058 | } |
| 1059 | |
| 1060 | write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len); |
| 1061 | ii += ((len + 3) & -4) / 4; |
| 1062 | } |
| 1063 | } |
| 1064 | else |
| 1065 | /* Secure stack areas first, before doing anything else. */ |
| 1066 | write_register (SP_REGNUM, sp); |
| 1067 | |
| 1068 | /* set back chain properly */ |
| 1069 | store_address (tmp_buffer, 4, saved_sp); |
| 1070 | write_memory (sp, tmp_buffer, 4); |
| 1071 | |
| 1072 | target_store_registers (-1); |
| 1073 | return sp; |
| 1074 | } |
| 1075 | |
| 1076 | /* Function: ppc_push_return_address (pc, sp) |
| 1077 | Set up the return address for the inferior function call. */ |
| 1078 | |
| 1079 | static CORE_ADDR |
| 1080 | ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
| 1081 | { |
| 1082 | write_register (PPC_LR_REGNUM, CALL_DUMMY_ADDRESS ()); |
| 1083 | return sp; |
| 1084 | } |
| 1085 | |
| 1086 | /* Extract a function return value of type TYPE from raw register array |
| 1087 | REGBUF, and copy that return value into VALBUF in virtual format. */ |
| 1088 | |
| 1089 | static void |
| 1090 | rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf) |
| 1091 | { |
| 1092 | int offset = 0; |
| 1093 | |
| 1094 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) |
| 1095 | { |
| 1096 | |
| 1097 | double dd; |
| 1098 | float ff; |
| 1099 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. |
| 1100 | We need to truncate the return value into float size (4 byte) if |
| 1101 | necessary. */ |
| 1102 | |
| 1103 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ |
| 1104 | memcpy (valbuf, |
| 1105 | ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
| 1106 | TYPE_LENGTH (valtype)); |
| 1107 | else |
| 1108 | { /* float */ |
| 1109 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
| 1110 | ff = (float) dd; |
| 1111 | memcpy (valbuf, &ff, sizeof (float)); |
| 1112 | } |
| 1113 | } |
| 1114 | else |
| 1115 | { |
| 1116 | /* return value is copied starting from r3. */ |
| 1117 | if (TARGET_BYTE_ORDER == BIG_ENDIAN |
| 1118 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) |
| 1119 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); |
| 1120 | |
| 1121 | memcpy (valbuf, |
| 1122 | regbuf + REGISTER_BYTE (3) + offset, |
| 1123 | TYPE_LENGTH (valtype)); |
| 1124 | } |
| 1125 | } |
| 1126 | |
| 1127 | /* Keep structure return address in this variable. |
| 1128 | FIXME: This is a horrid kludge which should not be allowed to continue |
| 1129 | living. This only allows a single nested call to a structure-returning |
| 1130 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ |
| 1131 | |
| 1132 | static CORE_ADDR rs6000_struct_return_address; |
| 1133 | |
| 1134 | /* Indirect function calls use a piece of trampoline code to do context |
| 1135 | switching, i.e. to set the new TOC table. Skip such code if we are on |
| 1136 | its first instruction (as when we have single-stepped to here). |
| 1137 | Also skip shared library trampoline code (which is different from |
| 1138 | indirect function call trampolines). |
| 1139 | Result is desired PC to step until, or NULL if we are not in |
| 1140 | trampoline code. */ |
| 1141 | |
| 1142 | CORE_ADDR |
| 1143 | rs6000_skip_trampoline_code (CORE_ADDR pc) |
| 1144 | { |
| 1145 | register unsigned int ii, op; |
| 1146 | CORE_ADDR solib_target_pc; |
| 1147 | |
| 1148 | static unsigned trampoline_code[] = |
| 1149 | { |
| 1150 | 0x800b0000, /* l r0,0x0(r11) */ |
| 1151 | 0x90410014, /* st r2,0x14(r1) */ |
| 1152 | 0x7c0903a6, /* mtctr r0 */ |
| 1153 | 0x804b0004, /* l r2,0x4(r11) */ |
| 1154 | 0x816b0008, /* l r11,0x8(r11) */ |
| 1155 | 0x4e800420, /* bctr */ |
| 1156 | 0x4e800020, /* br */ |
| 1157 | 0 |
| 1158 | }; |
| 1159 | |
| 1160 | /* If pc is in a shared library trampoline, return its target. */ |
| 1161 | solib_target_pc = find_solib_trampoline_target (pc); |
| 1162 | if (solib_target_pc) |
| 1163 | return solib_target_pc; |
| 1164 | |
| 1165 | for (ii = 0; trampoline_code[ii]; ++ii) |
| 1166 | { |
| 1167 | op = read_memory_integer (pc + (ii * 4), 4); |
| 1168 | if (op != trampoline_code[ii]) |
| 1169 | return 0; |
| 1170 | } |
| 1171 | ii = read_register (11); /* r11 holds destination addr */ |
| 1172 | pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */ |
| 1173 | return pc; |
| 1174 | } |
| 1175 | |
| 1176 | /* Determines whether the function FI has a frame on the stack or not. */ |
| 1177 | |
| 1178 | int |
| 1179 | rs6000_frameless_function_invocation (struct frame_info *fi) |
| 1180 | { |
| 1181 | CORE_ADDR func_start; |
| 1182 | struct rs6000_framedata fdata; |
| 1183 | |
| 1184 | /* Don't even think about framelessness except on the innermost frame |
| 1185 | or if the function was interrupted by a signal. */ |
| 1186 | if (fi->next != NULL && !fi->next->signal_handler_caller) |
| 1187 | return 0; |
| 1188 | |
| 1189 | func_start = get_pc_function_start (fi->pc); |
| 1190 | |
| 1191 | /* If we failed to find the start of the function, it is a mistake |
| 1192 | to inspect the instructions. */ |
| 1193 | |
| 1194 | if (!func_start) |
| 1195 | { |
| 1196 | /* A frame with a zero PC is usually created by dereferencing a NULL |
| 1197 | function pointer, normally causing an immediate core dump of the |
| 1198 | inferior. Mark function as frameless, as the inferior has no chance |
| 1199 | of setting up a stack frame. */ |
| 1200 | if (fi->pc == 0) |
| 1201 | return 1; |
| 1202 | else |
| 1203 | return 0; |
| 1204 | } |
| 1205 | |
| 1206 | (void) skip_prologue (func_start, fi->pc, &fdata); |
| 1207 | return fdata.frameless; |
| 1208 | } |
| 1209 | |
| 1210 | /* Return the PC saved in a frame */ |
| 1211 | |
| 1212 | CORE_ADDR |
| 1213 | rs6000_frame_saved_pc (struct frame_info *fi) |
| 1214 | { |
| 1215 | CORE_ADDR func_start; |
| 1216 | struct rs6000_framedata fdata; |
| 1217 | int wordsize = TDEP->wordsize; |
| 1218 | |
| 1219 | if (fi->signal_handler_caller) |
| 1220 | return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize); |
| 1221 | |
| 1222 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 1223 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); |
| 1224 | |
| 1225 | func_start = get_pc_function_start (fi->pc); |
| 1226 | |
| 1227 | /* If we failed to find the start of the function, it is a mistake |
| 1228 | to inspect the instructions. */ |
| 1229 | if (!func_start) |
| 1230 | return 0; |
| 1231 | |
| 1232 | (void) skip_prologue (func_start, fi->pc, &fdata); |
| 1233 | |
| 1234 | if (fdata.lr_offset == 0 && fi->next != NULL) |
| 1235 | { |
| 1236 | if (fi->next->signal_handler_caller) |
| 1237 | return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET, |
| 1238 | wordsize); |
| 1239 | else |
| 1240 | return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE, |
| 1241 | wordsize); |
| 1242 | } |
| 1243 | |
| 1244 | if (fdata.lr_offset == 0) |
| 1245 | return read_register (PPC_LR_REGNUM); |
| 1246 | |
| 1247 | return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize); |
| 1248 | } |
| 1249 | |
| 1250 | /* If saved registers of frame FI are not known yet, read and cache them. |
| 1251 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, |
| 1252 | in which case the framedata are read. */ |
| 1253 | |
| 1254 | static void |
| 1255 | frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap) |
| 1256 | { |
| 1257 | CORE_ADDR frame_addr; |
| 1258 | struct rs6000_framedata work_fdata; |
| 1259 | int wordsize = TDEP->wordsize; |
| 1260 | |
| 1261 | if (fi->saved_regs) |
| 1262 | return; |
| 1263 | |
| 1264 | if (fdatap == NULL) |
| 1265 | { |
| 1266 | fdatap = &work_fdata; |
| 1267 | (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, fdatap); |
| 1268 | } |
| 1269 | |
| 1270 | frame_saved_regs_zalloc (fi); |
| 1271 | |
| 1272 | /* If there were any saved registers, figure out parent's stack |
| 1273 | pointer. */ |
| 1274 | /* The following is true only if the frame doesn't have a call to |
| 1275 | alloca(), FIXME. */ |
| 1276 | |
| 1277 | if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0 |
| 1278 | && fdatap->lr_offset == 0 && fdatap->cr_offset == 0) |
| 1279 | frame_addr = 0; |
| 1280 | else if (fi->prev && fi->prev->frame) |
| 1281 | frame_addr = fi->prev->frame; |
| 1282 | else |
| 1283 | frame_addr = read_memory_addr (fi->frame, wordsize); |
| 1284 | |
| 1285 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. |
| 1286 | All fpr's from saved_fpr to fp31 are saved. */ |
| 1287 | |
| 1288 | if (fdatap->saved_fpr >= 0) |
| 1289 | { |
| 1290 | int i; |
| 1291 | CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset; |
| 1292 | for (i = fdatap->saved_fpr; i < 32; i++) |
| 1293 | { |
| 1294 | fi->saved_regs[FP0_REGNUM + i] = fpr_addr; |
| 1295 | fpr_addr += 8; |
| 1296 | } |
| 1297 | } |
| 1298 | |
| 1299 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. |
| 1300 | All gpr's from saved_gpr to gpr31 are saved. */ |
| 1301 | |
| 1302 | if (fdatap->saved_gpr >= 0) |
| 1303 | { |
| 1304 | int i; |
| 1305 | CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset; |
| 1306 | for (i = fdatap->saved_gpr; i < 32; i++) |
| 1307 | { |
| 1308 | fi->saved_regs[i] = gpr_addr; |
| 1309 | gpr_addr += wordsize; |
| 1310 | } |
| 1311 | } |
| 1312 | |
| 1313 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds |
| 1314 | the CR. */ |
| 1315 | if (fdatap->cr_offset != 0) |
| 1316 | fi->saved_regs[PPC_CR_REGNUM] = frame_addr + fdatap->cr_offset; |
| 1317 | |
| 1318 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds |
| 1319 | the LR. */ |
| 1320 | if (fdatap->lr_offset != 0) |
| 1321 | fi->saved_regs[PPC_LR_REGNUM] = frame_addr + fdatap->lr_offset; |
| 1322 | } |
| 1323 | |
| 1324 | /* Return the address of a frame. This is the inital %sp value when the frame |
| 1325 | was first allocated. For functions calling alloca(), it might be saved in |
| 1326 | an alloca register. */ |
| 1327 | |
| 1328 | static CORE_ADDR |
| 1329 | frame_initial_stack_address (struct frame_info *fi) |
| 1330 | { |
| 1331 | CORE_ADDR tmpaddr; |
| 1332 | struct rs6000_framedata fdata; |
| 1333 | struct frame_info *callee_fi; |
| 1334 | |
| 1335 | /* if the initial stack pointer (frame address) of this frame is known, |
| 1336 | just return it. */ |
| 1337 | |
| 1338 | if (fi->extra_info->initial_sp) |
| 1339 | return fi->extra_info->initial_sp; |
| 1340 | |
| 1341 | /* find out if this function is using an alloca register.. */ |
| 1342 | |
| 1343 | (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, &fdata); |
| 1344 | |
| 1345 | /* if saved registers of this frame are not known yet, read and cache them. */ |
| 1346 | |
| 1347 | if (!fi->saved_regs) |
| 1348 | frame_get_saved_regs (fi, &fdata); |
| 1349 | |
| 1350 | /* If no alloca register used, then fi->frame is the value of the %sp for |
| 1351 | this frame, and it is good enough. */ |
| 1352 | |
| 1353 | if (fdata.alloca_reg < 0) |
| 1354 | { |
| 1355 | fi->extra_info->initial_sp = fi->frame; |
| 1356 | return fi->extra_info->initial_sp; |
| 1357 | } |
| 1358 | |
| 1359 | /* This function has an alloca register. If this is the top-most frame |
| 1360 | (with the lowest address), the value in alloca register is good. */ |
| 1361 | |
| 1362 | if (!fi->next) |
| 1363 | return fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
| 1364 | |
| 1365 | /* Otherwise, this is a caller frame. Callee has usually already saved |
| 1366 | registers, but there are exceptions (such as when the callee |
| 1367 | has no parameters). Find the address in which caller's alloca |
| 1368 | register is saved. */ |
| 1369 | |
| 1370 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) |
| 1371 | { |
| 1372 | |
| 1373 | if (!callee_fi->saved_regs) |
| 1374 | frame_get_saved_regs (callee_fi, NULL); |
| 1375 | |
| 1376 | /* this is the address in which alloca register is saved. */ |
| 1377 | |
| 1378 | tmpaddr = callee_fi->saved_regs[fdata.alloca_reg]; |
| 1379 | if (tmpaddr) |
| 1380 | { |
| 1381 | fi->extra_info->initial_sp = |
| 1382 | read_memory_addr (tmpaddr, TDEP->wordsize); |
| 1383 | return fi->extra_info->initial_sp; |
| 1384 | } |
| 1385 | |
| 1386 | /* Go look into deeper levels of the frame chain to see if any one of |
| 1387 | the callees has saved alloca register. */ |
| 1388 | } |
| 1389 | |
| 1390 | /* If alloca register was not saved, by the callee (or any of its callees) |
| 1391 | then the value in the register is still good. */ |
| 1392 | |
| 1393 | fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
| 1394 | return fi->extra_info->initial_sp; |
| 1395 | } |
| 1396 | |
| 1397 | /* Describe the pointer in each stack frame to the previous stack frame |
| 1398 | (its caller). */ |
| 1399 | |
| 1400 | /* FRAME_CHAIN takes a frame's nominal address |
| 1401 | and produces the frame's chain-pointer. */ |
| 1402 | |
| 1403 | /* In the case of the RS/6000, the frame's nominal address |
| 1404 | is the address of a 4-byte word containing the calling frame's address. */ |
| 1405 | |
| 1406 | CORE_ADDR |
| 1407 | rs6000_frame_chain (struct frame_info *thisframe) |
| 1408 | { |
| 1409 | CORE_ADDR fp, fpp, lr; |
| 1410 | int wordsize = TDEP->wordsize; |
| 1411 | |
| 1412 | if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame)) |
| 1413 | return thisframe->frame; /* dummy frame same as caller's frame */ |
| 1414 | |
| 1415 | if (inside_entry_file (thisframe->pc) || |
| 1416 | thisframe->pc == entry_point_address ()) |
| 1417 | return 0; |
| 1418 | |
| 1419 | if (thisframe->signal_handler_caller) |
| 1420 | fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET, |
| 1421 | wordsize); |
| 1422 | else if (thisframe->next != NULL |
| 1423 | && thisframe->next->signal_handler_caller |
| 1424 | && FRAMELESS_FUNCTION_INVOCATION (thisframe)) |
| 1425 | /* A frameless function interrupted by a signal did not change the |
| 1426 | frame pointer. */ |
| 1427 | fp = FRAME_FP (thisframe); |
| 1428 | else |
| 1429 | fp = read_memory_addr ((thisframe)->frame, wordsize); |
| 1430 | |
| 1431 | lr = read_register (PPC_LR_REGNUM); |
| 1432 | if (lr == entry_point_address ()) |
| 1433 | if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0) |
| 1434 | if (PC_IN_CALL_DUMMY (lr, fpp, fpp)) |
| 1435 | return fpp; |
| 1436 | |
| 1437 | return fp; |
| 1438 | } |
| 1439 | |
| 1440 | /* Return the size of register REG when words are WORDSIZE bytes long. If REG |
| 1441 | isn't available with that word size, return 0. */ |
| 1442 | |
| 1443 | static int |
| 1444 | regsize (const struct reg *reg, int wordsize) |
| 1445 | { |
| 1446 | return wordsize == 8 ? reg->sz64 : reg->sz32; |
| 1447 | } |
| 1448 | |
| 1449 | /* Return the name of register number N, or null if no such register exists |
| 1450 | in the current architecture. */ |
| 1451 | |
| 1452 | static char * |
| 1453 | rs6000_register_name (int n) |
| 1454 | { |
| 1455 | struct gdbarch_tdep *tdep = TDEP; |
| 1456 | const struct reg *reg = tdep->regs + n; |
| 1457 | |
| 1458 | if (!regsize (reg, tdep->wordsize)) |
| 1459 | return NULL; |
| 1460 | return reg->name; |
| 1461 | } |
| 1462 | |
| 1463 | /* Index within `registers' of the first byte of the space for |
| 1464 | register N. */ |
| 1465 | |
| 1466 | static int |
| 1467 | rs6000_register_byte (int n) |
| 1468 | { |
| 1469 | return TDEP->regoff[n]; |
| 1470 | } |
| 1471 | |
| 1472 | /* Return the number of bytes of storage in the actual machine representation |
| 1473 | for register N if that register is available, else return 0. */ |
| 1474 | |
| 1475 | static int |
| 1476 | rs6000_register_raw_size (int n) |
| 1477 | { |
| 1478 | struct gdbarch_tdep *tdep = TDEP; |
| 1479 | const struct reg *reg = tdep->regs + n; |
| 1480 | return regsize (reg, tdep->wordsize); |
| 1481 | } |
| 1482 | |
| 1483 | /* Number of bytes of storage in the program's representation |
| 1484 | for register N. */ |
| 1485 | |
| 1486 | static int |
| 1487 | rs6000_register_virtual_size (int n) |
| 1488 | { |
| 1489 | return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n)); |
| 1490 | } |
| 1491 | |
| 1492 | /* Return the GDB type object for the "standard" data type |
| 1493 | of data in register N. */ |
| 1494 | |
| 1495 | static struct type * |
| 1496 | rs6000_register_virtual_type (int n) |
| 1497 | { |
| 1498 | struct gdbarch_tdep *tdep = TDEP; |
| 1499 | const struct reg *reg = tdep->regs + n; |
| 1500 | |
| 1501 | return reg->fpr ? builtin_type_double : |
| 1502 | regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 : |
| 1503 | builtin_type_int32; |
| 1504 | } |
| 1505 | |
| 1506 | /* For the PowerPC, it appears that the debug info marks float parameters as |
| 1507 | floats regardless of whether the function is prototyped, but the actual |
| 1508 | values are always passed in as doubles. Tell gdb to always assume that |
| 1509 | floats are passed as doubles and then converted in the callee. */ |
| 1510 | |
| 1511 | static int |
| 1512 | rs6000_coerce_float_to_double (struct type *formal, struct type *actual) |
| 1513 | { |
| 1514 | return 1; |
| 1515 | } |
| 1516 | |
| 1517 | /* Return whether register N requires conversion when moving from raw format |
| 1518 | to virtual format. |
| 1519 | |
| 1520 | The register format for RS/6000 floating point registers is always |
| 1521 | double, we need a conversion if the memory format is float. */ |
| 1522 | |
| 1523 | static int |
| 1524 | rs6000_register_convertible (int n) |
| 1525 | { |
| 1526 | const struct reg *reg = TDEP->regs + n; |
| 1527 | return reg->fpr; |
| 1528 | } |
| 1529 | |
| 1530 | /* Convert data from raw format for register N in buffer FROM |
| 1531 | to virtual format with type TYPE in buffer TO. */ |
| 1532 | |
| 1533 | static void |
| 1534 | rs6000_register_convert_to_virtual (int n, struct type *type, |
| 1535 | char *from, char *to) |
| 1536 | { |
| 1537 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) |
| 1538 | { |
| 1539 | double val = extract_floating (from, REGISTER_RAW_SIZE (n)); |
| 1540 | store_floating (to, TYPE_LENGTH (type), val); |
| 1541 | } |
| 1542 | else |
| 1543 | memcpy (to, from, REGISTER_RAW_SIZE (n)); |
| 1544 | } |
| 1545 | |
| 1546 | /* Convert data from virtual format with type TYPE in buffer FROM |
| 1547 | to raw format for register N in buffer TO. */ |
| 1548 | |
| 1549 | static void |
| 1550 | rs6000_register_convert_to_raw (struct type *type, int n, |
| 1551 | char *from, char *to) |
| 1552 | { |
| 1553 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) |
| 1554 | { |
| 1555 | double val = extract_floating (from, TYPE_LENGTH (type)); |
| 1556 | store_floating (to, REGISTER_RAW_SIZE (n), val); |
| 1557 | } |
| 1558 | else |
| 1559 | memcpy (to, from, REGISTER_RAW_SIZE (n)); |
| 1560 | } |
| 1561 | |
| 1562 | /* Store the address of the place in which to copy the structure the |
| 1563 | subroutine will return. This is called from call_function. |
| 1564 | |
| 1565 | In RS/6000, struct return addresses are passed as an extra parameter in r3. |
| 1566 | In function return, callee is not responsible of returning this address |
| 1567 | back. Since gdb needs to find it, we will store in a designated variable |
| 1568 | `rs6000_struct_return_address'. */ |
| 1569 | |
| 1570 | static void |
| 1571 | rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) |
| 1572 | { |
| 1573 | write_register (3, addr); |
| 1574 | rs6000_struct_return_address = addr; |
| 1575 | } |
| 1576 | |
| 1577 | /* Write into appropriate registers a function return value |
| 1578 | of type TYPE, given in virtual format. */ |
| 1579 | |
| 1580 | static void |
| 1581 | rs6000_store_return_value (struct type *type, char *valbuf) |
| 1582 | { |
| 1583 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
| 1584 | |
| 1585 | /* Floating point values are returned starting from FPR1 and up. |
| 1586 | Say a double_double_double type could be returned in |
| 1587 | FPR1/FPR2/FPR3 triple. */ |
| 1588 | |
| 1589 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf, |
| 1590 | TYPE_LENGTH (type)); |
| 1591 | else |
| 1592 | /* Everything else is returned in GPR3 and up. */ |
| 1593 | write_register_bytes (REGISTER_BYTE (PPC_GP0_REGNUM + 3), valbuf, |
| 1594 | TYPE_LENGTH (type)); |
| 1595 | } |
| 1596 | |
| 1597 | /* Extract from an array REGBUF containing the (raw) register state |
| 1598 | the address in which a function should return its structure value, |
| 1599 | as a CORE_ADDR (or an expression that can be used as one). */ |
| 1600 | |
| 1601 | static CORE_ADDR |
| 1602 | rs6000_extract_struct_value_address (char *regbuf) |
| 1603 | { |
| 1604 | return rs6000_struct_return_address; |
| 1605 | } |
| 1606 | |
| 1607 | /* Return whether PC is in a dummy function call. |
| 1608 | |
| 1609 | FIXME: This just checks for the end of the stack, which is broken |
| 1610 | for things like stepping through gcc nested function stubs. */ |
| 1611 | |
| 1612 | static int |
| 1613 | rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp) |
| 1614 | { |
| 1615 | return sp < pc && pc < fp; |
| 1616 | } |
| 1617 | |
| 1618 | /* Hook called when a new child process is started. */ |
| 1619 | |
| 1620 | void |
| 1621 | rs6000_create_inferior (int pid) |
| 1622 | { |
| 1623 | if (rs6000_set_host_arch_hook) |
| 1624 | rs6000_set_host_arch_hook (pid); |
| 1625 | } |
| 1626 | \f |
| 1627 | /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR). |
| 1628 | |
| 1629 | Usually a function pointer's representation is simply the address |
| 1630 | of the function. On the RS/6000 however, a function pointer is |
| 1631 | represented by a pointer to a TOC entry. This TOC entry contains |
| 1632 | three words, the first word is the address of the function, the |
| 1633 | second word is the TOC pointer (r2), and the third word is the |
| 1634 | static chain value. Throughout GDB it is currently assumed that a |
| 1635 | function pointer contains the address of the function, which is not |
| 1636 | easy to fix. In addition, the conversion of a function address to |
| 1637 | a function pointer would require allocation of a TOC entry in the |
| 1638 | inferior's memory space, with all its drawbacks. To be able to |
| 1639 | call C++ virtual methods in the inferior (which are called via |
| 1640 | function pointers), find_function_addr uses this function to get the |
| 1641 | function address from a function pointer. */ |
| 1642 | |
| 1643 | /* Return real function address if ADDR (a function pointer) is in the data |
| 1644 | space and is therefore a special function pointer. */ |
| 1645 | |
| 1646 | CORE_ADDR |
| 1647 | rs6000_convert_from_func_ptr_addr (CORE_ADDR addr) |
| 1648 | { |
| 1649 | struct obj_section *s; |
| 1650 | |
| 1651 | s = find_pc_section (addr); |
| 1652 | if (s && s->the_bfd_section->flags & SEC_CODE) |
| 1653 | return addr; |
| 1654 | |
| 1655 | /* ADDR is in the data space, so it's a special function pointer. */ |
| 1656 | return read_memory_addr (addr, TDEP->wordsize); |
| 1657 | } |
| 1658 | \f |
| 1659 | |
| 1660 | /* Handling the various POWER/PowerPC variants. */ |
| 1661 | |
| 1662 | |
| 1663 | /* The arrays here called registers_MUMBLE hold information about available |
| 1664 | registers. |
| 1665 | |
| 1666 | For each family of PPC variants, I've tried to isolate out the |
| 1667 | common registers and put them up front, so that as long as you get |
| 1668 | the general family right, GDB will correctly identify the registers |
| 1669 | common to that family. The common register sets are: |
| 1670 | |
| 1671 | For the 60x family: hid0 hid1 iabr dabr pir |
| 1672 | |
| 1673 | For the 505 and 860 family: eie eid nri |
| 1674 | |
| 1675 | For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi |
| 1676 | tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1 |
| 1677 | pbu1 pbl2 pbu2 |
| 1678 | |
| 1679 | Most of these register groups aren't anything formal. I arrived at |
| 1680 | them by looking at the registers that occurred in more than one |
| 1681 | processor. */ |
| 1682 | |
| 1683 | /* Convenience macros for populating register arrays. */ |
| 1684 | |
| 1685 | /* Within another macro, convert S to a string. */ |
| 1686 | |
| 1687 | #define STR(s) #s |
| 1688 | |
| 1689 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems |
| 1690 | and 64 bits on 64-bit systems. */ |
| 1691 | #define R(name) { STR(name), 4, 8, 0 } |
| 1692 | |
| 1693 | /* Return a struct reg defining register NAME that's 32 bits on all |
| 1694 | systems. */ |
| 1695 | #define R4(name) { STR(name), 4, 4, 0 } |
| 1696 | |
| 1697 | /* Return a struct reg defining register NAME that's 64 bits on all |
| 1698 | systems. */ |
| 1699 | #define R8(name) { STR(name), 8, 8, 0 } |
| 1700 | |
| 1701 | /* Return a struct reg defining floating-point register NAME. */ |
| 1702 | #define F(name) { STR(name), 8, 8, 1 } |
| 1703 | |
| 1704 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit |
| 1705 | systems and that doesn't exist on 64-bit systems. */ |
| 1706 | #define R32(name) { STR(name), 4, 0, 0 } |
| 1707 | |
| 1708 | /* Return a struct reg defining register NAME that's 64 bits on 64-bit |
| 1709 | systems and that doesn't exist on 32-bit systems. */ |
| 1710 | #define R64(name) { STR(name), 0, 8, 0 } |
| 1711 | |
| 1712 | /* Return a struct reg placeholder for a register that doesn't exist. */ |
| 1713 | #define R0 { 0, 0, 0, 0 } |
| 1714 | |
| 1715 | /* UISA registers common across all architectures, including POWER. */ |
| 1716 | |
| 1717 | #define COMMON_UISA_REGS \ |
| 1718 | /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \ |
| 1719 | /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \ |
| 1720 | /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \ |
| 1721 | /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \ |
| 1722 | /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \ |
| 1723 | /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \ |
| 1724 | /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \ |
| 1725 | /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \ |
| 1726 | /* 64 */ R(pc), R(ps) |
| 1727 | |
| 1728 | /* UISA-level SPRs for PowerPC. */ |
| 1729 | #define PPC_UISA_SPRS \ |
| 1730 | /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0 |
| 1731 | |
| 1732 | /* Segment registers, for PowerPC. */ |
| 1733 | #define PPC_SEGMENT_REGS \ |
| 1734 | /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \ |
| 1735 | /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \ |
| 1736 | /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \ |
| 1737 | /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15) |
| 1738 | |
| 1739 | /* OEA SPRs for PowerPC. */ |
| 1740 | #define PPC_OEA_SPRS \ |
| 1741 | /* 87 */ R4(pvr), \ |
| 1742 | /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \ |
| 1743 | /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \ |
| 1744 | /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \ |
| 1745 | /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \ |
| 1746 | /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \ |
| 1747 | /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \ |
| 1748 | /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \ |
| 1749 | /* 116 */ R4(dec), R(dabr), R4(ear) |
| 1750 | |
| 1751 | /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover |
| 1752 | user-level SPR's. */ |
| 1753 | static const struct reg registers_power[] = |
| 1754 | { |
| 1755 | COMMON_UISA_REGS, |
| 1756 | /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq) |
| 1757 | }; |
| 1758 | |
| 1759 | /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only |
| 1760 | view of the PowerPC. */ |
| 1761 | static const struct reg registers_powerpc[] = |
| 1762 | { |
| 1763 | COMMON_UISA_REGS, |
| 1764 | PPC_UISA_SPRS |
| 1765 | }; |
| 1766 | |
| 1767 | /* IBM PowerPC 403. */ |
| 1768 | static const struct reg registers_403[] = |
| 1769 | { |
| 1770 | COMMON_UISA_REGS, |
| 1771 | PPC_UISA_SPRS, |
| 1772 | PPC_SEGMENT_REGS, |
| 1773 | PPC_OEA_SPRS, |
| 1774 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), |
| 1775 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), |
| 1776 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), |
| 1777 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), |
| 1778 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), |
| 1779 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2) |
| 1780 | }; |
| 1781 | |
| 1782 | /* IBM PowerPC 403GC. */ |
| 1783 | static const struct reg registers_403GC[] = |
| 1784 | { |
| 1785 | COMMON_UISA_REGS, |
| 1786 | PPC_UISA_SPRS, |
| 1787 | PPC_SEGMENT_REGS, |
| 1788 | PPC_OEA_SPRS, |
| 1789 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), |
| 1790 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), |
| 1791 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), |
| 1792 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), |
| 1793 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), |
| 1794 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2), |
| 1795 | /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr), |
| 1796 | /* 147 */ R(tbhu), R(tblu) |
| 1797 | }; |
| 1798 | |
| 1799 | /* Motorola PowerPC 505. */ |
| 1800 | static const struct reg registers_505[] = |
| 1801 | { |
| 1802 | COMMON_UISA_REGS, |
| 1803 | PPC_UISA_SPRS, |
| 1804 | PPC_SEGMENT_REGS, |
| 1805 | PPC_OEA_SPRS, |
| 1806 | /* 119 */ R(eie), R(eid), R(nri) |
| 1807 | }; |
| 1808 | |
| 1809 | /* Motorola PowerPC 860 or 850. */ |
| 1810 | static const struct reg registers_860[] = |
| 1811 | { |
| 1812 | COMMON_UISA_REGS, |
| 1813 | PPC_UISA_SPRS, |
| 1814 | PPC_SEGMENT_REGS, |
| 1815 | PPC_OEA_SPRS, |
| 1816 | /* 119 */ R(eie), R(eid), R(nri), R(cmpa), |
| 1817 | /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr), |
| 1818 | /* 127 */ R(der), R(counta), R(countb), R(cmpe), |
| 1819 | /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1), |
| 1820 | /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst), |
| 1821 | /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr), |
| 1822 | /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr), |
| 1823 | /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc), |
| 1824 | /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap), |
| 1825 | /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn), |
| 1826 | /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1), |
| 1827 | /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1) |
| 1828 | }; |
| 1829 | |
| 1830 | /* Motorola PowerPC 601. Note that the 601 has different register numbers |
| 1831 | for reading and writing RTCU and RTCL. However, how one reads and writes a |
| 1832 | register is the stub's problem. */ |
| 1833 | static const struct reg registers_601[] = |
| 1834 | { |
| 1835 | COMMON_UISA_REGS, |
| 1836 | PPC_UISA_SPRS, |
| 1837 | PPC_SEGMENT_REGS, |
| 1838 | PPC_OEA_SPRS, |
| 1839 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), |
| 1840 | /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl) |
| 1841 | }; |
| 1842 | |
| 1843 | /* Motorola PowerPC 602. */ |
| 1844 | static const struct reg registers_602[] = |
| 1845 | { |
| 1846 | COMMON_UISA_REGS, |
| 1847 | PPC_UISA_SPRS, |
| 1848 | PPC_SEGMENT_REGS, |
| 1849 | PPC_OEA_SPRS, |
| 1850 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, |
| 1851 | /* 123 */ R0, R(tcr), R(ibr), R(esassr), |
| 1852 | /* 127 */ R(sebr), R(ser), R(sp), R(lt) |
| 1853 | }; |
| 1854 | |
| 1855 | /* Motorola/IBM PowerPC 603 or 603e. */ |
| 1856 | static const struct reg registers_603[] = |
| 1857 | { |
| 1858 | COMMON_UISA_REGS, |
| 1859 | PPC_UISA_SPRS, |
| 1860 | PPC_SEGMENT_REGS, |
| 1861 | PPC_OEA_SPRS, |
| 1862 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, |
| 1863 | /* 123 */ R0, R(dmiss), R(dcmp), R(hash1), |
| 1864 | /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa) |
| 1865 | }; |
| 1866 | |
| 1867 | /* Motorola PowerPC 604 or 604e. */ |
| 1868 | static const struct reg registers_604[] = |
| 1869 | { |
| 1870 | COMMON_UISA_REGS, |
| 1871 | PPC_UISA_SPRS, |
| 1872 | PPC_SEGMENT_REGS, |
| 1873 | PPC_OEA_SPRS, |
| 1874 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), |
| 1875 | /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2), |
| 1876 | /* 127 */ R(sia), R(sda) |
| 1877 | }; |
| 1878 | |
| 1879 | /* Motorola/IBM PowerPC 750 or 740. */ |
| 1880 | static const struct reg registers_750[] = |
| 1881 | { |
| 1882 | COMMON_UISA_REGS, |
| 1883 | PPC_UISA_SPRS, |
| 1884 | PPC_SEGMENT_REGS, |
| 1885 | PPC_OEA_SPRS, |
| 1886 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), |
| 1887 | /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2), |
| 1888 | /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4), |
| 1889 | /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia), |
| 1890 | /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr), |
| 1891 | /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3) |
| 1892 | }; |
| 1893 | |
| 1894 | |
| 1895 | /* Information about a particular processor variant. */ |
| 1896 | |
| 1897 | struct variant |
| 1898 | { |
| 1899 | /* Name of this variant. */ |
| 1900 | char *name; |
| 1901 | |
| 1902 | /* English description of the variant. */ |
| 1903 | char *description; |
| 1904 | |
| 1905 | /* bfd_arch_info.arch corresponding to variant. */ |
| 1906 | enum bfd_architecture arch; |
| 1907 | |
| 1908 | /* bfd_arch_info.mach corresponding to variant. */ |
| 1909 | unsigned long mach; |
| 1910 | |
| 1911 | /* Table of register names; registers[R] is the name of the register |
| 1912 | number R. */ |
| 1913 | int nregs; |
| 1914 | const struct reg *regs; |
| 1915 | }; |
| 1916 | |
| 1917 | #define num_registers(list) (sizeof (list) / sizeof((list)[0])) |
| 1918 | |
| 1919 | |
| 1920 | /* Information in this table comes from the following web sites: |
| 1921 | IBM: http://www.chips.ibm.com:80/products/embedded/ |
| 1922 | Motorola: http://www.mot.com/SPS/PowerPC/ |
| 1923 | |
| 1924 | I'm sure I've got some of the variant descriptions not quite right. |
| 1925 | Please report any inaccuracies you find to GDB's maintainer. |
| 1926 | |
| 1927 | If you add entries to this table, please be sure to allow the new |
| 1928 | value as an argument to the --with-cpu flag, in configure.in. */ |
| 1929 | |
| 1930 | static const struct variant variants[] = |
| 1931 | { |
| 1932 | {"powerpc", "PowerPC user-level", bfd_arch_powerpc, |
| 1933 | bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc}, |
| 1934 | {"power", "POWER user-level", bfd_arch_rs6000, |
| 1935 | bfd_mach_rs6k, num_registers (registers_power), registers_power}, |
| 1936 | {"403", "IBM PowerPC 403", bfd_arch_powerpc, |
| 1937 | bfd_mach_ppc_403, num_registers (registers_403), registers_403}, |
| 1938 | {"601", "Motorola PowerPC 601", bfd_arch_powerpc, |
| 1939 | bfd_mach_ppc_601, num_registers (registers_601), registers_601}, |
| 1940 | {"602", "Motorola PowerPC 602", bfd_arch_powerpc, |
| 1941 | bfd_mach_ppc_602, num_registers (registers_602), registers_602}, |
| 1942 | {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc, |
| 1943 | bfd_mach_ppc_603, num_registers (registers_603), registers_603}, |
| 1944 | {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc, |
| 1945 | 604, num_registers (registers_604), registers_604}, |
| 1946 | {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc, |
| 1947 | bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC}, |
| 1948 | {"505", "Motorola PowerPC 505", bfd_arch_powerpc, |
| 1949 | bfd_mach_ppc_505, num_registers (registers_505), registers_505}, |
| 1950 | {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc, |
| 1951 | bfd_mach_ppc_860, num_registers (registers_860), registers_860}, |
| 1952 | {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc, |
| 1953 | bfd_mach_ppc_750, num_registers (registers_750), registers_750}, |
| 1954 | |
| 1955 | /* FIXME: I haven't checked the register sets of the following. */ |
| 1956 | {"620", "Motorola PowerPC 620", bfd_arch_powerpc, |
| 1957 | bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc}, |
| 1958 | {"a35", "PowerPC A35", bfd_arch_powerpc, |
| 1959 | bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc}, |
| 1960 | {"rs1", "IBM POWER RS1", bfd_arch_rs6000, |
| 1961 | bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power}, |
| 1962 | {"rsc", "IBM POWER RSC", bfd_arch_rs6000, |
| 1963 | bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power}, |
| 1964 | {"rs2", "IBM POWER RS2", bfd_arch_rs6000, |
| 1965 | bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power}, |
| 1966 | |
| 1967 | {0, 0, 0, 0} |
| 1968 | }; |
| 1969 | |
| 1970 | #undef num_registers |
| 1971 | |
| 1972 | /* Look up the variant named NAME in the `variants' table. Return a |
| 1973 | pointer to the struct variant, or null if we couldn't find it. */ |
| 1974 | |
| 1975 | static const struct variant * |
| 1976 | find_variant_by_name (char *name) |
| 1977 | { |
| 1978 | const struct variant *v; |
| 1979 | |
| 1980 | for (v = variants; v->name; v++) |
| 1981 | if (!strcmp (name, v->name)) |
| 1982 | return v; |
| 1983 | |
| 1984 | return NULL; |
| 1985 | } |
| 1986 | |
| 1987 | /* Return the variant corresponding to architecture ARCH and machine number |
| 1988 | MACH. If no such variant exists, return null. */ |
| 1989 | |
| 1990 | static const struct variant * |
| 1991 | find_variant_by_arch (enum bfd_architecture arch, unsigned long mach) |
| 1992 | { |
| 1993 | const struct variant *v; |
| 1994 | |
| 1995 | for (v = variants; v->name; v++) |
| 1996 | if (arch == v->arch && mach == v->mach) |
| 1997 | return v; |
| 1998 | |
| 1999 | return NULL; |
| 2000 | } |
| 2001 | |
| 2002 | |
| 2003 | |
| 2004 | \f |
| 2005 | static void |
| 2006 | process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj) |
| 2007 | { |
| 2008 | int *os_ident_ptr = obj; |
| 2009 | const char *name; |
| 2010 | unsigned int sectsize; |
| 2011 | |
| 2012 | name = bfd_get_section_name (abfd, sect); |
| 2013 | sectsize = bfd_section_size (abfd, sect); |
| 2014 | if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0) |
| 2015 | { |
| 2016 | unsigned int name_length, data_length, note_type; |
| 2017 | char *note = alloca (sectsize); |
| 2018 | |
| 2019 | bfd_get_section_contents (abfd, sect, note, |
| 2020 | (file_ptr) 0, (bfd_size_type) sectsize); |
| 2021 | |
| 2022 | name_length = bfd_h_get_32 (abfd, note); |
| 2023 | data_length = bfd_h_get_32 (abfd, note + 4); |
| 2024 | note_type = bfd_h_get_32 (abfd, note + 8); |
| 2025 | |
| 2026 | if (name_length == 4 && data_length == 16 && note_type == 1 |
| 2027 | && strcmp (note + 12, "GNU") == 0) |
| 2028 | { |
| 2029 | int os_number = bfd_h_get_32 (abfd, note + 16); |
| 2030 | |
| 2031 | /* The case numbers are from abi-tags in glibc */ |
| 2032 | switch (os_number) |
| 2033 | { |
| 2034 | case 0 : |
| 2035 | *os_ident_ptr = ELFOSABI_LINUX; |
| 2036 | break; |
| 2037 | case 1 : |
| 2038 | *os_ident_ptr = ELFOSABI_HURD; |
| 2039 | break; |
| 2040 | case 2 : |
| 2041 | *os_ident_ptr = ELFOSABI_SOLARIS; |
| 2042 | break; |
| 2043 | default : |
| 2044 | internal_error (__FILE__, __LINE__, |
| 2045 | "process_note_abi_sections: unknown OS number %d", |
| 2046 | os_number); |
| 2047 | break; |
| 2048 | } |
| 2049 | } |
| 2050 | } |
| 2051 | } |
| 2052 | |
| 2053 | /* Return one of the ELFOSABI_ constants for BFDs representing ELF |
| 2054 | executables. If it's not an ELF executable or if the OS/ABI couldn't |
| 2055 | be determined, simply return -1. */ |
| 2056 | |
| 2057 | static int |
| 2058 | get_elfosabi (bfd *abfd) |
| 2059 | { |
| 2060 | int elfosabi = -1; |
| 2061 | |
| 2062 | if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour) |
| 2063 | { |
| 2064 | elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI]; |
| 2065 | |
| 2066 | /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate |
| 2067 | that we're on a SYSV system. However, GNU/Linux uses a note section |
| 2068 | to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we |
| 2069 | have to check the note sections too. */ |
| 2070 | if (elfosabi == 0) |
| 2071 | { |
| 2072 | bfd_map_over_sections (abfd, |
| 2073 | process_note_abi_tag_sections, |
| 2074 | &elfosabi); |
| 2075 | } |
| 2076 | } |
| 2077 | |
| 2078 | return elfosabi; |
| 2079 | } |
| 2080 | |
| 2081 | \f |
| 2082 | |
| 2083 | /* Initialize the current architecture based on INFO. If possible, re-use an |
| 2084 | architecture from ARCHES, which is a list of architectures already created |
| 2085 | during this debugging session. |
| 2086 | |
| 2087 | Called e.g. at program startup, when reading a core file, and when reading |
| 2088 | a binary file. */ |
| 2089 | |
| 2090 | static struct gdbarch * |
| 2091 | rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 2092 | { |
| 2093 | struct gdbarch *gdbarch; |
| 2094 | struct gdbarch_tdep *tdep; |
| 2095 | int wordsize, from_xcoff_exec, from_elf_exec, power, i, off; |
| 2096 | struct reg *regs; |
| 2097 | const struct variant *v; |
| 2098 | enum bfd_architecture arch; |
| 2099 | unsigned long mach; |
| 2100 | bfd abfd; |
| 2101 | int osabi, sysv_abi; |
| 2102 | |
| 2103 | from_xcoff_exec = info.abfd && info.abfd->format == bfd_object && |
| 2104 | bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour; |
| 2105 | |
| 2106 | from_elf_exec = info.abfd && info.abfd->format == bfd_object && |
| 2107 | bfd_get_flavour (info.abfd) == bfd_target_elf_flavour; |
| 2108 | |
| 2109 | sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour; |
| 2110 | |
| 2111 | osabi = get_elfosabi (info.abfd); |
| 2112 | |
| 2113 | /* Check word size. If INFO is from a binary file, infer it from that, |
| 2114 | else use the previously-inferred size. */ |
| 2115 | if (from_xcoff_exec) |
| 2116 | { |
| 2117 | if (xcoff_data (info.abfd)->xcoff64) |
| 2118 | wordsize = 8; |
| 2119 | else |
| 2120 | wordsize = 4; |
| 2121 | } |
| 2122 | else if (from_elf_exec) |
| 2123 | { |
| 2124 | if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64) |
| 2125 | wordsize = 8; |
| 2126 | else |
| 2127 | wordsize = 4; |
| 2128 | } |
| 2129 | else |
| 2130 | { |
| 2131 | tdep = TDEP; |
| 2132 | if (tdep) |
| 2133 | wordsize = tdep->wordsize; |
| 2134 | else |
| 2135 | wordsize = 4; |
| 2136 | } |
| 2137 | |
| 2138 | /* Find a candidate among extant architectures. */ |
| 2139 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
| 2140 | arches != NULL; |
| 2141 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) |
| 2142 | { |
| 2143 | /* Word size in the various PowerPC bfd_arch_info structs isn't |
| 2144 | meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform |
| 2145 | separate word size check. */ |
| 2146 | tdep = gdbarch_tdep (arches->gdbarch); |
| 2147 | if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi) |
| 2148 | return arches->gdbarch; |
| 2149 | } |
| 2150 | |
| 2151 | /* None found, create a new architecture from INFO, whose bfd_arch_info |
| 2152 | validity depends on the source: |
| 2153 | - executable useless |
| 2154 | - rs6000_host_arch() good |
| 2155 | - core file good |
| 2156 | - "set arch" trust blindly |
| 2157 | - GDB startup useless but harmless */ |
| 2158 | |
| 2159 | if (!from_xcoff_exec) |
| 2160 | { |
| 2161 | arch = info.bfd_architecture; |
| 2162 | mach = info.bfd_arch_info->mach; |
| 2163 | } |
| 2164 | else |
| 2165 | { |
| 2166 | arch = bfd_arch_powerpc; |
| 2167 | mach = 0; |
| 2168 | bfd_default_set_arch_mach (&abfd, arch, mach); |
| 2169 | info.bfd_arch_info = bfd_get_arch_info (&abfd); |
| 2170 | } |
| 2171 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); |
| 2172 | tdep->wordsize = wordsize; |
| 2173 | tdep->osabi = osabi; |
| 2174 | gdbarch = gdbarch_alloc (&info, tdep); |
| 2175 | power = arch == bfd_arch_rs6000; |
| 2176 | |
| 2177 | /* Select instruction printer. */ |
| 2178 | tm_print_insn = arch == power ? print_insn_rs6000 : |
| 2179 | info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc : |
| 2180 | print_insn_little_powerpc; |
| 2181 | |
| 2182 | /* Choose variant. */ |
| 2183 | v = find_variant_by_arch (arch, mach); |
| 2184 | if (!v) |
| 2185 | v = find_variant_by_name (power ? "power" : "powerpc"); |
| 2186 | tdep->regs = v->regs; |
| 2187 | |
| 2188 | /* Calculate byte offsets in raw register array. */ |
| 2189 | tdep->regoff = xmalloc (v->nregs * sizeof (int)); |
| 2190 | for (i = off = 0; i < v->nregs; i++) |
| 2191 | { |
| 2192 | tdep->regoff[i] = off; |
| 2193 | off += regsize (v->regs + i, wordsize); |
| 2194 | } |
| 2195 | |
| 2196 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); |
| 2197 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); |
| 2198 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); |
| 2199 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); |
| 2200 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); |
| 2201 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); |
| 2202 | |
| 2203 | set_gdbarch_num_regs (gdbarch, v->nregs); |
| 2204 | set_gdbarch_sp_regnum (gdbarch, 1); |
| 2205 | set_gdbarch_fp_regnum (gdbarch, 1); |
| 2206 | set_gdbarch_pc_regnum (gdbarch, 64); |
| 2207 | set_gdbarch_register_name (gdbarch, rs6000_register_name); |
| 2208 | set_gdbarch_register_size (gdbarch, wordsize); |
| 2209 | set_gdbarch_register_bytes (gdbarch, off); |
| 2210 | set_gdbarch_register_byte (gdbarch, rs6000_register_byte); |
| 2211 | set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size); |
| 2212 | set_gdbarch_max_register_raw_size (gdbarch, 8); |
| 2213 | set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size); |
| 2214 | set_gdbarch_max_register_virtual_size (gdbarch, 8); |
| 2215 | set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type); |
| 2216 | |
| 2217 | set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT); |
| 2218 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 2219 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 2220 | set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT); |
| 2221 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 2222 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 2223 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 2224 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 2225 | |
| 2226 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); |
| 2227 | set_gdbarch_call_dummy_length (gdbarch, 0); |
| 2228 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); |
| 2229 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); |
| 2230 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); |
| 2231 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); |
| 2232 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); |
| 2233 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); |
| 2234 | set_gdbarch_call_dummy_p (gdbarch, 1); |
| 2235 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); |
| 2236 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); |
| 2237 | set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy); |
| 2238 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); |
| 2239 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); |
| 2240 | set_gdbarch_push_return_address (gdbarch, ppc_push_return_address); |
| 2241 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
| 2242 | set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double); |
| 2243 | |
| 2244 | set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible); |
| 2245 | set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual); |
| 2246 | set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw); |
| 2247 | |
| 2248 | set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value); |
| 2249 | |
| 2250 | if (sysv_abi) |
| 2251 | set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments); |
| 2252 | else |
| 2253 | set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments); |
| 2254 | |
| 2255 | set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return); |
| 2256 | set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value); |
| 2257 | set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address); |
| 2258 | set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention); |
| 2259 | |
| 2260 | set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame); |
| 2261 | |
| 2262 | set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue); |
| 2263 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 2264 | set_gdbarch_decr_pc_after_break (gdbarch, 0); |
| 2265 | set_gdbarch_function_start_offset (gdbarch, 0); |
| 2266 | set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc); |
| 2267 | |
| 2268 | /* Not sure on this. FIXMEmgo */ |
| 2269 | set_gdbarch_frame_args_skip (gdbarch, 8); |
| 2270 | |
| 2271 | set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid); |
| 2272 | if (osabi == ELFOSABI_LINUX) |
| 2273 | { |
| 2274 | set_gdbarch_frameless_function_invocation (gdbarch, |
| 2275 | ppc_linux_frameless_function_invocation); |
| 2276 | set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain); |
| 2277 | set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc); |
| 2278 | |
| 2279 | set_gdbarch_frame_init_saved_regs (gdbarch, |
| 2280 | ppc_linux_frame_init_saved_regs); |
| 2281 | set_gdbarch_init_extra_frame_info (gdbarch, |
| 2282 | ppc_linux_init_extra_frame_info); |
| 2283 | |
| 2284 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
| 2285 | ppc_linux_memory_remove_breakpoint); |
| 2286 | } |
| 2287 | else |
| 2288 | { |
| 2289 | set_gdbarch_frameless_function_invocation (gdbarch, |
| 2290 | rs6000_frameless_function_invocation); |
| 2291 | set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain); |
| 2292 | set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc); |
| 2293 | |
| 2294 | set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs); |
| 2295 | set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info); |
| 2296 | |
| 2297 | /* Handle RS/6000 function pointers. */ |
| 2298 | set_gdbarch_convert_from_func_ptr_addr (gdbarch, |
| 2299 | rs6000_convert_from_func_ptr_addr); |
| 2300 | } |
| 2301 | set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address); |
| 2302 | set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address); |
| 2303 | set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call); |
| 2304 | |
| 2305 | /* We can't tell how many args there are |
| 2306 | now that the C compiler delays popping them. */ |
| 2307 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); |
| 2308 | |
| 2309 | return gdbarch; |
| 2310 | } |
| 2311 | |
| 2312 | /* Initialization code. */ |
| 2313 | |
| 2314 | void |
| 2315 | _initialize_rs6000_tdep (void) |
| 2316 | { |
| 2317 | register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init); |
| 2318 | register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init); |
| 2319 | } |