| 1 | /* Target-dependent code for GDB, the GNU debugger. |
| 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 20 | |
| 21 | #include "defs.h" |
| 22 | #include "frame.h" |
| 23 | #include "inferior.h" |
| 24 | #include "symtab.h" |
| 25 | #include "target.h" |
| 26 | #include "gdbcore.h" |
| 27 | #include "gdbcmd.h" |
| 28 | #include "symfile.h" |
| 29 | #include "objfiles.h" |
| 30 | #include "xcoffsolib.h" |
| 31 | |
| 32 | extern int errno; |
| 33 | |
| 34 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
| 35 | |
| 36 | static struct sstep_breaks { |
| 37 | /* Address, or 0 if this is not in use. */ |
| 38 | CORE_ADDR address; |
| 39 | /* Shadow contents. */ |
| 40 | char data[4]; |
| 41 | } stepBreaks[2]; |
| 42 | |
| 43 | /* Hook for determining the TOC address when calling functions in the |
| 44 | inferior under AIX. The initialization code in rs6000-nat.c sets |
| 45 | this hook to point to find_toc_address. */ |
| 46 | |
| 47 | CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL; |
| 48 | |
| 49 | /* Static function prototypes */ |
| 50 | |
| 51 | static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, |
| 52 | CORE_ADDR safety)); |
| 53 | |
| 54 | static void frame_get_saved_regs PARAMS ((struct frame_info *fi, |
| 55 | struct rs6000_framedata *fdatap)); |
| 56 | |
| 57 | static void pop_dummy_frame PARAMS ((void)); |
| 58 | |
| 59 | static CORE_ADDR frame_initial_stack_address PARAMS ((struct frame_info *)); |
| 60 | |
| 61 | CORE_ADDR |
| 62 | rs6000_skip_prologue (pc) |
| 63 | CORE_ADDR pc; |
| 64 | { |
| 65 | struct rs6000_framedata frame; |
| 66 | pc = skip_prologue (pc, &frame); |
| 67 | return pc; |
| 68 | } |
| 69 | |
| 70 | |
| 71 | /* Fill in fi->saved_regs */ |
| 72 | |
| 73 | struct frame_extra_info |
| 74 | { |
| 75 | /* Functions calling alloca() change the value of the stack |
| 76 | pointer. We need to use initial stack pointer (which is saved in |
| 77 | r31 by gcc) in such cases. If a compiler emits traceback table, |
| 78 | then we should use the alloca register specified in traceback |
| 79 | table. FIXME. */ |
| 80 | CORE_ADDR initial_sp; /* initial stack pointer. */ |
| 81 | }; |
| 82 | |
| 83 | void |
| 84 | rs6000_init_extra_frame_info (fromleaf, fi) |
| 85 | int fromleaf; |
| 86 | struct frame_info *fi; |
| 87 | { |
| 88 | fi->extra_info = (struct frame_extra_info*) |
| 89 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
| 90 | fi->extra_info->initial_sp = 0; |
| 91 | if (fi->next != (CORE_ADDR) 0 |
| 92 | && fi->pc < TEXT_SEGMENT_BASE) |
| 93 | /* We're in get_prev_frame */ |
| 94 | /* and this is a special signal frame. */ |
| 95 | /* (fi->pc will be some low address in the kernel, */ |
| 96 | /* to which the signal handler returns). */ |
| 97 | fi->signal_handler_caller = 1; |
| 98 | } |
| 99 | |
| 100 | |
| 101 | void |
| 102 | rs6000_frame_init_saved_regs (fi) |
| 103 | struct frame_info *fi; |
| 104 | { |
| 105 | frame_get_saved_regs (fi, NULL); |
| 106 | } |
| 107 | |
| 108 | CORE_ADDR |
| 109 | rs6000_frame_args_address (fi) |
| 110 | struct frame_info *fi; |
| 111 | { |
| 112 | if (fi->extra_info->initial_sp != 0) |
| 113 | return fi->extra_info->initial_sp; |
| 114 | else |
| 115 | return frame_initial_stack_address (fi); |
| 116 | } |
| 117 | |
| 118 | |
| 119 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ |
| 120 | |
| 121 | static CORE_ADDR |
| 122 | branch_dest (opcode, instr, pc, safety) |
| 123 | int opcode; |
| 124 | int instr; |
| 125 | CORE_ADDR pc; |
| 126 | CORE_ADDR safety; |
| 127 | { |
| 128 | CORE_ADDR dest; |
| 129 | int immediate; |
| 130 | int absolute; |
| 131 | int ext_op; |
| 132 | |
| 133 | absolute = (int) ((instr >> 1) & 1); |
| 134 | |
| 135 | switch (opcode) { |
| 136 | case 18 : |
| 137 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
| 138 | if (absolute) |
| 139 | dest = immediate; |
| 140 | else |
| 141 | dest = pc + immediate; |
| 142 | break; |
| 143 | |
| 144 | case 16 : |
| 145 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ |
| 146 | if (absolute) |
| 147 | dest = immediate; |
| 148 | else |
| 149 | dest = pc + immediate; |
| 150 | break; |
| 151 | |
| 152 | case 19 : |
| 153 | ext_op = (instr>>1) & 0x3ff; |
| 154 | |
| 155 | if (ext_op == 16) /* br conditional register */ |
| 156 | { |
| 157 | dest = read_register (LR_REGNUM) & ~3; |
| 158 | |
| 159 | /* If we are about to return from a signal handler, dest is |
| 160 | something like 0x3c90. The current frame is a signal handler |
| 161 | caller frame, upon completion of the sigreturn system call |
| 162 | execution will return to the saved PC in the frame. */ |
| 163 | if (dest < TEXT_SEGMENT_BASE) |
| 164 | { |
| 165 | struct frame_info *fi; |
| 166 | |
| 167 | fi = get_current_frame (); |
| 168 | if (fi != NULL) |
| 169 | dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, |
| 170 | 4); |
| 171 | } |
| 172 | } |
| 173 | |
| 174 | else if (ext_op == 528) /* br cond to count reg */ |
| 175 | { |
| 176 | dest = read_register (CTR_REGNUM) & ~3; |
| 177 | |
| 178 | /* If we are about to execute a system call, dest is something |
| 179 | like 0x22fc or 0x3b00. Upon completion the system call |
| 180 | will return to the address in the link register. */ |
| 181 | if (dest < TEXT_SEGMENT_BASE) |
| 182 | dest = read_register (LR_REGNUM) & ~3; |
| 183 | } |
| 184 | else return -1; |
| 185 | break; |
| 186 | |
| 187 | default: return -1; |
| 188 | } |
| 189 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
| 190 | } |
| 191 | |
| 192 | |
| 193 | /* Sequence of bytes for breakpoint instruction. */ |
| 194 | |
| 195 | #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 } |
| 196 | #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d } |
| 197 | |
| 198 | unsigned char * |
| 199 | rs6000_breakpoint_from_pc (bp_addr, bp_size) |
| 200 | CORE_ADDR *bp_addr; |
| 201 | int *bp_size; |
| 202 | { |
| 203 | static unsigned char big_breakpoint[] = BIG_BREAKPOINT; |
| 204 | static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT; |
| 205 | *bp_size = 4; |
| 206 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 207 | return big_breakpoint; |
| 208 | else |
| 209 | return little_breakpoint; |
| 210 | } |
| 211 | |
| 212 | |
| 213 | /* AIX does not support PT_STEP. Simulate it. */ |
| 214 | |
| 215 | void |
| 216 | rs6000_software_single_step (signal, insert_breakpoints_p) |
| 217 | unsigned int signal; |
| 218 | int insert_breakpoints_p; |
| 219 | { |
| 220 | #define INSNLEN(OPCODE) 4 |
| 221 | |
| 222 | static char le_breakp[] = LITTLE_BREAKPOINT; |
| 223 | static char be_breakp[] = BIG_BREAKPOINT; |
| 224 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; |
| 225 | int ii, insn; |
| 226 | CORE_ADDR loc; |
| 227 | CORE_ADDR breaks[2]; |
| 228 | int opcode; |
| 229 | |
| 230 | if (insert_breakpoints_p) { |
| 231 | |
| 232 | loc = read_pc (); |
| 233 | |
| 234 | insn = read_memory_integer (loc, 4); |
| 235 | |
| 236 | breaks[0] = loc + INSNLEN(insn); |
| 237 | opcode = insn >> 26; |
| 238 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); |
| 239 | |
| 240 | /* Don't put two breakpoints on the same address. */ |
| 241 | if (breaks[1] == breaks[0]) |
| 242 | breaks[1] = -1; |
| 243 | |
| 244 | stepBreaks[1].address = 0; |
| 245 | |
| 246 | for (ii=0; ii < 2; ++ii) { |
| 247 | |
| 248 | /* ignore invalid breakpoint. */ |
| 249 | if ( breaks[ii] == -1) |
| 250 | continue; |
| 251 | |
| 252 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
| 253 | |
| 254 | write_memory (breaks[ii], breakp, 4); |
| 255 | stepBreaks[ii].address = breaks[ii]; |
| 256 | } |
| 257 | |
| 258 | } else { |
| 259 | |
| 260 | /* remove step breakpoints. */ |
| 261 | for (ii=0; ii < 2; ++ii) |
| 262 | if (stepBreaks[ii].address != 0) |
| 263 | write_memory |
| 264 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
| 265 | |
| 266 | } |
| 267 | errno = 0; /* FIXME, don't ignore errors! */ |
| 268 | /* What errors? {read,write}_memory call error(). */ |
| 269 | } |
| 270 | |
| 271 | |
| 272 | /* return pc value after skipping a function prologue and also return |
| 273 | information about a function frame. |
| 274 | |
| 275 | in struct rs6000_framedata fdata: |
| 276 | - frameless is TRUE, if function does not have a frame. |
| 277 | - nosavedpc is TRUE, if function does not save %pc value in its frame. |
| 278 | - offset is the initial size of this stack frame --- the amount by |
| 279 | which we decrement the sp to allocate the frame. |
| 280 | - saved_gpr is the number of the first saved gpr. |
| 281 | - saved_fpr is the number of the first saved fpr. |
| 282 | - alloca_reg is the number of the register used for alloca() handling. |
| 283 | Otherwise -1. |
| 284 | - gpr_offset is the offset of the first saved gpr from the previous frame. |
| 285 | - fpr_offset is the offset of the first saved fpr from the previous frame. |
| 286 | - lr_offset is the offset of the saved lr |
| 287 | - cr_offset is the offset of the saved cr |
| 288 | */ |
| 289 | |
| 290 | #define SIGNED_SHORT(x) \ |
| 291 | ((sizeof (short) == 2) \ |
| 292 | ? ((int)(short)(x)) \ |
| 293 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) |
| 294 | |
| 295 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) |
| 296 | |
| 297 | CORE_ADDR |
| 298 | skip_prologue (pc, fdata) |
| 299 | CORE_ADDR pc; |
| 300 | struct rs6000_framedata *fdata; |
| 301 | { |
| 302 | CORE_ADDR orig_pc = pc; |
| 303 | char buf[4]; |
| 304 | unsigned long op; |
| 305 | long offset = 0; |
| 306 | int lr_reg = 0; |
| 307 | int cr_reg = 0; |
| 308 | int reg; |
| 309 | int framep = 0; |
| 310 | int minimal_toc_loaded = 0; |
| 311 | static struct rs6000_framedata zero_frame; |
| 312 | |
| 313 | *fdata = zero_frame; |
| 314 | fdata->saved_gpr = -1; |
| 315 | fdata->saved_fpr = -1; |
| 316 | fdata->alloca_reg = -1; |
| 317 | fdata->frameless = 1; |
| 318 | fdata->nosavedpc = 1; |
| 319 | |
| 320 | if (target_read_memory (pc, buf, 4)) |
| 321 | return pc; /* Can't access it -- assume no prologue. */ |
| 322 | |
| 323 | /* Assume that subsequent fetches can fail with low probability. */ |
| 324 | pc -= 4; |
| 325 | for (;;) |
| 326 | { |
| 327 | pc += 4; |
| 328 | op = read_memory_integer (pc, 4); |
| 329 | |
| 330 | if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */ |
| 331 | lr_reg = (op & 0x03e00000) | 0x90010000; |
| 332 | continue; |
| 333 | |
| 334 | } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */ |
| 335 | cr_reg = (op & 0x03e00000) | 0x90010000; |
| 336 | continue; |
| 337 | |
| 338 | } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ |
| 339 | reg = GET_SRC_REG (op); |
| 340 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) { |
| 341 | fdata->saved_fpr = reg; |
| 342 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; |
| 343 | } |
| 344 | continue; |
| 345 | |
| 346 | } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ |
| 347 | ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), |
| 348 | rx >= r13 */ |
| 349 | (op & 0x03e00000) >= 0x01a00000)) { |
| 350 | |
| 351 | reg = GET_SRC_REG (op); |
| 352 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) { |
| 353 | fdata->saved_gpr = reg; |
| 354 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
| 355 | } |
| 356 | continue; |
| 357 | |
| 358 | } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used |
| 359 | for >= 32k frames */ |
| 360 | fdata->offset = (op & 0x0000ffff) << 16; |
| 361 | fdata->frameless = 0; |
| 362 | continue; |
| 363 | |
| 364 | } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd ha |
| 365 | lf of >= 32k frames */ |
| 366 | fdata->offset |= (op & 0x0000ffff); |
| 367 | fdata->frameless = 0; |
| 368 | continue; |
| 369 | |
| 370 | } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) |
| 371 | where Rx == lr */ |
| 372 | fdata->lr_offset = SIGNED_SHORT (op) + offset; |
| 373 | fdata->nosavedpc = 0; |
| 374 | lr_reg = 0; |
| 375 | continue; |
| 376 | |
| 377 | } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) |
| 378 | where Rx == cr */ |
| 379 | fdata->cr_offset = SIGNED_SHORT (op) + offset; |
| 380 | cr_reg = 0; |
| 381 | continue; |
| 382 | |
| 383 | } else if (op == 0x48000005) { /* bl .+4 used in |
| 384 | -mrelocatable */ |
| 385 | continue; |
| 386 | |
| 387 | } else if (op == 0x48000004) { /* b .+4 (xlc) */ |
| 388 | break; |
| 389 | |
| 390 | } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used |
| 391 | in V.4 -mrelocatable */ |
| 392 | op == 0x7fc0f214) && /* add r30,r0,r30, used |
| 393 | in V.4 -mrelocatable */ |
| 394 | lr_reg == 0x901e0000) { |
| 395 | continue; |
| 396 | |
| 397 | } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used |
| 398 | in V.4 -mminimal-toc */ |
| 399 | (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */ |
| 400 | continue; |
| 401 | |
| 402 | } else if ((op & 0xfc000001) == 0x48000001) { /* bl foo, |
| 403 | to save fprs??? */ |
| 404 | |
| 405 | fdata->frameless = 0; |
| 406 | /* Don't skip over the subroutine call if it is not within the first |
| 407 | three instructions of the prologue. */ |
| 408 | if ((pc - orig_pc) > 8) |
| 409 | break; |
| 410 | |
| 411 | op = read_memory_integer (pc+4, 4); |
| 412 | |
| 413 | /* At this point, make sure this is not a trampoline function |
| 414 | (a function that simply calls another functions, and nothing else). |
| 415 | If the next is not a nop, this branch was part of the function |
| 416 | prologue. */ |
| 417 | |
| 418 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ |
| 419 | break; /* don't skip over |
| 420 | this branch */ |
| 421 | continue; |
| 422 | |
| 423 | /* update stack pointer */ |
| 424 | } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */ |
| 425 | fdata->frameless = 0; |
| 426 | fdata->offset = SIGNED_SHORT (op); |
| 427 | offset = fdata->offset; |
| 428 | continue; |
| 429 | |
| 430 | } else if (op == 0x7c21016e) { /* stwux 1,1,0 */ |
| 431 | fdata->frameless = 0; |
| 432 | offset = fdata->offset; |
| 433 | continue; |
| 434 | |
| 435 | /* Load up minimal toc pointer */ |
| 436 | } else if ((op >> 22) == 0x20f |
| 437 | && ! minimal_toc_loaded) { /* l r31,... or l r30,... */ |
| 438 | minimal_toc_loaded = 1; |
| 439 | continue; |
| 440 | |
| 441 | /* store parameters in stack */ |
| 442 | } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ |
| 443 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ |
| 444 | (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */ |
| 445 | continue; |
| 446 | |
| 447 | /* store parameters in stack via frame pointer */ |
| 448 | } else if (framep && |
| 449 | ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ |
| 450 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ |
| 451 | (op & 0xfc1f0000) == 0xfc1f0000)) { /* frsp, fp?,NUM(r1) */ |
| 452 | continue; |
| 453 | |
| 454 | /* Set up frame pointer */ |
| 455 | } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ |
| 456 | || op == 0x7c3f0b78) { /* mr r31, r1 */ |
| 457 | fdata->frameless = 0; |
| 458 | framep = 1; |
| 459 | fdata->alloca_reg = 31; |
| 460 | continue; |
| 461 | |
| 462 | /* Another way to set up the frame pointer. */ |
| 463 | } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */ |
| 464 | fdata->frameless = 0; |
| 465 | framep = 1; |
| 466 | fdata->alloca_reg = (op & ~0x38010000) >> 21; |
| 467 | continue; |
| 468 | |
| 469 | } else { |
| 470 | break; |
| 471 | } |
| 472 | } |
| 473 | |
| 474 | #if 0 |
| 475 | /* I have problems with skipping over __main() that I need to address |
| 476 | * sometime. Previously, I used to use misc_function_vector which |
| 477 | * didn't work as well as I wanted to be. -MGO */ |
| 478 | |
| 479 | /* If the first thing after skipping a prolog is a branch to a function, |
| 480 | this might be a call to an initializer in main(), introduced by gcc2. |
| 481 | We'd like to skip over it as well. Fortunately, xlc does some extra |
| 482 | work before calling a function right after a prologue, thus we can |
| 483 | single out such gcc2 behaviour. */ |
| 484 | |
| 485 | |
| 486 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ |
| 487 | op = read_memory_integer (pc+4, 4); |
| 488 | |
| 489 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ |
| 490 | |
| 491 | /* check and see if we are in main. If so, skip over this initializer |
| 492 | function as well. */ |
| 493 | |
| 494 | tmp = find_pc_misc_function (pc); |
| 495 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
| 496 | return pc + 8; |
| 497 | } |
| 498 | } |
| 499 | #endif /* 0 */ |
| 500 | |
| 501 | fdata->offset = - fdata->offset; |
| 502 | return pc; |
| 503 | } |
| 504 | |
| 505 | |
| 506 | /************************************************************************* |
| 507 | Support for creating pushind a dummy frame into the stack, and popping |
| 508 | frames, etc. |
| 509 | *************************************************************************/ |
| 510 | |
| 511 | /* The total size of dummy frame is 436, which is; |
| 512 | |
| 513 | 32 gpr's - 128 bytes |
| 514 | 32 fpr's - 256 " |
| 515 | 7 the rest - 28 " |
| 516 | and 24 extra bytes for the callee's link area. The last 24 bytes |
| 517 | for the link area might not be necessary, since it will be taken |
| 518 | care of by push_arguments(). */ |
| 519 | |
| 520 | #define DUMMY_FRAME_SIZE 436 |
| 521 | |
| 522 | #define DUMMY_FRAME_ADDR_SIZE 10 |
| 523 | |
| 524 | /* Make sure you initialize these in somewhere, in case gdb gives up what it |
| 525 | was debugging and starts debugging something else. FIXMEibm */ |
| 526 | |
| 527 | static int dummy_frame_count = 0; |
| 528 | static int dummy_frame_size = 0; |
| 529 | static CORE_ADDR *dummy_frame_addr = 0; |
| 530 | |
| 531 | extern int stop_stack_dummy; |
| 532 | |
| 533 | /* push a dummy frame into stack, save all register. Currently we are saving |
| 534 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ |
| 535 | |
| 536 | void |
| 537 | push_dummy_frame () |
| 538 | { |
| 539 | /* stack pointer. */ |
| 540 | CORE_ADDR sp; |
| 541 | /* Same thing, target byte order. */ |
| 542 | char sp_targ[4]; |
| 543 | |
| 544 | /* link register. */ |
| 545 | CORE_ADDR pc; |
| 546 | /* Same thing, target byte order. */ |
| 547 | char pc_targ[4]; |
| 548 | |
| 549 | /* Needed to figure out where to save the dummy link area. |
| 550 | FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */ |
| 551 | struct rs6000_framedata fdata; |
| 552 | |
| 553 | int ii; |
| 554 | |
| 555 | target_fetch_registers (-1); |
| 556 | |
| 557 | if (dummy_frame_count >= dummy_frame_size) { |
| 558 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; |
| 559 | if (dummy_frame_addr) |
| 560 | dummy_frame_addr = (CORE_ADDR*) xrealloc |
| 561 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); |
| 562 | else |
| 563 | dummy_frame_addr = (CORE_ADDR*) |
| 564 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); |
| 565 | } |
| 566 | |
| 567 | sp = read_register(SP_REGNUM); |
| 568 | pc = read_register(PC_REGNUM); |
| 569 | store_address (pc_targ, 4, pc); |
| 570 | |
| 571 | skip_prologue (get_pc_function_start (pc), &fdata); |
| 572 | |
| 573 | dummy_frame_addr [dummy_frame_count++] = sp; |
| 574 | |
| 575 | /* Be careful! If the stack pointer is not decremented first, then kernel |
| 576 | thinks he is free to use the space underneath it. And kernel actually |
| 577 | uses that area for IPC purposes when executing ptrace(2) calls. So |
| 578 | before writing register values into the new frame, decrement and update |
| 579 | %sp first in order to secure your frame. */ |
| 580 | |
| 581 | /* FIXME: We don't check if the stack really has this much space. |
| 582 | This is a problem on the ppc simulator (which only grants one page |
| 583 | (4096 bytes) by default. */ |
| 584 | |
| 585 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
| 586 | |
| 587 | /* gdb relies on the state of current_frame. We'd better update it, |
| 588 | otherwise things like do_registers_info() wouldn't work properly! */ |
| 589 | |
| 590 | flush_cached_frames (); |
| 591 | |
| 592 | /* save program counter in link register's space. */ |
| 593 | write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE), |
| 594 | pc_targ, 4); |
| 595 | |
| 596 | /* save all floating point and general purpose registers here. */ |
| 597 | |
| 598 | /* fpr's, f0..f31 */ |
| 599 | for (ii = 0; ii < 32; ++ii) |
| 600 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); |
| 601 | |
| 602 | /* gpr's r0..r31 */ |
| 603 | for (ii=1; ii <=32; ++ii) |
| 604 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); |
| 605 | |
| 606 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
| 607 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ |
| 608 | |
| 609 | for (ii=1; ii <= (LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii) { |
| 610 | write_memory (sp-384-(ii*4), |
| 611 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); |
| 612 | } |
| 613 | |
| 614 | /* Save sp or so called back chain right here. */ |
| 615 | store_address (sp_targ, 4, sp); |
| 616 | write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4); |
| 617 | sp -= DUMMY_FRAME_SIZE; |
| 618 | |
| 619 | /* And finally, this is the back chain. */ |
| 620 | write_memory (sp+8, pc_targ, 4); |
| 621 | } |
| 622 | |
| 623 | |
| 624 | /* Pop a dummy frame. |
| 625 | |
| 626 | In rs6000 when we push a dummy frame, we save all of the registers. This |
| 627 | is usually done before user calls a function explicitly. |
| 628 | |
| 629 | After a dummy frame is pushed, some instructions are copied into stack, |
| 630 | and stack pointer is decremented even more. Since we don't have a frame |
| 631 | pointer to get back to the parent frame of the dummy, we start having |
| 632 | trouble poping it. Therefore, we keep a dummy frame stack, keeping |
| 633 | addresses of dummy frames as such. When poping happens and when we |
| 634 | detect that was a dummy frame, we pop it back to its parent by using |
| 635 | dummy frame stack (`dummy_frame_addr' array). |
| 636 | |
| 637 | FIXME: This whole concept is broken. You should be able to detect |
| 638 | a dummy stack frame *on the user's stack itself*. When you do, |
| 639 | then you know the format of that stack frame -- including its |
| 640 | saved SP register! There should *not* be a separate stack in the |
| 641 | GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92 |
| 642 | */ |
| 643 | |
| 644 | static void |
| 645 | pop_dummy_frame () |
| 646 | { |
| 647 | CORE_ADDR sp, pc; |
| 648 | int ii; |
| 649 | sp = dummy_frame_addr [--dummy_frame_count]; |
| 650 | |
| 651 | /* restore all fpr's. */ |
| 652 | for (ii = 1; ii <= 32; ++ii) |
| 653 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); |
| 654 | |
| 655 | /* restore all gpr's */ |
| 656 | for (ii=1; ii <= 32; ++ii) { |
| 657 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); |
| 658 | } |
| 659 | |
| 660 | /* restore the rest of the registers. */ |
| 661 | for (ii=1; ii <=(LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii) |
| 662 | read_memory (sp-384-(ii*4), |
| 663 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); |
| 664 | |
| 665 | read_memory (sp-(DUMMY_FRAME_SIZE-8), |
| 666 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); |
| 667 | |
| 668 | /* when a dummy frame was being pushed, we had to decrement %sp first, in |
| 669 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the |
| 670 | one we should restore. Change it with the one we need. */ |
| 671 | |
| 672 | memcpy (®isters [REGISTER_BYTE(FP_REGNUM)], (char *) &sp, sizeof (int)); |
| 673 | |
| 674 | /* Now we can restore all registers. */ |
| 675 | |
| 676 | target_store_registers (-1); |
| 677 | pc = read_pc (); |
| 678 | flush_cached_frames (); |
| 679 | } |
| 680 | |
| 681 | |
| 682 | /* pop the innermost frame, go back to the caller. */ |
| 683 | |
| 684 | void |
| 685 | pop_frame () |
| 686 | { |
| 687 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ |
| 688 | struct rs6000_framedata fdata; |
| 689 | struct frame_info *frame = get_current_frame (); |
| 690 | int addr, ii; |
| 691 | |
| 692 | pc = read_pc (); |
| 693 | sp = FRAME_FP (frame); |
| 694 | |
| 695 | if (stop_stack_dummy) |
| 696 | { |
| 697 | if (USE_GENERIC_DUMMY_FRAMES) |
| 698 | { |
| 699 | generic_pop_dummy_frame (); |
| 700 | flush_cached_frames (); |
| 701 | return; |
| 702 | } |
| 703 | else |
| 704 | { |
| 705 | if (dummy_frame_count) |
| 706 | pop_dummy_frame (); |
| 707 | return; |
| 708 | } |
| 709 | } |
| 710 | |
| 711 | /* Make sure that all registers are valid. */ |
| 712 | read_register_bytes (0, NULL, REGISTER_BYTES); |
| 713 | |
| 714 | /* figure out previous %pc value. If the function is frameless, it is |
| 715 | still in the link register, otherwise walk the frames and retrieve the |
| 716 | saved %pc value in the previous frame. */ |
| 717 | |
| 718 | addr = get_pc_function_start (frame->pc); |
| 719 | (void) skip_prologue (addr, &fdata); |
| 720 | |
| 721 | if (fdata.frameless) |
| 722 | prev_sp = sp; |
| 723 | else |
| 724 | prev_sp = read_memory_integer (sp, 4); |
| 725 | if (fdata.lr_offset == 0) |
| 726 | lr = read_register (LR_REGNUM); |
| 727 | else |
| 728 | lr = read_memory_integer (prev_sp + fdata.lr_offset, 4); |
| 729 | |
| 730 | /* reset %pc value. */ |
| 731 | write_register (PC_REGNUM, lr); |
| 732 | |
| 733 | /* reset register values if any was saved earlier. */ |
| 734 | |
| 735 | if (fdata.saved_gpr != -1) |
| 736 | { |
| 737 | addr = prev_sp + fdata.gpr_offset; |
| 738 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) { |
| 739 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
| 740 | addr += 4; |
| 741 | } |
| 742 | } |
| 743 | |
| 744 | if (fdata.saved_fpr != -1) |
| 745 | { |
| 746 | addr = prev_sp + fdata.fpr_offset; |
| 747 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) { |
| 748 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
| 749 | addr += 8; |
| 750 | } |
| 751 | } |
| 752 | |
| 753 | write_register (SP_REGNUM, prev_sp); |
| 754 | target_store_registers (-1); |
| 755 | flush_cached_frames (); |
| 756 | } |
| 757 | |
| 758 | /* fixup the call sequence of a dummy function, with the real function address. |
| 759 | its argumets will be passed by gdb. */ |
| 760 | |
| 761 | void |
| 762 | rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p) |
| 763 | char *dummyname; |
| 764 | CORE_ADDR pc; |
| 765 | CORE_ADDR fun; |
| 766 | int nargs; |
| 767 | value_ptr *args; |
| 768 | struct type *type; |
| 769 | int gcc_p; |
| 770 | { |
| 771 | #define TOC_ADDR_OFFSET 20 |
| 772 | #define TARGET_ADDR_OFFSET 28 |
| 773 | |
| 774 | int ii; |
| 775 | CORE_ADDR target_addr; |
| 776 | |
| 777 | if (find_toc_address_hook != NULL) |
| 778 | { |
| 779 | CORE_ADDR tocvalue; |
| 780 | |
| 781 | tocvalue = (*find_toc_address_hook) (fun); |
| 782 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); |
| 783 | ii = (ii & 0xffff0000) | (tocvalue >> 16); |
| 784 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; |
| 785 | |
| 786 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); |
| 787 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); |
| 788 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; |
| 789 | } |
| 790 | |
| 791 | target_addr = fun; |
| 792 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); |
| 793 | ii = (ii & 0xffff0000) | (target_addr >> 16); |
| 794 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; |
| 795 | |
| 796 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); |
| 797 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); |
| 798 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; |
| 799 | } |
| 800 | |
| 801 | /* Pass the arguments in either registers, or in the stack. In RS6000, |
| 802 | the first eight words of the argument list (that might be less than |
| 803 | eight parameters if some parameters occupy more than one word) are |
| 804 | passed in r3..r11 registers. float and double parameters are |
| 805 | passed in fpr's, in addition to that. Rest of the parameters if any |
| 806 | are passed in user stack. There might be cases in which half of the |
| 807 | parameter is copied into registers, the other half is pushed into |
| 808 | stack. |
| 809 | |
| 810 | If the function is returning a structure, then the return address is passed |
| 811 | in r3, then the first 7 words of the parameters can be passed in registers, |
| 812 | starting from r4. */ |
| 813 | |
| 814 | CORE_ADDR |
| 815 | rs6000_push_arguments (nargs, args, sp, struct_return, struct_addr) |
| 816 | int nargs; |
| 817 | value_ptr *args; |
| 818 | CORE_ADDR sp; |
| 819 | int struct_return; |
| 820 | CORE_ADDR struct_addr; |
| 821 | { |
| 822 | int ii; |
| 823 | int len = 0; |
| 824 | int argno; /* current argument number */ |
| 825 | int argbytes; /* current argument byte */ |
| 826 | char tmp_buffer [50]; |
| 827 | int f_argno = 0; /* current floating point argno */ |
| 828 | |
| 829 | value_ptr arg = 0; |
| 830 | struct type *type; |
| 831 | |
| 832 | CORE_ADDR saved_sp; |
| 833 | |
| 834 | if (!USE_GENERIC_DUMMY_FRAMES) |
| 835 | { |
| 836 | if (dummy_frame_count <= 0) |
| 837 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); |
| 838 | } |
| 839 | |
| 840 | /* The first eight words of ther arguments are passed in registers. Copy |
| 841 | them appropriately. |
| 842 | |
| 843 | If the function is returning a `struct', then the first word (which |
| 844 | will be passed in r3) is used for struct return address. In that |
| 845 | case we should advance one word and start from r4 register to copy |
| 846 | parameters. */ |
| 847 | |
| 848 | ii = struct_return ? 1 : 0; |
| 849 | |
| 850 | /* |
| 851 | effectively indirect call... gcc does... |
| 852 | |
| 853 | return_val example( float, int); |
| 854 | |
| 855 | eabi: |
| 856 | float in fp0, int in r3 |
| 857 | offset of stack on overflow 8/16 |
| 858 | for varargs, must go by type. |
| 859 | power open: |
| 860 | float in r3&r4, int in r5 |
| 861 | offset of stack on overflow different |
| 862 | both: |
| 863 | return in r3 or f0. If no float, must study how gcc emulates floats; |
| 864 | pay attention to arg promotion. |
| 865 | User may have to cast\args to handle promotion correctly |
| 866 | since gdb won't know if prototype supplied or not. |
| 867 | */ |
| 868 | |
| 869 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { |
| 870 | |
| 871 | arg = args[argno]; |
| 872 | type = check_typedef (VALUE_TYPE (arg)); |
| 873 | len = TYPE_LENGTH (type); |
| 874 | |
| 875 | if (TYPE_CODE (type) == TYPE_CODE_FLT) { |
| 876 | |
| 877 | /* floating point arguments are passed in fpr's, as well as gpr's. |
| 878 | There are 13 fpr's reserved for passing parameters. At this point |
| 879 | there is no way we would run out of them. */ |
| 880 | |
| 881 | if (len > 8) |
| 882 | printf_unfiltered ( |
| 883 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
| 884 | |
| 885 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], |
| 886 | VALUE_CONTENTS (arg), |
| 887 | len); |
| 888 | ++f_argno; |
| 889 | } |
| 890 | |
| 891 | if (len > 4) { |
| 892 | |
| 893 | /* Argument takes more than one register. */ |
| 894 | while (argbytes < len) { |
| 895 | memset (®isters[REGISTER_BYTE(ii+3)], 0, sizeof(int)); |
| 896 | memcpy (®isters[REGISTER_BYTE(ii+3)], |
| 897 | ((char*)VALUE_CONTENTS (arg))+argbytes, |
| 898 | (len - argbytes) > 4 ? 4 : len - argbytes); |
| 899 | ++ii, argbytes += 4; |
| 900 | |
| 901 | if (ii >= 8) |
| 902 | goto ran_out_of_registers_for_arguments; |
| 903 | } |
| 904 | argbytes = 0; |
| 905 | --ii; |
| 906 | } |
| 907 | else { /* Argument can fit in one register. No problem. */ |
| 908 | memset (®isters[REGISTER_BYTE(ii+3)], 0, sizeof(int)); |
| 909 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); |
| 910 | } |
| 911 | ++argno; |
| 912 | } |
| 913 | |
| 914 | ran_out_of_registers_for_arguments: |
| 915 | |
| 916 | if (USE_GENERIC_DUMMY_FRAMES) |
| 917 | { |
| 918 | saved_sp = read_sp (); |
| 919 | } |
| 920 | else |
| 921 | { |
| 922 | /* location for 8 parameters are always reserved. */ |
| 923 | sp -= 4 * 8; |
| 924 | |
| 925 | /* another six words for back chain, TOC register, link register, etc. */ |
| 926 | sp -= 24; |
| 927 | } |
| 928 | |
| 929 | /* if there are more arguments, allocate space for them in |
| 930 | the stack, then push them starting from the ninth one. */ |
| 931 | |
| 932 | if ((argno < nargs) || argbytes) { |
| 933 | int space = 0, jj; |
| 934 | |
| 935 | if (argbytes) { |
| 936 | space += ((len - argbytes + 3) & -4); |
| 937 | jj = argno + 1; |
| 938 | } |
| 939 | else |
| 940 | jj = argno; |
| 941 | |
| 942 | for (; jj < nargs; ++jj) { |
| 943 | value_ptr val = args[jj]; |
| 944 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; |
| 945 | } |
| 946 | |
| 947 | /* add location required for the rest of the parameters */ |
| 948 | space = (space + 7) & -8; |
| 949 | sp -= space; |
| 950 | |
| 951 | /* This is another instance we need to be concerned about securing our |
| 952 | stack space. If we write anything underneath %sp (r1), we might conflict |
| 953 | with the kernel who thinks he is free to use this area. So, update %sp |
| 954 | first before doing anything else. */ |
| 955 | |
| 956 | write_register (SP_REGNUM, sp); |
| 957 | |
| 958 | /* if the last argument copied into the registers didn't fit there |
| 959 | completely, push the rest of it into stack. */ |
| 960 | |
| 961 | if (argbytes) { |
| 962 | write_memory (sp+24+(ii*4), |
| 963 | ((char*)VALUE_CONTENTS (arg))+argbytes, |
| 964 | len - argbytes); |
| 965 | ++argno; |
| 966 | ii += ((len - argbytes + 3) & -4) / 4; |
| 967 | } |
| 968 | |
| 969 | /* push the rest of the arguments into stack. */ |
| 970 | for (; argno < nargs; ++argno) { |
| 971 | |
| 972 | arg = args[argno]; |
| 973 | type = check_typedef (VALUE_TYPE (arg)); |
| 974 | len = TYPE_LENGTH (type); |
| 975 | |
| 976 | |
| 977 | /* float types should be passed in fpr's, as well as in the stack. */ |
| 978 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) { |
| 979 | |
| 980 | if (len > 8) |
| 981 | printf_unfiltered ( |
| 982 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
| 983 | |
| 984 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], |
| 985 | VALUE_CONTENTS (arg), |
| 986 | len); |
| 987 | ++f_argno; |
| 988 | } |
| 989 | |
| 990 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); |
| 991 | ii += ((len + 3) & -4) / 4; |
| 992 | } |
| 993 | } |
| 994 | else |
| 995 | /* Secure stack areas first, before doing anything else. */ |
| 996 | write_register (SP_REGNUM, sp); |
| 997 | |
| 998 | if (!USE_GENERIC_DUMMY_FRAMES) |
| 999 | { |
| 1000 | /* we want to copy 24 bytes of target's frame to dummy's frame, |
| 1001 | then set back chain to point to new frame. */ |
| 1002 | |
| 1003 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
| 1004 | read_memory (saved_sp, tmp_buffer, 24); |
| 1005 | write_memory (sp, tmp_buffer, 24); |
| 1006 | } |
| 1007 | |
| 1008 | /* set back chain properly */ |
| 1009 | store_address (tmp_buffer, 4, saved_sp); |
| 1010 | write_memory (sp, tmp_buffer, 4); |
| 1011 | |
| 1012 | target_store_registers (-1); |
| 1013 | return sp; |
| 1014 | } |
| 1015 | #ifdef ELF_OBJECT_FORMAT |
| 1016 | |
| 1017 | /* Function: ppc_push_return_address (pc, sp) |
| 1018 | Set up the return address for the inferior function call. */ |
| 1019 | |
| 1020 | CORE_ADDR |
| 1021 | ppc_push_return_address (pc, sp) |
| 1022 | CORE_ADDR pc; |
| 1023 | CORE_ADDR sp; |
| 1024 | { |
| 1025 | write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ()); |
| 1026 | return sp; |
| 1027 | } |
| 1028 | |
| 1029 | #endif |
| 1030 | |
| 1031 | /* a given return value in `regbuf' with a type `valtype', extract and copy its |
| 1032 | value into `valbuf' */ |
| 1033 | |
| 1034 | void |
| 1035 | extract_return_value (valtype, regbuf, valbuf) |
| 1036 | struct type *valtype; |
| 1037 | char regbuf[REGISTER_BYTES]; |
| 1038 | char *valbuf; |
| 1039 | { |
| 1040 | int offset = 0; |
| 1041 | |
| 1042 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { |
| 1043 | |
| 1044 | double dd; float ff; |
| 1045 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. |
| 1046 | We need to truncate the return value into float size (4 byte) if |
| 1047 | necessary. */ |
| 1048 | |
| 1049 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ |
| 1050 | memcpy (valbuf, |
| 1051 | ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
| 1052 | TYPE_LENGTH (valtype)); |
| 1053 | else { /* float */ |
| 1054 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
| 1055 | ff = (float)dd; |
| 1056 | memcpy (valbuf, &ff, sizeof(float)); |
| 1057 | } |
| 1058 | } |
| 1059 | else { |
| 1060 | /* return value is copied starting from r3. */ |
| 1061 | if (TARGET_BYTE_ORDER == BIG_ENDIAN |
| 1062 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) |
| 1063 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); |
| 1064 | |
| 1065 | memcpy (valbuf, |
| 1066 | regbuf + REGISTER_BYTE (3) + offset, |
| 1067 | TYPE_LENGTH (valtype)); |
| 1068 | } |
| 1069 | } |
| 1070 | |
| 1071 | |
| 1072 | /* keep structure return address in this variable. |
| 1073 | FIXME: This is a horrid kludge which should not be allowed to continue |
| 1074 | living. This only allows a single nested call to a structure-returning |
| 1075 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ |
| 1076 | |
| 1077 | CORE_ADDR rs6000_struct_return_address; |
| 1078 | |
| 1079 | |
| 1080 | /* Indirect function calls use a piece of trampoline code to do context |
| 1081 | switching, i.e. to set the new TOC table. Skip such code if we are on |
| 1082 | its first instruction (as when we have single-stepped to here). |
| 1083 | Also skip shared library trampoline code (which is different from |
| 1084 | indirect function call trampolines). |
| 1085 | Result is desired PC to step until, or NULL if we are not in |
| 1086 | trampoline code. */ |
| 1087 | |
| 1088 | CORE_ADDR |
| 1089 | skip_trampoline_code (pc) |
| 1090 | CORE_ADDR pc; |
| 1091 | { |
| 1092 | register unsigned int ii, op; |
| 1093 | CORE_ADDR solib_target_pc; |
| 1094 | |
| 1095 | static unsigned trampoline_code[] = { |
| 1096 | 0x800b0000, /* l r0,0x0(r11) */ |
| 1097 | 0x90410014, /* st r2,0x14(r1) */ |
| 1098 | 0x7c0903a6, /* mtctr r0 */ |
| 1099 | 0x804b0004, /* l r2,0x4(r11) */ |
| 1100 | 0x816b0008, /* l r11,0x8(r11) */ |
| 1101 | 0x4e800420, /* bctr */ |
| 1102 | 0x4e800020, /* br */ |
| 1103 | 0 |
| 1104 | }; |
| 1105 | |
| 1106 | /* If pc is in a shared library trampoline, return its target. */ |
| 1107 | solib_target_pc = find_solib_trampoline_target (pc); |
| 1108 | if (solib_target_pc) |
| 1109 | return solib_target_pc; |
| 1110 | |
| 1111 | for (ii=0; trampoline_code[ii]; ++ii) { |
| 1112 | op = read_memory_integer (pc + (ii*4), 4); |
| 1113 | if (op != trampoline_code [ii]) |
| 1114 | return 0; |
| 1115 | } |
| 1116 | ii = read_register (11); /* r11 holds destination addr */ |
| 1117 | pc = read_memory_integer (ii, 4); /* (r11) value */ |
| 1118 | return pc; |
| 1119 | } |
| 1120 | |
| 1121 | /* Determines whether the function FI has a frame on the stack or not. */ |
| 1122 | |
| 1123 | int |
| 1124 | frameless_function_invocation (fi) |
| 1125 | struct frame_info *fi; |
| 1126 | { |
| 1127 | CORE_ADDR func_start; |
| 1128 | struct rs6000_framedata fdata; |
| 1129 | |
| 1130 | /* Don't even think about framelessness except on the innermost frame |
| 1131 | or if the function was interrupted by a signal. */ |
| 1132 | if (fi->next != NULL && !fi->next->signal_handler_caller) |
| 1133 | return 0; |
| 1134 | |
| 1135 | func_start = get_pc_function_start (fi->pc); |
| 1136 | |
| 1137 | /* If we failed to find the start of the function, it is a mistake |
| 1138 | to inspect the instructions. */ |
| 1139 | |
| 1140 | if (!func_start) |
| 1141 | { |
| 1142 | /* A frame with a zero PC is usually created by dereferencing a NULL |
| 1143 | function pointer, normally causing an immediate core dump of the |
| 1144 | inferior. Mark function as frameless, as the inferior has no chance |
| 1145 | of setting up a stack frame. */ |
| 1146 | if (fi->pc == 0) |
| 1147 | return 1; |
| 1148 | else |
| 1149 | return 0; |
| 1150 | } |
| 1151 | |
| 1152 | (void) skip_prologue (func_start, &fdata); |
| 1153 | return fdata.frameless; |
| 1154 | } |
| 1155 | |
| 1156 | /* Return the PC saved in a frame */ |
| 1157 | |
| 1158 | unsigned long |
| 1159 | frame_saved_pc (fi) |
| 1160 | struct frame_info *fi; |
| 1161 | { |
| 1162 | CORE_ADDR func_start; |
| 1163 | struct rs6000_framedata fdata; |
| 1164 | |
| 1165 | if (fi->signal_handler_caller) |
| 1166 | return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4); |
| 1167 | |
| 1168 | if (USE_GENERIC_DUMMY_FRAMES) |
| 1169 | { |
| 1170 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 1171 | return generic_read_register_dummy(fi->pc, fi->frame, PC_REGNUM); |
| 1172 | } |
| 1173 | |
| 1174 | func_start = get_pc_function_start (fi->pc); |
| 1175 | |
| 1176 | /* If we failed to find the start of the function, it is a mistake |
| 1177 | to inspect the instructions. */ |
| 1178 | if (!func_start) |
| 1179 | return 0; |
| 1180 | |
| 1181 | (void) skip_prologue (func_start, &fdata); |
| 1182 | |
| 1183 | if (fdata.lr_offset == 0 && fi->next != NULL) |
| 1184 | { |
| 1185 | if (fi->next->signal_handler_caller) |
| 1186 | return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4); |
| 1187 | else |
| 1188 | return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE, |
| 1189 | 4); |
| 1190 | } |
| 1191 | |
| 1192 | if (fdata.lr_offset == 0) |
| 1193 | return read_register (LR_REGNUM); |
| 1194 | |
| 1195 | return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4); |
| 1196 | } |
| 1197 | |
| 1198 | /* If saved registers of frame FI are not known yet, read and cache them. |
| 1199 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, |
| 1200 | in which case the framedata are read. */ |
| 1201 | |
| 1202 | static void |
| 1203 | frame_get_saved_regs (fi, fdatap) |
| 1204 | struct frame_info *fi; |
| 1205 | struct rs6000_framedata *fdatap; |
| 1206 | { |
| 1207 | int ii; |
| 1208 | CORE_ADDR frame_addr; |
| 1209 | struct rs6000_framedata work_fdata; |
| 1210 | |
| 1211 | if (fi->saved_regs) |
| 1212 | return; |
| 1213 | |
| 1214 | if (fdatap == NULL) |
| 1215 | { |
| 1216 | fdatap = &work_fdata; |
| 1217 | (void) skip_prologue (get_pc_function_start (fi->pc), fdatap); |
| 1218 | } |
| 1219 | |
| 1220 | frame_saved_regs_zalloc (fi); |
| 1221 | |
| 1222 | /* If there were any saved registers, figure out parent's stack |
| 1223 | pointer. */ |
| 1224 | /* The following is true only if the frame doesn't have a call to |
| 1225 | alloca(), FIXME. */ |
| 1226 | |
| 1227 | if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0 |
| 1228 | && fdatap->lr_offset == 0 && fdatap->cr_offset == 0) |
| 1229 | frame_addr = 0; |
| 1230 | else if (fi->prev && fi->prev->frame) |
| 1231 | frame_addr = fi->prev->frame; |
| 1232 | else |
| 1233 | frame_addr = read_memory_integer (fi->frame, 4); |
| 1234 | |
| 1235 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. |
| 1236 | All fpr's from saved_fpr to fp31 are saved. */ |
| 1237 | |
| 1238 | if (fdatap->saved_fpr >= 0) |
| 1239 | { |
| 1240 | int i; |
| 1241 | int fpr_offset = frame_addr + fdatap->fpr_offset; |
| 1242 | for (i = fdatap->saved_fpr; i < 32; i++) |
| 1243 | { |
| 1244 | fi->saved_regs [FP0_REGNUM + i] = fpr_offset; |
| 1245 | fpr_offset += 8; |
| 1246 | } |
| 1247 | } |
| 1248 | |
| 1249 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. |
| 1250 | All gpr's from saved_gpr to gpr31 are saved. */ |
| 1251 | |
| 1252 | if (fdatap->saved_gpr >= 0) |
| 1253 | { |
| 1254 | int i; |
| 1255 | int gpr_offset = frame_addr + fdatap->gpr_offset; |
| 1256 | for (i = fdatap->saved_gpr; i < 32; i++) |
| 1257 | { |
| 1258 | fi->saved_regs [i] = gpr_offset; |
| 1259 | gpr_offset += 4; |
| 1260 | } |
| 1261 | } |
| 1262 | |
| 1263 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds |
| 1264 | the CR. */ |
| 1265 | if (fdatap->cr_offset != 0) |
| 1266 | fi->saved_regs [CR_REGNUM] = frame_addr + fdatap->cr_offset; |
| 1267 | |
| 1268 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds |
| 1269 | the LR. */ |
| 1270 | if (fdatap->lr_offset != 0) |
| 1271 | fi->saved_regs [LR_REGNUM] = frame_addr + fdatap->lr_offset; |
| 1272 | } |
| 1273 | |
| 1274 | /* Return the address of a frame. This is the inital %sp value when the frame |
| 1275 | was first allocated. For functions calling alloca(), it might be saved in |
| 1276 | an alloca register. */ |
| 1277 | |
| 1278 | static CORE_ADDR |
| 1279 | frame_initial_stack_address (fi) |
| 1280 | struct frame_info *fi; |
| 1281 | { |
| 1282 | CORE_ADDR tmpaddr; |
| 1283 | struct rs6000_framedata fdata; |
| 1284 | struct frame_info *callee_fi; |
| 1285 | |
| 1286 | /* if the initial stack pointer (frame address) of this frame is known, |
| 1287 | just return it. */ |
| 1288 | |
| 1289 | if (fi->extra_info->initial_sp) |
| 1290 | return fi->extra_info->initial_sp; |
| 1291 | |
| 1292 | /* find out if this function is using an alloca register.. */ |
| 1293 | |
| 1294 | (void) skip_prologue (get_pc_function_start (fi->pc), &fdata); |
| 1295 | |
| 1296 | /* if saved registers of this frame are not known yet, read and cache them. */ |
| 1297 | |
| 1298 | if (!fi->saved_regs) |
| 1299 | frame_get_saved_regs (fi, &fdata); |
| 1300 | |
| 1301 | /* If no alloca register used, then fi->frame is the value of the %sp for |
| 1302 | this frame, and it is good enough. */ |
| 1303 | |
| 1304 | if (fdata.alloca_reg < 0) |
| 1305 | { |
| 1306 | fi->extra_info->initial_sp = fi->frame; |
| 1307 | return fi->extra_info->initial_sp; |
| 1308 | } |
| 1309 | |
| 1310 | /* This function has an alloca register. If this is the top-most frame |
| 1311 | (with the lowest address), the value in alloca register is good. */ |
| 1312 | |
| 1313 | if (!fi->next) |
| 1314 | return fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
| 1315 | |
| 1316 | /* Otherwise, this is a caller frame. Callee has usually already saved |
| 1317 | registers, but there are exceptions (such as when the callee |
| 1318 | has no parameters). Find the address in which caller's alloca |
| 1319 | register is saved. */ |
| 1320 | |
| 1321 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { |
| 1322 | |
| 1323 | if (!callee_fi->saved_regs) |
| 1324 | frame_get_saved_regs (callee_fi, NULL); |
| 1325 | |
| 1326 | /* this is the address in which alloca register is saved. */ |
| 1327 | |
| 1328 | tmpaddr = callee_fi->saved_regs [fdata.alloca_reg]; |
| 1329 | if (tmpaddr) { |
| 1330 | fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4); |
| 1331 | return fi->extra_info->initial_sp; |
| 1332 | } |
| 1333 | |
| 1334 | /* Go look into deeper levels of the frame chain to see if any one of |
| 1335 | the callees has saved alloca register. */ |
| 1336 | } |
| 1337 | |
| 1338 | /* If alloca register was not saved, by the callee (or any of its callees) |
| 1339 | then the value in the register is still good. */ |
| 1340 | |
| 1341 | fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
| 1342 | return fi->extra_info->initial_sp; |
| 1343 | } |
| 1344 | |
| 1345 | CORE_ADDR |
| 1346 | rs6000_frame_chain (thisframe) |
| 1347 | struct frame_info *thisframe; |
| 1348 | { |
| 1349 | CORE_ADDR fp; |
| 1350 | |
| 1351 | if (USE_GENERIC_DUMMY_FRAMES) |
| 1352 | { |
| 1353 | if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame)) |
| 1354 | return thisframe->frame; /* dummy frame same as caller's frame */ |
| 1355 | } |
| 1356 | |
| 1357 | if (inside_entry_file (thisframe->pc) || |
| 1358 | thisframe->pc == entry_point_address ()) |
| 1359 | return 0; |
| 1360 | |
| 1361 | if (thisframe->signal_handler_caller) |
| 1362 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); |
| 1363 | else if (thisframe->next != NULL |
| 1364 | && thisframe->next->signal_handler_caller |
| 1365 | && frameless_function_invocation (thisframe)) |
| 1366 | /* A frameless function interrupted by a signal did not change the |
| 1367 | frame pointer. */ |
| 1368 | fp = FRAME_FP (thisframe); |
| 1369 | else |
| 1370 | fp = read_memory_integer ((thisframe)->frame, 4); |
| 1371 | |
| 1372 | if (USE_GENERIC_DUMMY_FRAMES) |
| 1373 | { |
| 1374 | CORE_ADDR fpp, lr; |
| 1375 | |
| 1376 | lr = read_register (LR_REGNUM); |
| 1377 | if (lr == entry_point_address ()) |
| 1378 | if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0) |
| 1379 | if (PC_IN_CALL_DUMMY (lr, fpp, fpp)) |
| 1380 | return fpp; |
| 1381 | } |
| 1382 | |
| 1383 | return fp; |
| 1384 | } |
| 1385 | \f |
| 1386 | /* Return nonzero if ADDR (a function pointer) is in the data space and |
| 1387 | is therefore a special function pointer. */ |
| 1388 | |
| 1389 | int |
| 1390 | is_magic_function_pointer (addr) |
| 1391 | CORE_ADDR addr; |
| 1392 | { |
| 1393 | struct obj_section *s; |
| 1394 | |
| 1395 | s = find_pc_section (addr); |
| 1396 | if (s && s->the_bfd_section->flags & SEC_CODE) |
| 1397 | return 0; |
| 1398 | else |
| 1399 | return 1; |
| 1400 | } |
| 1401 | |
| 1402 | #ifdef GDB_TARGET_POWERPC |
| 1403 | int |
| 1404 | gdb_print_insn_powerpc (memaddr, info) |
| 1405 | bfd_vma memaddr; |
| 1406 | disassemble_info *info; |
| 1407 | { |
| 1408 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 1409 | return print_insn_big_powerpc (memaddr, info); |
| 1410 | else |
| 1411 | return print_insn_little_powerpc (memaddr, info); |
| 1412 | } |
| 1413 | #endif |
| 1414 | |
| 1415 | \f |
| 1416 | /* Handling the various PowerPC/RS6000 variants. */ |
| 1417 | |
| 1418 | |
| 1419 | /* The arrays here called register_names_MUMBLE hold names that |
| 1420 | the rs6000_register_name function returns. |
| 1421 | |
| 1422 | For each family of PPC variants, I've tried to isolate out the |
| 1423 | common registers and put them up front, so that as long as you get |
| 1424 | the general family right, GDB will correctly identify the registers |
| 1425 | common to that family. The common register sets are: |
| 1426 | |
| 1427 | For the 60x family: hid0 hid1 iabr dabr pir |
| 1428 | |
| 1429 | For the 505 and 860 family: eie eid nri |
| 1430 | |
| 1431 | For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi |
| 1432 | tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1 |
| 1433 | pbu1 pbl2 pbu2 |
| 1434 | |
| 1435 | Most of these register groups aren't anything formal. I arrived at |
| 1436 | them by looking at the registers that occurred in more than one |
| 1437 | processor. */ |
| 1438 | |
| 1439 | /* UISA register names common across all architectures, including POWER. */ |
| 1440 | |
| 1441 | #define COMMON_UISA_REG_NAMES \ |
| 1442 | /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ |
| 1443 | /* 8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \ |
| 1444 | /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \ |
| 1445 | /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \ |
| 1446 | /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ |
| 1447 | /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \ |
| 1448 | /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \ |
| 1449 | /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \ |
| 1450 | /* 64 */ "pc", "ps" |
| 1451 | |
| 1452 | /* UISA-level SPR names for PowerPC. */ |
| 1453 | #define PPC_UISA_SPR_NAMES \ |
| 1454 | /* 66 */ "cr", "lr", "ctr", "xer", "" |
| 1455 | |
| 1456 | /* Segment register names, for PowerPC. */ |
| 1457 | #define PPC_SEGMENT_REG_NAMES \ |
| 1458 | /* 71 */ "sr0", "sr1", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", \ |
| 1459 | /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15" |
| 1460 | |
| 1461 | /* OEA SPR names for 32-bit PowerPC implementations. |
| 1462 | The blank space is for "asr", which is only present on 64-bit |
| 1463 | implementations. */ |
| 1464 | #define PPC_32_OEA_SPR_NAMES \ |
| 1465 | /* 87 */ "pvr", \ |
| 1466 | /* 88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \ |
| 1467 | /* 92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \ |
| 1468 | /* 96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \ |
| 1469 | /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \ |
| 1470 | /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\ |
| 1471 | /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear" |
| 1472 | |
| 1473 | /* For the RS6000, we only cover user-level SPR's. */ |
| 1474 | char *register_names_rs6000[] = |
| 1475 | { |
| 1476 | COMMON_UISA_REG_NAMES, |
| 1477 | /* 66 */ "cnd", "lr", "cnt", "xer", "mq" |
| 1478 | }; |
| 1479 | |
| 1480 | /* a UISA-only view of the PowerPC. */ |
| 1481 | char *register_names_uisa[] = |
| 1482 | { |
| 1483 | COMMON_UISA_REG_NAMES, |
| 1484 | PPC_UISA_SPR_NAMES |
| 1485 | }; |
| 1486 | |
| 1487 | char *register_names_403[] = |
| 1488 | { |
| 1489 | COMMON_UISA_REG_NAMES, |
| 1490 | PPC_UISA_SPR_NAMES, |
| 1491 | PPC_SEGMENT_REG_NAMES, |
| 1492 | PPC_32_OEA_SPR_NAMES, |
| 1493 | /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit", |
| 1494 | /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2", |
| 1495 | /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2" |
| 1496 | }; |
| 1497 | |
| 1498 | char *register_names_403GC[] = |
| 1499 | { |
| 1500 | COMMON_UISA_REG_NAMES, |
| 1501 | PPC_UISA_SPR_NAMES, |
| 1502 | PPC_SEGMENT_REG_NAMES, |
| 1503 | PPC_32_OEA_SPR_NAMES, |
| 1504 | /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit", |
| 1505 | /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2", |
| 1506 | /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2", |
| 1507 | /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu" |
| 1508 | }; |
| 1509 | |
| 1510 | char *register_names_505[] = |
| 1511 | { |
| 1512 | COMMON_UISA_REG_NAMES, |
| 1513 | PPC_UISA_SPR_NAMES, |
| 1514 | PPC_SEGMENT_REG_NAMES, |
| 1515 | PPC_32_OEA_SPR_NAMES, |
| 1516 | /* 119 */ "eie", "eid", "nri" |
| 1517 | }; |
| 1518 | |
| 1519 | char *register_names_860[] = |
| 1520 | { |
| 1521 | COMMON_UISA_REG_NAMES, |
| 1522 | PPC_UISA_SPR_NAMES, |
| 1523 | PPC_SEGMENT_REG_NAMES, |
| 1524 | PPC_32_OEA_SPR_NAMES, |
| 1525 | /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr", |
| 1526 | /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph", |
| 1527 | /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat", |
| 1528 | /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr", |
| 1529 | /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid", |
| 1530 | /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw", |
| 1531 | /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0", |
| 1532 | /* 165 */ "md_dbram1" |
| 1533 | }; |
| 1534 | |
| 1535 | /* Note that the 601 has different register numbers for reading and |
| 1536 | writing RTCU and RTCL. However, how one reads and writes a |
| 1537 | register is the stub's problem. */ |
| 1538 | char *register_names_601[] = |
| 1539 | { |
| 1540 | COMMON_UISA_REG_NAMES, |
| 1541 | PPC_UISA_SPR_NAMES, |
| 1542 | PPC_SEGMENT_REG_NAMES, |
| 1543 | PPC_32_OEA_SPR_NAMES, |
| 1544 | /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu", |
| 1545 | /* 126 */ "rtcl" |
| 1546 | }; |
| 1547 | |
| 1548 | char *register_names_602[] = |
| 1549 | { |
| 1550 | COMMON_UISA_REG_NAMES, |
| 1551 | PPC_UISA_SPR_NAMES, |
| 1552 | PPC_SEGMENT_REG_NAMES, |
| 1553 | PPC_32_OEA_SPR_NAMES, |
| 1554 | /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr", |
| 1555 | /* 128 */ "ser", "sp", "lt" |
| 1556 | }; |
| 1557 | |
| 1558 | char *register_names_603[] = |
| 1559 | { |
| 1560 | COMMON_UISA_REG_NAMES, |
| 1561 | PPC_UISA_SPR_NAMES, |
| 1562 | PPC_SEGMENT_REG_NAMES, |
| 1563 | PPC_32_OEA_SPR_NAMES, |
| 1564 | /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1", |
| 1565 | /* 127 */ "hash2", "imiss", "icmp", "rpa" |
| 1566 | }; |
| 1567 | |
| 1568 | char *register_names_604[] = |
| 1569 | { |
| 1570 | COMMON_UISA_REG_NAMES, |
| 1571 | PPC_UISA_SPR_NAMES, |
| 1572 | PPC_SEGMENT_REG_NAMES, |
| 1573 | PPC_32_OEA_SPR_NAMES, |
| 1574 | /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2", |
| 1575 | /* 127 */ "sia", "sda" |
| 1576 | }; |
| 1577 | |
| 1578 | char *register_names_750[] = |
| 1579 | { |
| 1580 | COMMON_UISA_REG_NAMES, |
| 1581 | PPC_UISA_SPR_NAMES, |
| 1582 | PPC_SEGMENT_REG_NAMES, |
| 1583 | PPC_32_OEA_SPR_NAMES, |
| 1584 | /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2", |
| 1585 | /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2", |
| 1586 | /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2", |
| 1587 | /* 142 */ "thrm3" |
| 1588 | }; |
| 1589 | |
| 1590 | |
| 1591 | /* Information about a particular processor variant. */ |
| 1592 | struct variant |
| 1593 | { |
| 1594 | /* Name of this variant. */ |
| 1595 | char *name; |
| 1596 | |
| 1597 | /* English description of the variant. */ |
| 1598 | char *description; |
| 1599 | |
| 1600 | /* Table of register names; registers[R] is the name of the register |
| 1601 | number R. */ |
| 1602 | int num_registers; |
| 1603 | char **registers; |
| 1604 | }; |
| 1605 | |
| 1606 | #define num_registers(list) (sizeof (list) / sizeof((list)[0])) |
| 1607 | |
| 1608 | |
| 1609 | /* Information in this table comes from the following web sites: |
| 1610 | IBM: http://www.chips.ibm.com:80/products/embedded/ |
| 1611 | Motorola: http://www.mot.com/SPS/PowerPC/ |
| 1612 | |
| 1613 | I'm sure I've got some of the variant descriptions not quite right. |
| 1614 | Please report any inaccuracies you find to GDB's maintainer. |
| 1615 | |
| 1616 | If you add entries to this table, please be sure to allow the new |
| 1617 | value as an argument to the --with-cpu flag, in configure.in. */ |
| 1618 | |
| 1619 | static struct variant |
| 1620 | variants[] = |
| 1621 | { |
| 1622 | { "ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code", |
| 1623 | num_registers (register_names_uisa), register_names_uisa }, |
| 1624 | { "rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view", |
| 1625 | num_registers (register_names_rs6000), register_names_rs6000 }, |
| 1626 | { "403", "IBM PowerPC 403", |
| 1627 | num_registers (register_names_403), register_names_403 }, |
| 1628 | { "403GC", "IBM PowerPC 403GC", |
| 1629 | num_registers (register_names_403GC), register_names_403GC }, |
| 1630 | { "505", "Motorola PowerPC 505", |
| 1631 | num_registers (register_names_505), register_names_505 }, |
| 1632 | { "860", "Motorola PowerPC 860 or 850", |
| 1633 | num_registers (register_names_860), register_names_860 }, |
| 1634 | { "601", "Motorola PowerPC 601", |
| 1635 | num_registers (register_names_601), register_names_601 }, |
| 1636 | { "602", "Motorola PowerPC 602", |
| 1637 | num_registers (register_names_602), register_names_602 }, |
| 1638 | { "603", "Motorola/IBM PowerPC 603 or 603e", |
| 1639 | num_registers (register_names_603), register_names_603 }, |
| 1640 | { "604", "Motorola PowerPC 604 or 604e", |
| 1641 | num_registers (register_names_604), register_names_604 }, |
| 1642 | { "750", "Motorola/IBM PowerPC 750 or 740", |
| 1643 | num_registers (register_names_750), register_names_750 }, |
| 1644 | { 0, 0, 0, 0 } |
| 1645 | }; |
| 1646 | |
| 1647 | |
| 1648 | static struct variant *current_variant; |
| 1649 | |
| 1650 | char * |
| 1651 | rs6000_register_name (int i) |
| 1652 | { |
| 1653 | if (i < 0 || i >= NUM_REGS) |
| 1654 | error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number"); |
| 1655 | |
| 1656 | return ((i < current_variant->num_registers) |
| 1657 | ? current_variant->registers[i] |
| 1658 | : ""); |
| 1659 | } |
| 1660 | |
| 1661 | |
| 1662 | static void |
| 1663 | install_variant (struct variant *v) |
| 1664 | { |
| 1665 | current_variant = v; |
| 1666 | } |
| 1667 | |
| 1668 | |
| 1669 | /* Look up the variant named NAME in the `variants' table. Return a |
| 1670 | pointer to the struct variant, or null if we couldn't find it. */ |
| 1671 | static struct variant * |
| 1672 | find_variant_by_name (char *name) |
| 1673 | { |
| 1674 | int i; |
| 1675 | |
| 1676 | for (i = 0; variants[i].name; i++) |
| 1677 | if (! strcmp (name, variants[i].name)) |
| 1678 | return &variants[i]; |
| 1679 | |
| 1680 | return 0; |
| 1681 | } |
| 1682 | |
| 1683 | |
| 1684 | /* Install the PPC/RS6000 variant named NAME in the `variants' table. |
| 1685 | Return zero if we installed it successfully, or a non-zero value if |
| 1686 | we couldn't do it. |
| 1687 | |
| 1688 | This might be useful to code outside this file, which doesn't want |
| 1689 | to depend on the exact indices of the entries in the `variants' |
| 1690 | table. Just make it non-static if you want that. */ |
| 1691 | static int |
| 1692 | install_variant_by_name (char *name) |
| 1693 | { |
| 1694 | struct variant *v = find_variant_by_name (name); |
| 1695 | |
| 1696 | if (v) |
| 1697 | { |
| 1698 | install_variant (v); |
| 1699 | return 0; |
| 1700 | } |
| 1701 | else |
| 1702 | return 1; |
| 1703 | } |
| 1704 | |
| 1705 | |
| 1706 | static void |
| 1707 | list_variants () |
| 1708 | { |
| 1709 | int i; |
| 1710 | |
| 1711 | printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n"); |
| 1712 | |
| 1713 | for (i = 0; variants[i].name; i++) |
| 1714 | printf_filtered (" %-8s %s\n", |
| 1715 | variants[i].name, variants[i].description); |
| 1716 | } |
| 1717 | |
| 1718 | |
| 1719 | static void |
| 1720 | show_current_variant () |
| 1721 | { |
| 1722 | printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n", |
| 1723 | current_variant->name); |
| 1724 | } |
| 1725 | |
| 1726 | |
| 1727 | static void |
| 1728 | set_processor (char *arg, int from_tty) |
| 1729 | { |
| 1730 | int i; |
| 1731 | |
| 1732 | if (! arg || arg[0] == '\0') |
| 1733 | { |
| 1734 | list_variants (); |
| 1735 | return; |
| 1736 | } |
| 1737 | |
| 1738 | if (install_variant_by_name (arg)) |
| 1739 | { |
| 1740 | error_begin (); |
| 1741 | fprintf_filtered (gdb_stderr, |
| 1742 | "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg); |
| 1743 | list_variants (); |
| 1744 | return_to_top_level (RETURN_ERROR); |
| 1745 | } |
| 1746 | |
| 1747 | show_current_variant (); |
| 1748 | } |
| 1749 | |
| 1750 | static void |
| 1751 | show_processor (char *arg, int from_tty) |
| 1752 | { |
| 1753 | show_current_variant (); |
| 1754 | } |
| 1755 | |
| 1756 | |
| 1757 | \f |
| 1758 | /* Initialization code. */ |
| 1759 | |
| 1760 | void |
| 1761 | _initialize_rs6000_tdep () |
| 1762 | { |
| 1763 | /* FIXME, this should not be decided via ifdef. */ |
| 1764 | #ifdef GDB_TARGET_POWERPC |
| 1765 | tm_print_insn = gdb_print_insn_powerpc; |
| 1766 | #else |
| 1767 | tm_print_insn = print_insn_rs6000; |
| 1768 | #endif |
| 1769 | |
| 1770 | /* I don't think we should use the set/show command arrangement |
| 1771 | here, because the way that's implemented makes it hard to do the |
| 1772 | error checking we want in a reasonable way. So we just add them |
| 1773 | as two separate commands. */ |
| 1774 | add_cmd ("processor", class_support, set_processor, |
| 1775 | "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\ |
| 1776 | If you set this, GDB will know about the special-purpose registers that are\n\ |
| 1777 | available on the given variant.\n\ |
| 1778 | Type `set processor' alone for a list of recognized variant names.", |
| 1779 | &setlist); |
| 1780 | add_cmd ("processor", class_support, show_processor, |
| 1781 | "Show the variant of the PowerPC or RS6000 processor in use.\n\ |
| 1782 | Use `set processor' to change this.", |
| 1783 | &showlist); |
| 1784 | |
| 1785 | /* Set the current PPC processor variant. */ |
| 1786 | { |
| 1787 | int status = 1; |
| 1788 | |
| 1789 | #ifdef TARGET_CPU_DEFAULT |
| 1790 | status = install_variant_by_name (TARGET_CPU_DEFAULT); |
| 1791 | #endif |
| 1792 | |
| 1793 | if (status) |
| 1794 | { |
| 1795 | #ifdef GDB_TARGET_POWERPC |
| 1796 | install_variant_by_name ("ppc-uisa"); |
| 1797 | #else |
| 1798 | install_variant_by_name ("rs6000"); |
| 1799 | #endif |
| 1800 | } |
| 1801 | } |
| 1802 | } |