| 1 | /* Target-dependent code for s390. |
| 2 | |
| 3 | Copyright (C) 2001-2018 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 19 | |
| 20 | #include "defs.h" |
| 21 | |
| 22 | #include "arch-utils.h" |
| 23 | #include "ax-gdb.h" |
| 24 | #include "dwarf2-frame.h" |
| 25 | #include "elf/s390.h" |
| 26 | #include "elf-bfd.h" |
| 27 | #include "frame-base.h" |
| 28 | #include "frame-unwind.h" |
| 29 | #include "gdbarch.h" |
| 30 | #include "gdbcore.h" |
| 31 | #include "infrun.h" |
| 32 | #include "linux-tdep.h" |
| 33 | #include "objfiles.h" |
| 34 | #include "osabi.h" |
| 35 | #include "record-full.h" |
| 36 | #include "regcache.h" |
| 37 | #include "reggroups.h" |
| 38 | #include "s390-tdep.h" |
| 39 | #include "target-descriptions.h" |
| 40 | #include "trad-frame.h" |
| 41 | #include "value.h" |
| 42 | |
| 43 | /* Holds the current set of options to be passed to the disassembler. */ |
| 44 | static char *s390_disassembler_options; |
| 45 | |
| 46 | /* Breakpoints. */ |
| 47 | |
| 48 | constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 }; |
| 49 | |
| 50 | typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint; |
| 51 | |
| 52 | /* Decoding S/390 instructions. */ |
| 53 | |
| 54 | /* Read a single instruction from address AT. */ |
| 55 | |
| 56 | static int |
| 57 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) |
| 58 | { |
| 59 | static int s390_instrlen[] = { 2, 4, 4, 6 }; |
| 60 | int instrlen; |
| 61 | |
| 62 | if (target_read_memory (at, &instr[0], 2)) |
| 63 | return -1; |
| 64 | instrlen = s390_instrlen[instr[0] >> 6]; |
| 65 | if (instrlen > 2) |
| 66 | { |
| 67 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
| 68 | return -1; |
| 69 | } |
| 70 | return instrlen; |
| 71 | } |
| 72 | |
| 73 | /* The functions below are for recognizing and decoding S/390 |
| 74 | instructions of various formats. Each of them checks whether INSN |
| 75 | is an instruction of the given format, with the specified opcodes. |
| 76 | If it is, it sets the remaining arguments to the values of the |
| 77 | instruction's fields, and returns a non-zero value; otherwise, it |
| 78 | returns zero. |
| 79 | |
| 80 | These functions' arguments appear in the order they appear in the |
| 81 | instruction, not in the machine-language form. So, opcodes always |
| 82 | come first, even though they're sometimes scattered around the |
| 83 | instructions. And displacements appear before base and extension |
| 84 | registers, as they do in the assembly syntax, not at the end, as |
| 85 | they do in the machine language. |
| 86 | |
| 87 | Test for RI instruction format. */ |
| 88 | |
| 89 | static int |
| 90 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
| 91 | { |
| 92 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) |
| 93 | { |
| 94 | *r1 = (insn[1] >> 4) & 0xf; |
| 95 | /* i2 is a 16-bit signed quantity. */ |
| 96 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; |
| 97 | return 1; |
| 98 | } |
| 99 | else |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | /* Test for RIL instruction format. See comment on is_ri for details. */ |
| 104 | |
| 105 | static int |
| 106 | is_ril (bfd_byte *insn, int op1, int op2, |
| 107 | unsigned int *r1, int *i2) |
| 108 | { |
| 109 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) |
| 110 | { |
| 111 | *r1 = (insn[1] >> 4) & 0xf; |
| 112 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, |
| 113 | no sign extension is necessary, but we don't want to assume |
| 114 | that. */ |
| 115 | *i2 = (((insn[2] << 24) |
| 116 | | (insn[3] << 16) |
| 117 | | (insn[4] << 8) |
| 118 | | (insn[5])) ^ 0x80000000) - 0x80000000; |
| 119 | return 1; |
| 120 | } |
| 121 | else |
| 122 | return 0; |
| 123 | } |
| 124 | |
| 125 | /* Test for RR instruction format. See comment on is_ri for details. */ |
| 126 | |
| 127 | static int |
| 128 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) |
| 129 | { |
| 130 | if (insn[0] == op) |
| 131 | { |
| 132 | *r1 = (insn[1] >> 4) & 0xf; |
| 133 | *r2 = insn[1] & 0xf; |
| 134 | return 1; |
| 135 | } |
| 136 | else |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | /* Test for RRE instruction format. See comment on is_ri for details. */ |
| 141 | |
| 142 | static int |
| 143 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) |
| 144 | { |
| 145 | if (((insn[0] << 8) | insn[1]) == op) |
| 146 | { |
| 147 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ |
| 148 | *r1 = (insn[3] >> 4) & 0xf; |
| 149 | *r2 = insn[3] & 0xf; |
| 150 | return 1; |
| 151 | } |
| 152 | else |
| 153 | return 0; |
| 154 | } |
| 155 | |
| 156 | /* Test for RS instruction format. See comment on is_ri for details. */ |
| 157 | |
| 158 | static int |
| 159 | is_rs (bfd_byte *insn, int op, |
| 160 | unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) |
| 161 | { |
| 162 | if (insn[0] == op) |
| 163 | { |
| 164 | *r1 = (insn[1] >> 4) & 0xf; |
| 165 | *r3 = insn[1] & 0xf; |
| 166 | *b2 = (insn[2] >> 4) & 0xf; |
| 167 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; |
| 168 | return 1; |
| 169 | } |
| 170 | else |
| 171 | return 0; |
| 172 | } |
| 173 | |
| 174 | /* Test for RSY instruction format. See comment on is_ri for details. */ |
| 175 | |
| 176 | static int |
| 177 | is_rsy (bfd_byte *insn, int op1, int op2, |
| 178 | unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) |
| 179 | { |
| 180 | if (insn[0] == op1 |
| 181 | && insn[5] == op2) |
| 182 | { |
| 183 | *r1 = (insn[1] >> 4) & 0xf; |
| 184 | *r3 = insn[1] & 0xf; |
| 185 | *b2 = (insn[2] >> 4) & 0xf; |
| 186 | /* The 'long displacement' is a 20-bit signed integer. */ |
| 187 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) |
| 188 | ^ 0x80000) - 0x80000; |
| 189 | return 1; |
| 190 | } |
| 191 | else |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | /* Test for RX instruction format. See comment on is_ri for details. */ |
| 196 | |
| 197 | static int |
| 198 | is_rx (bfd_byte *insn, int op, |
| 199 | unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) |
| 200 | { |
| 201 | if (insn[0] == op) |
| 202 | { |
| 203 | *r1 = (insn[1] >> 4) & 0xf; |
| 204 | *x2 = insn[1] & 0xf; |
| 205 | *b2 = (insn[2] >> 4) & 0xf; |
| 206 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; |
| 207 | return 1; |
| 208 | } |
| 209 | else |
| 210 | return 0; |
| 211 | } |
| 212 | |
| 213 | /* Test for RXY instruction format. See comment on is_ri for details. */ |
| 214 | |
| 215 | static int |
| 216 | is_rxy (bfd_byte *insn, int op1, int op2, |
| 217 | unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) |
| 218 | { |
| 219 | if (insn[0] == op1 |
| 220 | && insn[5] == op2) |
| 221 | { |
| 222 | *r1 = (insn[1] >> 4) & 0xf; |
| 223 | *x2 = insn[1] & 0xf; |
| 224 | *b2 = (insn[2] >> 4) & 0xf; |
| 225 | /* The 'long displacement' is a 20-bit signed integer. */ |
| 226 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) |
| 227 | ^ 0x80000) - 0x80000; |
| 228 | return 1; |
| 229 | } |
| 230 | else |
| 231 | return 0; |
| 232 | } |
| 233 | |
| 234 | /* A helper for s390_software_single_step, decides if an instruction |
| 235 | is a partial-execution instruction that needs to be executed until |
| 236 | completion when in record mode. If it is, returns 1 and writes |
| 237 | instruction length to a pointer. */ |
| 238 | |
| 239 | static int |
| 240 | s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len) |
| 241 | { |
| 242 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 243 | uint16_t insn; |
| 244 | |
| 245 | insn = read_memory_integer (loc, 2, byte_order); |
| 246 | |
| 247 | switch (insn >> 8) |
| 248 | { |
| 249 | case 0xa8: /* MVCLE */ |
| 250 | *len = 4; |
| 251 | return 1; |
| 252 | |
| 253 | case 0xeb: |
| 254 | { |
| 255 | insn = read_memory_integer (loc + 4, 2, byte_order); |
| 256 | if ((insn & 0xff) == 0x8e) |
| 257 | { |
| 258 | /* MVCLU */ |
| 259 | *len = 6; |
| 260 | return 1; |
| 261 | } |
| 262 | } |
| 263 | break; |
| 264 | } |
| 265 | |
| 266 | switch (insn) |
| 267 | { |
| 268 | case 0xb255: /* MVST */ |
| 269 | case 0xb263: /* CMPSC */ |
| 270 | case 0xb2a5: /* TRE */ |
| 271 | case 0xb2a6: /* CU21 */ |
| 272 | case 0xb2a7: /* CU12 */ |
| 273 | case 0xb9b0: /* CU14 */ |
| 274 | case 0xb9b1: /* CU24 */ |
| 275 | case 0xb9b2: /* CU41 */ |
| 276 | case 0xb9b3: /* CU42 */ |
| 277 | case 0xb92a: /* KMF */ |
| 278 | case 0xb92b: /* KMO */ |
| 279 | case 0xb92f: /* KMC */ |
| 280 | case 0xb92d: /* KMCTR */ |
| 281 | case 0xb92e: /* KM */ |
| 282 | case 0xb93c: /* PPNO */ |
| 283 | case 0xb990: /* TRTT */ |
| 284 | case 0xb991: /* TRTO */ |
| 285 | case 0xb992: /* TROT */ |
| 286 | case 0xb993: /* TROO */ |
| 287 | *len = 4; |
| 288 | return 1; |
| 289 | } |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
| 294 | /* Implement the "software_single_step" gdbarch method, needed to single step |
| 295 | through instructions like MVCLE in record mode, to make sure they are |
| 296 | executed to completion. Without that, record will save the full length |
| 297 | of destination buffer on every iteration, even though the CPU will only |
| 298 | process about 4kiB of it each time, leading to O(n**2) memory and time |
| 299 | complexity. */ |
| 300 | |
| 301 | static std::vector<CORE_ADDR> |
| 302 | s390_software_single_step (struct regcache *regcache) |
| 303 | { |
| 304 | struct gdbarch *gdbarch = regcache->arch (); |
| 305 | CORE_ADDR loc = regcache_read_pc (regcache); |
| 306 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 307 | int len; |
| 308 | uint16_t insn; |
| 309 | |
| 310 | /* Special handling only if recording. */ |
| 311 | if (!record_full_is_used ()) |
| 312 | return {}; |
| 313 | |
| 314 | /* First, match a partial instruction. */ |
| 315 | if (!s390_is_partial_instruction (gdbarch, loc, &len)) |
| 316 | return {}; |
| 317 | |
| 318 | loc += len; |
| 319 | |
| 320 | /* Second, look for a branch back to it. */ |
| 321 | insn = read_memory_integer (loc, 2, byte_order); |
| 322 | if (insn != 0xa714) /* BRC with mask 1 */ |
| 323 | return {}; |
| 324 | |
| 325 | insn = read_memory_integer (loc + 2, 2, byte_order); |
| 326 | if (insn != (uint16_t) -(len / 2)) |
| 327 | return {}; |
| 328 | |
| 329 | loc += 4; |
| 330 | |
| 331 | /* Found it, step past the whole thing. */ |
| 332 | return {loc}; |
| 333 | } |
| 334 | |
| 335 | /* Displaced stepping. */ |
| 336 | |
| 337 | /* Return true if INSN is a non-branch RIL-b or RIL-c format |
| 338 | instruction. */ |
| 339 | |
| 340 | static int |
| 341 | is_non_branch_ril (gdb_byte *insn) |
| 342 | { |
| 343 | gdb_byte op1 = insn[0]; |
| 344 | |
| 345 | if (op1 == 0xc4) |
| 346 | { |
| 347 | gdb_byte op2 = insn[1] & 0x0f; |
| 348 | |
| 349 | switch (op2) |
| 350 | { |
| 351 | case 0x02: /* llhrl */ |
| 352 | case 0x04: /* lghrl */ |
| 353 | case 0x05: /* lhrl */ |
| 354 | case 0x06: /* llghrl */ |
| 355 | case 0x07: /* sthrl */ |
| 356 | case 0x08: /* lgrl */ |
| 357 | case 0x0b: /* stgrl */ |
| 358 | case 0x0c: /* lgfrl */ |
| 359 | case 0x0d: /* lrl */ |
| 360 | case 0x0e: /* llgfrl */ |
| 361 | case 0x0f: /* strl */ |
| 362 | return 1; |
| 363 | } |
| 364 | } |
| 365 | else if (op1 == 0xc6) |
| 366 | { |
| 367 | gdb_byte op2 = insn[1] & 0x0f; |
| 368 | |
| 369 | switch (op2) |
| 370 | { |
| 371 | case 0x00: /* exrl */ |
| 372 | case 0x02: /* pfdrl */ |
| 373 | case 0x04: /* cghrl */ |
| 374 | case 0x05: /* chrl */ |
| 375 | case 0x06: /* clghrl */ |
| 376 | case 0x07: /* clhrl */ |
| 377 | case 0x08: /* cgrl */ |
| 378 | case 0x0a: /* clgrl */ |
| 379 | case 0x0c: /* cgfrl */ |
| 380 | case 0x0d: /* crl */ |
| 381 | case 0x0e: /* clgfrl */ |
| 382 | case 0x0f: /* clrl */ |
| 383 | return 1; |
| 384 | } |
| 385 | } |
| 386 | |
| 387 | return 0; |
| 388 | } |
| 389 | |
| 390 | typedef buf_displaced_step_closure s390_displaced_step_closure; |
| 391 | |
| 392 | /* Implementation of gdbarch_displaced_step_copy_insn. */ |
| 393 | |
| 394 | static struct displaced_step_closure * |
| 395 | s390_displaced_step_copy_insn (struct gdbarch *gdbarch, |
| 396 | CORE_ADDR from, CORE_ADDR to, |
| 397 | struct regcache *regs) |
| 398 | { |
| 399 | size_t len = gdbarch_max_insn_length (gdbarch); |
| 400 | std::unique_ptr<s390_displaced_step_closure> closure |
| 401 | (new s390_displaced_step_closure (len)); |
| 402 | gdb_byte *buf = closure->buf.data (); |
| 403 | |
| 404 | read_memory (from, buf, len); |
| 405 | |
| 406 | /* Adjust the displacement field of PC-relative RIL instructions, |
| 407 | except branches. The latter are handled in the fixup hook. */ |
| 408 | if (is_non_branch_ril (buf)) |
| 409 | { |
| 410 | LONGEST offset; |
| 411 | |
| 412 | offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG); |
| 413 | offset = (from - to + offset * 2) / 2; |
| 414 | |
| 415 | /* If the instruction is too far from the jump pad, punt. This |
| 416 | will usually happen with instructions in shared libraries. |
| 417 | We could probably support these by rewriting them to be |
| 418 | absolute or fully emulating them. */ |
| 419 | if (offset < INT32_MIN || offset > INT32_MAX) |
| 420 | { |
| 421 | /* Let the core fall back to stepping over the breakpoint |
| 422 | in-line. */ |
| 423 | if (debug_displaced) |
| 424 | { |
| 425 | fprintf_unfiltered (gdb_stdlog, |
| 426 | "displaced: can't displaced step " |
| 427 | "RIL instruction: offset %s out of range\n", |
| 428 | plongest (offset)); |
| 429 | } |
| 430 | |
| 431 | return NULL; |
| 432 | } |
| 433 | |
| 434 | store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset); |
| 435 | } |
| 436 | |
| 437 | write_memory (to, buf, len); |
| 438 | |
| 439 | if (debug_displaced) |
| 440 | { |
| 441 | fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ", |
| 442 | paddress (gdbarch, from), paddress (gdbarch, to)); |
| 443 | displaced_step_dump_bytes (gdb_stdlog, buf, len); |
| 444 | } |
| 445 | |
| 446 | return closure.release (); |
| 447 | } |
| 448 | |
| 449 | /* Fix up the state of registers and memory after having single-stepped |
| 450 | a displaced instruction. */ |
| 451 | |
| 452 | static void |
| 453 | s390_displaced_step_fixup (struct gdbarch *gdbarch, |
| 454 | struct displaced_step_closure *closure_, |
| 455 | CORE_ADDR from, CORE_ADDR to, |
| 456 | struct regcache *regs) |
| 457 | { |
| 458 | /* Our closure is a copy of the instruction. */ |
| 459 | s390_displaced_step_closure *closure |
| 460 | = (s390_displaced_step_closure *) closure_; |
| 461 | gdb_byte *insn = closure->buf.data (); |
| 462 | static int s390_instrlen[] = { 2, 4, 4, 6 }; |
| 463 | int insnlen = s390_instrlen[insn[0] >> 6]; |
| 464 | |
| 465 | /* Fields for various kinds of instructions. */ |
| 466 | unsigned int b2, r1, r2, x2, r3; |
| 467 | int i2, d2; |
| 468 | |
| 469 | /* Get current PC and addressing mode bit. */ |
| 470 | CORE_ADDR pc = regcache_read_pc (regs); |
| 471 | ULONGEST amode = 0; |
| 472 | |
| 473 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 474 | { |
| 475 | regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); |
| 476 | amode &= 0x80000000; |
| 477 | } |
| 478 | |
| 479 | if (debug_displaced) |
| 480 | fprintf_unfiltered (gdb_stdlog, |
| 481 | "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n", |
| 482 | paddress (gdbarch, from), paddress (gdbarch, to), |
| 483 | paddress (gdbarch, pc), insnlen, (int) amode); |
| 484 | |
| 485 | /* Handle absolute branch and save instructions. */ |
| 486 | if (is_rr (insn, op_basr, &r1, &r2) |
| 487 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) |
| 488 | { |
| 489 | /* Recompute saved return address in R1. */ |
| 490 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, |
| 491 | amode | (from + insnlen)); |
| 492 | } |
| 493 | |
| 494 | /* Handle absolute branch instructions. */ |
| 495 | else if (is_rr (insn, op_bcr, &r1, &r2) |
| 496 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) |
| 497 | || is_rr (insn, op_bctr, &r1, &r2) |
| 498 | || is_rre (insn, op_bctgr, &r1, &r2) |
| 499 | || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) |
| 500 | || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) |
| 501 | || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) |
| 502 | || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) |
| 503 | || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) |
| 504 | || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) |
| 505 | { |
| 506 | /* Update PC iff branch was *not* taken. */ |
| 507 | if (pc == to + insnlen) |
| 508 | regcache_write_pc (regs, from + insnlen); |
| 509 | } |
| 510 | |
| 511 | /* Handle PC-relative branch and save instructions. */ |
| 512 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) |
| 513 | || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) |
| 514 | { |
| 515 | /* Update PC. */ |
| 516 | regcache_write_pc (regs, pc - to + from); |
| 517 | /* Recompute saved return address in R1. */ |
| 518 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, |
| 519 | amode | (from + insnlen)); |
| 520 | } |
| 521 | |
| 522 | /* Handle LOAD ADDRESS RELATIVE LONG. */ |
| 523 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
| 524 | { |
| 525 | /* Update PC. */ |
| 526 | regcache_write_pc (regs, from + insnlen); |
| 527 | /* Recompute output address in R1. */ |
| 528 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, |
| 529 | amode | (from + i2 * 2)); |
| 530 | } |
| 531 | |
| 532 | /* If we executed a breakpoint instruction, point PC right back at it. */ |
| 533 | else if (insn[0] == 0x0 && insn[1] == 0x1) |
| 534 | regcache_write_pc (regs, from); |
| 535 | |
| 536 | /* For any other insn, adjust PC by negated displacement. PC then |
| 537 | points right after the original instruction, except for PC-relative |
| 538 | branches, where it points to the adjusted branch target. */ |
| 539 | else |
| 540 | regcache_write_pc (regs, pc - to + from); |
| 541 | |
| 542 | if (debug_displaced) |
| 543 | fprintf_unfiltered (gdb_stdlog, |
| 544 | "displaced: (s390) pc is now %s\n", |
| 545 | paddress (gdbarch, regcache_read_pc (regs))); |
| 546 | } |
| 547 | |
| 548 | /* Implement displaced_step_hw_singlestep gdbarch method. */ |
| 549 | |
| 550 | static int |
| 551 | s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch, |
| 552 | struct displaced_step_closure *closure) |
| 553 | { |
| 554 | return 1; |
| 555 | } |
| 556 | |
| 557 | /* Prologue analysis. */ |
| 558 | |
| 559 | struct s390_prologue_data { |
| 560 | |
| 561 | /* The stack. */ |
| 562 | struct pv_area *stack; |
| 563 | |
| 564 | /* The size and byte-order of a GPR or FPR. */ |
| 565 | int gpr_size; |
| 566 | int fpr_size; |
| 567 | enum bfd_endian byte_order; |
| 568 | |
| 569 | /* The general-purpose registers. */ |
| 570 | pv_t gpr[S390_NUM_GPRS]; |
| 571 | |
| 572 | /* The floating-point registers. */ |
| 573 | pv_t fpr[S390_NUM_FPRS]; |
| 574 | |
| 575 | /* The offset relative to the CFA where the incoming GPR N was saved |
| 576 | by the function prologue. 0 if not saved or unknown. */ |
| 577 | int gpr_slot[S390_NUM_GPRS]; |
| 578 | |
| 579 | /* Likewise for FPRs. */ |
| 580 | int fpr_slot[S390_NUM_FPRS]; |
| 581 | |
| 582 | /* Nonzero if the backchain was saved. This is assumed to be the |
| 583 | case when the incoming SP is saved at the current SP location. */ |
| 584 | int back_chain_saved_p; |
| 585 | }; |
| 586 | |
| 587 | /* Return the effective address for an X-style instruction, like: |
| 588 | |
| 589 | L R1, D2(X2, B2) |
| 590 | |
| 591 | Here, X2 and B2 are registers, and D2 is a signed 20-bit |
| 592 | constant; the effective address is the sum of all three. If either |
| 593 | X2 or B2 are zero, then it doesn't contribute to the sum --- this |
| 594 | means that r0 can't be used as either X2 or B2. */ |
| 595 | |
| 596 | static pv_t |
| 597 | s390_addr (struct s390_prologue_data *data, |
| 598 | int d2, unsigned int x2, unsigned int b2) |
| 599 | { |
| 600 | pv_t result; |
| 601 | |
| 602 | result = pv_constant (d2); |
| 603 | if (x2) |
| 604 | result = pv_add (result, data->gpr[x2]); |
| 605 | if (b2) |
| 606 | result = pv_add (result, data->gpr[b2]); |
| 607 | |
| 608 | return result; |
| 609 | } |
| 610 | |
| 611 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ |
| 612 | |
| 613 | static void |
| 614 | s390_store (struct s390_prologue_data *data, |
| 615 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, |
| 616 | pv_t value) |
| 617 | { |
| 618 | pv_t addr = s390_addr (data, d2, x2, b2); |
| 619 | pv_t offset; |
| 620 | |
| 621 | /* Check whether we are storing the backchain. */ |
| 622 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
| 623 | |
| 624 | if (pv_is_constant (offset) && offset.k == 0) |
| 625 | if (size == data->gpr_size |
| 626 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
| 627 | { |
| 628 | data->back_chain_saved_p = 1; |
| 629 | return; |
| 630 | } |
| 631 | |
| 632 | /* Check whether we are storing a register into the stack. */ |
| 633 | if (!data->stack->store_would_trash (addr)) |
| 634 | data->stack->store (addr, size, value); |
| 635 | |
| 636 | /* Note: If this is some store we cannot identify, you might think we |
| 637 | should forget our cached values, as any of those might have been hit. |
| 638 | |
| 639 | However, we make the assumption that the register save areas are only |
| 640 | ever stored to once in any given function, and we do recognize these |
| 641 | stores. Thus every store we cannot recognize does not hit our data. */ |
| 642 | } |
| 643 | |
| 644 | /* Do a SIZE-byte load from D2(X2,B2). */ |
| 645 | |
| 646 | static pv_t |
| 647 | s390_load (struct s390_prologue_data *data, |
| 648 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) |
| 649 | |
| 650 | { |
| 651 | pv_t addr = s390_addr (data, d2, x2, b2); |
| 652 | |
| 653 | /* If it's a load from an in-line constant pool, then we can |
| 654 | simulate that, under the assumption that the code isn't |
| 655 | going to change between the time the processor actually |
| 656 | executed it creating the current frame, and the time when |
| 657 | we're analyzing the code to unwind past that frame. */ |
| 658 | if (pv_is_constant (addr)) |
| 659 | { |
| 660 | struct target_section *secp; |
| 661 | secp = target_section_by_addr (¤t_target, addr.k); |
| 662 | if (secp != NULL |
| 663 | && (bfd_get_section_flags (secp->the_bfd_section->owner, |
| 664 | secp->the_bfd_section) |
| 665 | & SEC_READONLY)) |
| 666 | return pv_constant (read_memory_integer (addr.k, size, |
| 667 | data->byte_order)); |
| 668 | } |
| 669 | |
| 670 | /* Check whether we are accessing one of our save slots. */ |
| 671 | return data->stack->fetch (addr, size); |
| 672 | } |
| 673 | |
| 674 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
| 675 | this to pv_area::scan. |
| 676 | |
| 677 | If VALUE is a saved register, ADDR says it was saved at a constant |
| 678 | offset from the frame base, and SIZE indicates that the whole |
| 679 | register was saved, record its offset in the reg_offset table in |
| 680 | PROLOGUE_UNTYPED. */ |
| 681 | |
| 682 | static void |
| 683 | s390_check_for_saved (void *data_untyped, pv_t addr, |
| 684 | CORE_ADDR size, pv_t value) |
| 685 | { |
| 686 | struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped; |
| 687 | int i, offset; |
| 688 | |
| 689 | if (!pv_is_register (addr, S390_SP_REGNUM)) |
| 690 | return; |
| 691 | |
| 692 | offset = 16 * data->gpr_size + 32 - addr.k; |
| 693 | |
| 694 | /* If we are storing the original value of a register, we want to |
| 695 | record the CFA offset. If the same register is stored multiple |
| 696 | times, the stack slot with the highest address counts. */ |
| 697 | |
| 698 | for (i = 0; i < S390_NUM_GPRS; i++) |
| 699 | if (size == data->gpr_size |
| 700 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) |
| 701 | if (data->gpr_slot[i] == 0 |
| 702 | || data->gpr_slot[i] > offset) |
| 703 | { |
| 704 | data->gpr_slot[i] = offset; |
| 705 | return; |
| 706 | } |
| 707 | |
| 708 | for (i = 0; i < S390_NUM_FPRS; i++) |
| 709 | if (size == data->fpr_size |
| 710 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) |
| 711 | if (data->fpr_slot[i] == 0 |
| 712 | || data->fpr_slot[i] > offset) |
| 713 | { |
| 714 | data->fpr_slot[i] = offset; |
| 715 | return; |
| 716 | } |
| 717 | } |
| 718 | |
| 719 | /* Analyze the prologue of the function starting at START_PC, continuing at |
| 720 | most until CURRENT_PC. Initialize DATA to hold all information we find |
| 721 | out about the state of the registers and stack slots. Return the address |
| 722 | of the instruction after the last one that changed the SP, FP, or back |
| 723 | chain; or zero on error. */ |
| 724 | |
| 725 | static CORE_ADDR |
| 726 | s390_analyze_prologue (struct gdbarch *gdbarch, |
| 727 | CORE_ADDR start_pc, |
| 728 | CORE_ADDR current_pc, |
| 729 | struct s390_prologue_data *data) |
| 730 | { |
| 731 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 732 | |
| 733 | /* Our return value: |
| 734 | The address of the instruction after the last one that changed |
| 735 | the SP, FP, or back chain; zero if we got an error trying to |
| 736 | read memory. */ |
| 737 | CORE_ADDR result = start_pc; |
| 738 | |
| 739 | /* The current PC for our abstract interpretation. */ |
| 740 | CORE_ADDR pc; |
| 741 | |
| 742 | /* The address of the next instruction after that. */ |
| 743 | CORE_ADDR next_pc; |
| 744 | |
| 745 | pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
| 746 | scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack); |
| 747 | |
| 748 | /* Set up everything's initial value. */ |
| 749 | { |
| 750 | int i; |
| 751 | |
| 752 | /* For the purpose of prologue tracking, we consider the GPR size to |
| 753 | be equal to the ABI word size, even if it is actually larger |
| 754 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ |
| 755 | data->gpr_size = word_size; |
| 756 | data->fpr_size = 8; |
| 757 | data->byte_order = gdbarch_byte_order (gdbarch); |
| 758 | |
| 759 | for (i = 0; i < S390_NUM_GPRS; i++) |
| 760 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
| 761 | |
| 762 | for (i = 0; i < S390_NUM_FPRS; i++) |
| 763 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
| 764 | |
| 765 | for (i = 0; i < S390_NUM_GPRS; i++) |
| 766 | data->gpr_slot[i] = 0; |
| 767 | |
| 768 | for (i = 0; i < S390_NUM_FPRS; i++) |
| 769 | data->fpr_slot[i] = 0; |
| 770 | |
| 771 | data->back_chain_saved_p = 0; |
| 772 | } |
| 773 | |
| 774 | /* Start interpreting instructions, until we hit the frame's |
| 775 | current PC or the first branch instruction. */ |
| 776 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) |
| 777 | { |
| 778 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
| 779 | int insn_len = s390_readinstruction (insn, pc); |
| 780 | |
| 781 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
| 782 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; |
| 783 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; |
| 784 | |
| 785 | /* Fields for various kinds of instructions. */ |
| 786 | unsigned int b2, r1, r2, x2, r3; |
| 787 | int i2, d2; |
| 788 | |
| 789 | /* The values of SP and FP before this instruction, |
| 790 | for detecting instructions that change them. */ |
| 791 | pv_t pre_insn_sp, pre_insn_fp; |
| 792 | /* Likewise for the flag whether the back chain was saved. */ |
| 793 | int pre_insn_back_chain_saved_p; |
| 794 | |
| 795 | /* If we got an error trying to read the instruction, report it. */ |
| 796 | if (insn_len < 0) |
| 797 | { |
| 798 | result = 0; |
| 799 | break; |
| 800 | } |
| 801 | |
| 802 | next_pc = pc + insn_len; |
| 803 | |
| 804 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
| 805 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
| 806 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
| 807 | |
| 808 | /* LHI r1, i2 --- load halfword immediate. */ |
| 809 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ |
| 810 | /* LGFI r1, i2 --- load fullword immediate. */ |
| 811 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) |
| 812 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) |
| 813 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) |
| 814 | data->gpr[r1] = pv_constant (i2); |
| 815 | |
| 816 | /* LR r1, r2 --- load from register. */ |
| 817 | /* LGR r1, r2 --- load from register (64-bit version). */ |
| 818 | else if (is_rr (insn32, op_lr, &r1, &r2) |
| 819 | || is_rre (insn64, op_lgr, &r1, &r2)) |
| 820 | data->gpr[r1] = data->gpr[r2]; |
| 821 | |
| 822 | /* L r1, d2(x2, b2) --- load. */ |
| 823 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ |
| 824 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ |
| 825 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) |
| 826 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) |
| 827 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) |
| 828 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); |
| 829 | |
| 830 | /* ST r1, d2(x2, b2) --- store. */ |
| 831 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ |
| 832 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ |
| 833 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) |
| 834 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) |
| 835 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) |
| 836 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); |
| 837 | |
| 838 | /* STD r1, d2(x2,b2) --- store floating-point register. */ |
| 839 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
| 840 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
| 841 | |
| 842 | /* STM r1, r3, d2(b2) --- store multiple. */ |
| 843 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement |
| 844 | version). */ |
| 845 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ |
| 846 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) |
| 847 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) |
| 848 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) |
| 849 | { |
| 850 | for (; r1 <= r3; r1++, d2 += data->gpr_size) |
| 851 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); |
| 852 | } |
| 853 | |
| 854 | /* AHI r1, i2 --- add halfword immediate. */ |
| 855 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ |
| 856 | /* AFI r1, i2 --- add fullword immediate. */ |
| 857 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ |
| 858 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) |
| 859 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) |
| 860 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) |
| 861 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) |
| 862 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); |
| 863 | |
| 864 | /* ALFI r1, i2 --- add logical immediate. */ |
| 865 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ |
| 866 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) |
| 867 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) |
| 868 | data->gpr[r1] = pv_add_constant (data->gpr[r1], |
| 869 | (CORE_ADDR)i2 & 0xffffffff); |
| 870 | |
| 871 | /* AR r1, r2 -- add register. */ |
| 872 | /* AGR r1, r2 -- add register (64-bit version). */ |
| 873 | else if (is_rr (insn32, op_ar, &r1, &r2) |
| 874 | || is_rre (insn64, op_agr, &r1, &r2)) |
| 875 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); |
| 876 | |
| 877 | /* A r1, d2(x2, b2) -- add. */ |
| 878 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ |
| 879 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ |
| 880 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) |
| 881 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) |
| 882 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) |
| 883 | data->gpr[r1] = pv_add (data->gpr[r1], |
| 884 | s390_load (data, d2, x2, b2, data->gpr_size)); |
| 885 | |
| 886 | /* SLFI r1, i2 --- subtract logical immediate. */ |
| 887 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ |
| 888 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) |
| 889 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) |
| 890 | data->gpr[r1] = pv_add_constant (data->gpr[r1], |
| 891 | -((CORE_ADDR)i2 & 0xffffffff)); |
| 892 | |
| 893 | /* SR r1, r2 -- subtract register. */ |
| 894 | /* SGR r1, r2 -- subtract register (64-bit version). */ |
| 895 | else if (is_rr (insn32, op_sr, &r1, &r2) |
| 896 | || is_rre (insn64, op_sgr, &r1, &r2)) |
| 897 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); |
| 898 | |
| 899 | /* S r1, d2(x2, b2) -- subtract. */ |
| 900 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ |
| 901 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ |
| 902 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) |
| 903 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) |
| 904 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) |
| 905 | data->gpr[r1] = pv_subtract (data->gpr[r1], |
| 906 | s390_load (data, d2, x2, b2, data->gpr_size)); |
| 907 | |
| 908 | /* LA r1, d2(x2, b2) --- load address. */ |
| 909 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ |
| 910 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) |
| 911 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) |
| 912 | data->gpr[r1] = s390_addr (data, d2, x2, b2); |
| 913 | |
| 914 | /* LARL r1, i2 --- load address relative long. */ |
| 915 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
| 916 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
| 917 | |
| 918 | /* BASR r1, 0 --- branch and save. |
| 919 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
| 920 | else if (is_rr (insn, op_basr, &r1, &r2) |
| 921 | && r2 == 0) |
| 922 | data->gpr[r1] = pv_constant (next_pc); |
| 923 | |
| 924 | /* BRAS r1, i2 --- branch relative and save. */ |
| 925 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
| 926 | { |
| 927 | data->gpr[r1] = pv_constant (next_pc); |
| 928 | next_pc = pc + i2 * 2; |
| 929 | |
| 930 | /* We'd better not interpret any backward branches. We'll |
| 931 | never terminate. */ |
| 932 | if (next_pc <= pc) |
| 933 | break; |
| 934 | } |
| 935 | |
| 936 | /* BRC/BRCL -- branch relative on condition. Ignore "branch |
| 937 | never", branch to following instruction, and "conditional |
| 938 | trap" (BRC +2). Otherwise terminate search. */ |
| 939 | else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)) |
| 940 | { |
| 941 | if (r1 != 0 && i2 != 1 && i2 != 2) |
| 942 | break; |
| 943 | } |
| 944 | else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)) |
| 945 | { |
| 946 | if (r1 != 0 && i2 != 3) |
| 947 | break; |
| 948 | } |
| 949 | |
| 950 | /* Terminate search when hitting any other branch instruction. */ |
| 951 | else if (is_rr (insn, op_basr, &r1, &r2) |
| 952 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) |
| 953 | || is_rr (insn, op_bcr, &r1, &r2) |
| 954 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) |
| 955 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) |
| 956 | break; |
| 957 | |
| 958 | else |
| 959 | { |
| 960 | /* An instruction we don't know how to simulate. The only |
| 961 | safe thing to do would be to set every value we're tracking |
| 962 | to 'unknown'. Instead, we'll be optimistic: we assume that |
| 963 | we *can* interpret every instruction that the compiler uses |
| 964 | to manipulate any of the data we're interested in here -- |
| 965 | then we can just ignore anything else. */ |
| 966 | } |
| 967 | |
| 968 | /* Record the address after the last instruction that changed |
| 969 | the FP, SP, or backlink. Ignore instructions that changed |
| 970 | them back to their original values --- those are probably |
| 971 | restore instructions. (The back chain is never restored, |
| 972 | just popped.) */ |
| 973 | { |
| 974 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
| 975 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
| 976 | |
| 977 | if ((! pv_is_identical (pre_insn_sp, sp) |
| 978 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) |
| 979 | && sp.kind != pvk_unknown) |
| 980 | || (! pv_is_identical (pre_insn_fp, fp) |
| 981 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) |
| 982 | && fp.kind != pvk_unknown) |
| 983 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
| 984 | result = next_pc; |
| 985 | } |
| 986 | } |
| 987 | |
| 988 | /* Record where all the registers were saved. */ |
| 989 | data->stack->scan (s390_check_for_saved, data); |
| 990 | |
| 991 | return result; |
| 992 | } |
| 993 | |
| 994 | /* Advance PC across any function entry prologue instructions to reach |
| 995 | some "real" code. */ |
| 996 | |
| 997 | static CORE_ADDR |
| 998 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 999 | { |
| 1000 | struct s390_prologue_data data; |
| 1001 | CORE_ADDR skip_pc, func_addr; |
| 1002 | |
| 1003 | if (find_pc_partial_function (pc, NULL, &func_addr, NULL)) |
| 1004 | { |
| 1005 | CORE_ADDR post_prologue_pc |
| 1006 | = skip_prologue_using_sal (gdbarch, func_addr); |
| 1007 | if (post_prologue_pc != 0) |
| 1008 | return std::max (pc, post_prologue_pc); |
| 1009 | } |
| 1010 | |
| 1011 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
| 1012 | return skip_pc ? skip_pc : pc; |
| 1013 | } |
| 1014 | |
| 1015 | /* Register handling. */ |
| 1016 | |
| 1017 | /* ABI call-saved register information. */ |
| 1018 | |
| 1019 | static int |
| 1020 | s390_register_call_saved (struct gdbarch *gdbarch, int regnum) |
| 1021 | { |
| 1022 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1023 | |
| 1024 | switch (tdep->abi) |
| 1025 | { |
| 1026 | case ABI_LINUX_S390: |
| 1027 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) |
| 1028 | || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM |
| 1029 | || regnum == S390_A0_REGNUM) |
| 1030 | return 1; |
| 1031 | |
| 1032 | break; |
| 1033 | |
| 1034 | case ABI_LINUX_ZSERIES: |
| 1035 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) |
| 1036 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) |
| 1037 | || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) |
| 1038 | return 1; |
| 1039 | |
| 1040 | break; |
| 1041 | } |
| 1042 | |
| 1043 | return 0; |
| 1044 | } |
| 1045 | |
| 1046 | /* The "guess_tracepoint_registers" gdbarch method. */ |
| 1047 | |
| 1048 | static void |
| 1049 | s390_guess_tracepoint_registers (struct gdbarch *gdbarch, |
| 1050 | struct regcache *regcache, |
| 1051 | CORE_ADDR addr) |
| 1052 | { |
| 1053 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1054 | int sz = register_size (gdbarch, S390_PSWA_REGNUM); |
| 1055 | gdb_byte *reg = (gdb_byte *) alloca (sz); |
| 1056 | ULONGEST pswm, pswa; |
| 1057 | |
| 1058 | /* Set PSWA from the location and a default PSWM (the only part we're |
| 1059 | unlikely to get right is the CC). */ |
| 1060 | if (tdep->abi == ABI_LINUX_S390) |
| 1061 | { |
| 1062 | /* 31-bit PSWA needs high bit set (it's very unlikely the target |
| 1063 | was in 24-bit mode). */ |
| 1064 | pswa = addr | 0x80000000UL; |
| 1065 | pswm = 0x070d0000UL; |
| 1066 | } |
| 1067 | else |
| 1068 | { |
| 1069 | pswa = addr; |
| 1070 | pswm = 0x0705000180000000ULL; |
| 1071 | } |
| 1072 | |
| 1073 | store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa); |
| 1074 | regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg); |
| 1075 | |
| 1076 | store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm); |
| 1077 | regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg); |
| 1078 | } |
| 1079 | |
| 1080 | /* Return the name of register REGNO. Return the empty string for |
| 1081 | registers that shouldn't be visible. */ |
| 1082 | |
| 1083 | static const char * |
| 1084 | s390_register_name (struct gdbarch *gdbarch, int regnum) |
| 1085 | { |
| 1086 | if (regnum >= S390_V0_LOWER_REGNUM |
| 1087 | && regnum <= S390_V15_LOWER_REGNUM) |
| 1088 | return ""; |
| 1089 | return tdesc_register_name (gdbarch, regnum); |
| 1090 | } |
| 1091 | |
| 1092 | /* DWARF Register Mapping. */ |
| 1093 | |
| 1094 | static const short s390_dwarf_regmap[] = |
| 1095 | { |
| 1096 | /* 0-15: General Purpose Registers. */ |
| 1097 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, |
| 1098 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, |
| 1099 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, |
| 1100 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, |
| 1101 | |
| 1102 | /* 16-31: Floating Point Registers / Vector Registers 0-15. */ |
| 1103 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, |
| 1104 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, |
| 1105 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, |
| 1106 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, |
| 1107 | |
| 1108 | /* 32-47: Control Registers (not mapped). */ |
| 1109 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 1110 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 1111 | |
| 1112 | /* 48-63: Access Registers. */ |
| 1113 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, |
| 1114 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, |
| 1115 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, |
| 1116 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, |
| 1117 | |
| 1118 | /* 64-65: Program Status Word. */ |
| 1119 | S390_PSWM_REGNUM, |
| 1120 | S390_PSWA_REGNUM, |
| 1121 | |
| 1122 | /* 66-67: Reserved. */ |
| 1123 | -1, -1, |
| 1124 | |
| 1125 | /* 68-83: Vector Registers 16-31. */ |
| 1126 | S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM, |
| 1127 | S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM, |
| 1128 | S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM, |
| 1129 | S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM, |
| 1130 | |
| 1131 | /* End of "official" DWARF registers. The remainder of the map is |
| 1132 | for GDB internal use only. */ |
| 1133 | |
| 1134 | /* GPR Lower Half Access. */ |
| 1135 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, |
| 1136 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, |
| 1137 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, |
| 1138 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, |
| 1139 | }; |
| 1140 | |
| 1141 | enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 }; |
| 1142 | |
| 1143 | /* Convert DWARF register number REG to the appropriate register |
| 1144 | number used by GDB. */ |
| 1145 | |
| 1146 | static int |
| 1147 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
| 1148 | { |
| 1149 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1150 | int gdb_reg = -1; |
| 1151 | |
| 1152 | /* In a 32-on-64 debug scenario, debug info refers to the full |
| 1153 | 64-bit GPRs. Note that call frame information still refers to |
| 1154 | the 32-bit lower halves, because s390_adjust_frame_regnum uses |
| 1155 | special register numbers to access GPRs. */ |
| 1156 | if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) |
| 1157 | return tdep->gpr_full_regnum + reg; |
| 1158 | |
| 1159 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
| 1160 | gdb_reg = s390_dwarf_regmap[reg]; |
| 1161 | |
| 1162 | if (tdep->v0_full_regnum == -1) |
| 1163 | { |
| 1164 | if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM) |
| 1165 | gdb_reg = -1; |
| 1166 | } |
| 1167 | else |
| 1168 | { |
| 1169 | if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM) |
| 1170 | gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum; |
| 1171 | } |
| 1172 | |
| 1173 | return gdb_reg; |
| 1174 | } |
| 1175 | |
| 1176 | /* Pseudo registers. */ |
| 1177 | |
| 1178 | /* Check whether REGNUM indicates a coupled general purpose register. |
| 1179 | These pseudo-registers are composed of two adjacent gprs. */ |
| 1180 | |
| 1181 | static int |
| 1182 | regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum) |
| 1183 | { |
| 1184 | return (tdep->gpr_full_regnum != -1 |
| 1185 | && regnum >= tdep->gpr_full_regnum |
| 1186 | && regnum <= tdep->gpr_full_regnum + 15); |
| 1187 | } |
| 1188 | |
| 1189 | /* Check whether REGNUM indicates a full vector register (v0-v15). |
| 1190 | These pseudo-registers are composed of f0-f15 and v0l-v15l. */ |
| 1191 | |
| 1192 | static int |
| 1193 | regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum) |
| 1194 | { |
| 1195 | return (tdep->v0_full_regnum != -1 |
| 1196 | && regnum >= tdep->v0_full_regnum |
| 1197 | && regnum <= tdep->v0_full_regnum + 15); |
| 1198 | } |
| 1199 | |
| 1200 | /* 'float' values are stored in the upper half of floating-point |
| 1201 | registers, even though we are otherwise a big-endian platform. The |
| 1202 | same applies to a 'float' value within a vector. */ |
| 1203 | |
| 1204 | static struct value * |
| 1205 | s390_value_from_register (struct gdbarch *gdbarch, struct type *type, |
| 1206 | int regnum, struct frame_id frame_id) |
| 1207 | { |
| 1208 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1209 | struct value *value = default_value_from_register (gdbarch, type, |
| 1210 | regnum, frame_id); |
| 1211 | check_typedef (type); |
| 1212 | |
| 1213 | if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM |
| 1214 | && TYPE_LENGTH (type) < 8) |
| 1215 | || regnum_is_vxr_full (tdep, regnum) |
| 1216 | || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM)) |
| 1217 | set_value_offset (value, 0); |
| 1218 | |
| 1219 | return value; |
| 1220 | } |
| 1221 | |
| 1222 | /* Implement pseudo_register_name tdesc method. */ |
| 1223 | |
| 1224 | static const char * |
| 1225 | s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) |
| 1226 | { |
| 1227 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1228 | |
| 1229 | if (regnum == tdep->pc_regnum) |
| 1230 | return "pc"; |
| 1231 | |
| 1232 | if (regnum == tdep->cc_regnum) |
| 1233 | return "cc"; |
| 1234 | |
| 1235 | if (regnum_is_gpr_full (tdep, regnum)) |
| 1236 | { |
| 1237 | static const char *full_name[] = { |
| 1238 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 1239 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" |
| 1240 | }; |
| 1241 | return full_name[regnum - tdep->gpr_full_regnum]; |
| 1242 | } |
| 1243 | |
| 1244 | if (regnum_is_vxr_full (tdep, regnum)) |
| 1245 | { |
| 1246 | static const char *full_name[] = { |
| 1247 | "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", |
| 1248 | "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15" |
| 1249 | }; |
| 1250 | return full_name[regnum - tdep->v0_full_regnum]; |
| 1251 | } |
| 1252 | |
| 1253 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
| 1254 | } |
| 1255 | |
| 1256 | /* Implement pseudo_register_type tdesc method. */ |
| 1257 | |
| 1258 | static struct type * |
| 1259 | s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) |
| 1260 | { |
| 1261 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1262 | |
| 1263 | if (regnum == tdep->pc_regnum) |
| 1264 | return builtin_type (gdbarch)->builtin_func_ptr; |
| 1265 | |
| 1266 | if (regnum == tdep->cc_regnum) |
| 1267 | return builtin_type (gdbarch)->builtin_int; |
| 1268 | |
| 1269 | if (regnum_is_gpr_full (tdep, regnum)) |
| 1270 | return builtin_type (gdbarch)->builtin_uint64; |
| 1271 | |
| 1272 | if (regnum_is_vxr_full (tdep, regnum)) |
| 1273 | return tdesc_find_type (gdbarch, "vec128"); |
| 1274 | |
| 1275 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
| 1276 | } |
| 1277 | |
| 1278 | /* Implement pseudo_register_read gdbarch method. */ |
| 1279 | |
| 1280 | static enum register_status |
| 1281 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
| 1282 | int regnum, gdb_byte *buf) |
| 1283 | { |
| 1284 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1285 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1286 | int regsize = register_size (gdbarch, regnum); |
| 1287 | ULONGEST val; |
| 1288 | |
| 1289 | if (regnum == tdep->pc_regnum) |
| 1290 | { |
| 1291 | enum register_status status; |
| 1292 | |
| 1293 | status = regcache->raw_read (S390_PSWA_REGNUM, &val); |
| 1294 | if (status == REG_VALID) |
| 1295 | { |
| 1296 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 1297 | val &= 0x7fffffff; |
| 1298 | store_unsigned_integer (buf, regsize, byte_order, val); |
| 1299 | } |
| 1300 | return status; |
| 1301 | } |
| 1302 | |
| 1303 | if (regnum == tdep->cc_regnum) |
| 1304 | { |
| 1305 | enum register_status status; |
| 1306 | |
| 1307 | status = regcache->raw_read (S390_PSWM_REGNUM, &val); |
| 1308 | if (status == REG_VALID) |
| 1309 | { |
| 1310 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 1311 | val = (val >> 12) & 3; |
| 1312 | else |
| 1313 | val = (val >> 44) & 3; |
| 1314 | store_unsigned_integer (buf, regsize, byte_order, val); |
| 1315 | } |
| 1316 | return status; |
| 1317 | } |
| 1318 | |
| 1319 | if (regnum_is_gpr_full (tdep, regnum)) |
| 1320 | { |
| 1321 | enum register_status status; |
| 1322 | ULONGEST val_upper; |
| 1323 | |
| 1324 | regnum -= tdep->gpr_full_regnum; |
| 1325 | |
| 1326 | status = regcache->raw_read (S390_R0_REGNUM + regnum, &val); |
| 1327 | if (status == REG_VALID) |
| 1328 | status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum, |
| 1329 | &val_upper); |
| 1330 | if (status == REG_VALID) |
| 1331 | { |
| 1332 | val |= val_upper << 32; |
| 1333 | store_unsigned_integer (buf, regsize, byte_order, val); |
| 1334 | } |
| 1335 | return status; |
| 1336 | } |
| 1337 | |
| 1338 | if (regnum_is_vxr_full (tdep, regnum)) |
| 1339 | { |
| 1340 | enum register_status status; |
| 1341 | |
| 1342 | regnum -= tdep->v0_full_regnum; |
| 1343 | |
| 1344 | status = regcache->raw_read (S390_F0_REGNUM + regnum, buf); |
| 1345 | if (status == REG_VALID) |
| 1346 | status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8); |
| 1347 | return status; |
| 1348 | } |
| 1349 | |
| 1350 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
| 1351 | } |
| 1352 | |
| 1353 | /* Implement pseudo_register_write gdbarch method. */ |
| 1354 | |
| 1355 | static void |
| 1356 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
| 1357 | int regnum, const gdb_byte *buf) |
| 1358 | { |
| 1359 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1360 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1361 | int regsize = register_size (gdbarch, regnum); |
| 1362 | ULONGEST val, psw; |
| 1363 | |
| 1364 | if (regnum == tdep->pc_regnum) |
| 1365 | { |
| 1366 | val = extract_unsigned_integer (buf, regsize, byte_order); |
| 1367 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 1368 | { |
| 1369 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); |
| 1370 | val = (psw & 0x80000000) | (val & 0x7fffffff); |
| 1371 | } |
| 1372 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); |
| 1373 | return; |
| 1374 | } |
| 1375 | |
| 1376 | if (regnum == tdep->cc_regnum) |
| 1377 | { |
| 1378 | val = extract_unsigned_integer (buf, regsize, byte_order); |
| 1379 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
| 1380 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 1381 | val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); |
| 1382 | else |
| 1383 | val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); |
| 1384 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); |
| 1385 | return; |
| 1386 | } |
| 1387 | |
| 1388 | if (regnum_is_gpr_full (tdep, regnum)) |
| 1389 | { |
| 1390 | regnum -= tdep->gpr_full_regnum; |
| 1391 | val = extract_unsigned_integer (buf, regsize, byte_order); |
| 1392 | regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, |
| 1393 | val & 0xffffffff); |
| 1394 | regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, |
| 1395 | val >> 32); |
| 1396 | return; |
| 1397 | } |
| 1398 | |
| 1399 | if (regnum_is_vxr_full (tdep, regnum)) |
| 1400 | { |
| 1401 | regnum -= tdep->v0_full_regnum; |
| 1402 | regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf); |
| 1403 | regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8); |
| 1404 | return; |
| 1405 | } |
| 1406 | |
| 1407 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
| 1408 | } |
| 1409 | |
| 1410 | /* Register groups. */ |
| 1411 | |
| 1412 | /* Implement pseudo_register_reggroup_p tdesc method. */ |
| 1413 | |
| 1414 | static int |
| 1415 | s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
| 1416 | struct reggroup *group) |
| 1417 | { |
| 1418 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1419 | |
| 1420 | /* We usually save/restore the whole PSW, which includes PC and CC. |
| 1421 | However, some older gdbservers may not support saving/restoring |
| 1422 | the whole PSW yet, and will return an XML register description |
| 1423 | excluding those from the save/restore register groups. In those |
| 1424 | cases, we still need to explicitly save/restore PC and CC in order |
| 1425 | to push or pop frames. Since this doesn't hurt anything if we |
| 1426 | already save/restore the whole PSW (it's just redundant), we add |
| 1427 | PC and CC at this point unconditionally. */ |
| 1428 | if (group == save_reggroup || group == restore_reggroup) |
| 1429 | return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; |
| 1430 | |
| 1431 | if (group == vector_reggroup) |
| 1432 | return regnum_is_vxr_full (tdep, regnum); |
| 1433 | |
| 1434 | if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum)) |
| 1435 | return 0; |
| 1436 | |
| 1437 | return default_register_reggroup_p (gdbarch, regnum, group); |
| 1438 | } |
| 1439 | |
| 1440 | /* The "ax_pseudo_register_collect" gdbarch method. */ |
| 1441 | |
| 1442 | static int |
| 1443 | s390_ax_pseudo_register_collect (struct gdbarch *gdbarch, |
| 1444 | struct agent_expr *ax, int regnum) |
| 1445 | { |
| 1446 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1447 | if (regnum == tdep->pc_regnum) |
| 1448 | { |
| 1449 | ax_reg_mask (ax, S390_PSWA_REGNUM); |
| 1450 | } |
| 1451 | else if (regnum == tdep->cc_regnum) |
| 1452 | { |
| 1453 | ax_reg_mask (ax, S390_PSWM_REGNUM); |
| 1454 | } |
| 1455 | else if (regnum_is_gpr_full (tdep, regnum)) |
| 1456 | { |
| 1457 | regnum -= tdep->gpr_full_regnum; |
| 1458 | ax_reg_mask (ax, S390_R0_REGNUM + regnum); |
| 1459 | ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum); |
| 1460 | } |
| 1461 | else if (regnum_is_vxr_full (tdep, regnum)) |
| 1462 | { |
| 1463 | regnum -= tdep->v0_full_regnum; |
| 1464 | ax_reg_mask (ax, S390_F0_REGNUM + regnum); |
| 1465 | ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum); |
| 1466 | } |
| 1467 | else |
| 1468 | { |
| 1469 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
| 1470 | } |
| 1471 | return 0; |
| 1472 | } |
| 1473 | |
| 1474 | /* The "ax_pseudo_register_push_stack" gdbarch method. */ |
| 1475 | |
| 1476 | static int |
| 1477 | s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch, |
| 1478 | struct agent_expr *ax, int regnum) |
| 1479 | { |
| 1480 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1481 | if (regnum == tdep->pc_regnum) |
| 1482 | { |
| 1483 | ax_reg (ax, S390_PSWA_REGNUM); |
| 1484 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 1485 | { |
| 1486 | ax_zero_ext (ax, 31); |
| 1487 | } |
| 1488 | } |
| 1489 | else if (regnum == tdep->cc_regnum) |
| 1490 | { |
| 1491 | ax_reg (ax, S390_PSWM_REGNUM); |
| 1492 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
| 1493 | ax_const_l (ax, 12); |
| 1494 | else |
| 1495 | ax_const_l (ax, 44); |
| 1496 | ax_simple (ax, aop_rsh_unsigned); |
| 1497 | ax_zero_ext (ax, 2); |
| 1498 | } |
| 1499 | else if (regnum_is_gpr_full (tdep, regnum)) |
| 1500 | { |
| 1501 | regnum -= tdep->gpr_full_regnum; |
| 1502 | ax_reg (ax, S390_R0_REGNUM + regnum); |
| 1503 | ax_reg (ax, S390_R0_UPPER_REGNUM + regnum); |
| 1504 | ax_const_l (ax, 32); |
| 1505 | ax_simple (ax, aop_lsh); |
| 1506 | ax_simple (ax, aop_bit_or); |
| 1507 | } |
| 1508 | else if (regnum_is_vxr_full (tdep, regnum)) |
| 1509 | { |
| 1510 | /* Too large to stuff on the stack. */ |
| 1511 | return 1; |
| 1512 | } |
| 1513 | else |
| 1514 | { |
| 1515 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
| 1516 | } |
| 1517 | return 0; |
| 1518 | } |
| 1519 | |
| 1520 | /* The "gen_return_address" gdbarch method. Since this is supposed to be |
| 1521 | just a best-effort method, and we don't really have the means to run |
| 1522 | the full unwinder here, just collect the link register. */ |
| 1523 | |
| 1524 | static void |
| 1525 | s390_gen_return_address (struct gdbarch *gdbarch, |
| 1526 | struct agent_expr *ax, struct axs_value *value, |
| 1527 | CORE_ADDR scope) |
| 1528 | { |
| 1529 | value->type = register_type (gdbarch, S390_R14_REGNUM); |
| 1530 | value->kind = axs_lvalue_register; |
| 1531 | value->u.reg = S390_R14_REGNUM; |
| 1532 | } |
| 1533 | |
| 1534 | /* Address handling. */ |
| 1535 | |
| 1536 | /* Implement addr_bits_remove gdbarch method. |
| 1537 | Only used for ABI_LINUX_S390. */ |
| 1538 | |
| 1539 | static CORE_ADDR |
| 1540 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
| 1541 | { |
| 1542 | return addr & 0x7fffffff; |
| 1543 | } |
| 1544 | |
| 1545 | /* Implement addr_class_type_flags gdbarch method. |
| 1546 | Only used for ABI_LINUX_ZSERIES. */ |
| 1547 | |
| 1548 | static int |
| 1549 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) |
| 1550 | { |
| 1551 | if (byte_size == 4) |
| 1552 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
| 1553 | else |
| 1554 | return 0; |
| 1555 | } |
| 1556 | |
| 1557 | /* Implement addr_class_type_flags_to_name gdbarch method. |
| 1558 | Only used for ABI_LINUX_ZSERIES. */ |
| 1559 | |
| 1560 | static const char * |
| 1561 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) |
| 1562 | { |
| 1563 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
| 1564 | return "mode32"; |
| 1565 | else |
| 1566 | return NULL; |
| 1567 | } |
| 1568 | |
| 1569 | /* Implement addr_class_name_to_type_flags gdbarch method. |
| 1570 | Only used for ABI_LINUX_ZSERIES. */ |
| 1571 | |
| 1572 | static int |
| 1573 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
| 1574 | const char *name, |
| 1575 | int *type_flags_ptr) |
| 1576 | { |
| 1577 | if (strcmp (name, "mode32") == 0) |
| 1578 | { |
| 1579 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
| 1580 | return 1; |
| 1581 | } |
| 1582 | else |
| 1583 | return 0; |
| 1584 | } |
| 1585 | |
| 1586 | /* Inferior function calls. */ |
| 1587 | |
| 1588 | /* Dummy function calls. */ |
| 1589 | |
| 1590 | /* Unwrap any single-field structs in TYPE and return the effective |
| 1591 | "inner" type. E.g., yield "float" for all these cases: |
| 1592 | |
| 1593 | float x; |
| 1594 | struct { float x }; |
| 1595 | struct { struct { float x; } x; }; |
| 1596 | struct { struct { struct { float x; } x; } x; }; |
| 1597 | |
| 1598 | However, if an inner type is smaller than MIN_SIZE, abort the |
| 1599 | unwrapping. */ |
| 1600 | |
| 1601 | static struct type * |
| 1602 | s390_effective_inner_type (struct type *type, unsigned int min_size) |
| 1603 | { |
| 1604 | while (TYPE_CODE (type) == TYPE_CODE_STRUCT |
| 1605 | && TYPE_NFIELDS (type) == 1) |
| 1606 | { |
| 1607 | struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0)); |
| 1608 | |
| 1609 | if (TYPE_LENGTH (inner) < min_size) |
| 1610 | break; |
| 1611 | type = inner; |
| 1612 | } |
| 1613 | |
| 1614 | return type; |
| 1615 | } |
| 1616 | |
| 1617 | /* Return non-zero if TYPE should be passed like "float" or |
| 1618 | "double". */ |
| 1619 | |
| 1620 | static int |
| 1621 | s390_function_arg_float (struct type *type) |
| 1622 | { |
| 1623 | /* Note that long double as well as complex types are intentionally |
| 1624 | excluded. */ |
| 1625 | if (TYPE_LENGTH (type) > 8) |
| 1626 | return 0; |
| 1627 | |
| 1628 | /* A struct containing just a float or double is passed like a float |
| 1629 | or double. */ |
| 1630 | type = s390_effective_inner_type (type, 0); |
| 1631 | |
| 1632 | return (TYPE_CODE (type) == TYPE_CODE_FLT |
| 1633 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT); |
| 1634 | } |
| 1635 | |
| 1636 | /* Return non-zero if TYPE should be passed like a vector. */ |
| 1637 | |
| 1638 | static int |
| 1639 | s390_function_arg_vector (struct type *type) |
| 1640 | { |
| 1641 | if (TYPE_LENGTH (type) > 16) |
| 1642 | return 0; |
| 1643 | |
| 1644 | /* Structs containing just a vector are passed like a vector. */ |
| 1645 | type = s390_effective_inner_type (type, TYPE_LENGTH (type)); |
| 1646 | |
| 1647 | return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type); |
| 1648 | } |
| 1649 | |
| 1650 | /* Determine whether N is a power of two. */ |
| 1651 | |
| 1652 | static int |
| 1653 | is_power_of_two (unsigned int n) |
| 1654 | { |
| 1655 | return n && ((n & (n - 1)) == 0); |
| 1656 | } |
| 1657 | |
| 1658 | /* For an argument whose type is TYPE and which is not passed like a |
| 1659 | float or vector, return non-zero if it should be passed like "int" |
| 1660 | or "long long". */ |
| 1661 | |
| 1662 | static int |
| 1663 | s390_function_arg_integer (struct type *type) |
| 1664 | { |
| 1665 | enum type_code code = TYPE_CODE (type); |
| 1666 | |
| 1667 | if (TYPE_LENGTH (type) > 8) |
| 1668 | return 0; |
| 1669 | |
| 1670 | if (code == TYPE_CODE_INT |
| 1671 | || code == TYPE_CODE_ENUM |
| 1672 | || code == TYPE_CODE_RANGE |
| 1673 | || code == TYPE_CODE_CHAR |
| 1674 | || code == TYPE_CODE_BOOL |
| 1675 | || code == TYPE_CODE_PTR |
| 1676 | || TYPE_IS_REFERENCE (type)) |
| 1677 | return 1; |
| 1678 | |
| 1679 | return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT) |
| 1680 | && is_power_of_two (TYPE_LENGTH (type))); |
| 1681 | } |
| 1682 | |
| 1683 | /* Argument passing state: Internal data structure passed to helper |
| 1684 | routines of s390_push_dummy_call. */ |
| 1685 | |
| 1686 | struct s390_arg_state |
| 1687 | { |
| 1688 | /* Register cache, or NULL, if we are in "preparation mode". */ |
| 1689 | struct regcache *regcache; |
| 1690 | /* Next available general/floating-point/vector register for |
| 1691 | argument passing. */ |
| 1692 | int gr, fr, vr; |
| 1693 | /* Current pointer to copy area (grows downwards). */ |
| 1694 | CORE_ADDR copy; |
| 1695 | /* Current pointer to parameter area (grows upwards). */ |
| 1696 | CORE_ADDR argp; |
| 1697 | }; |
| 1698 | |
| 1699 | /* Prepare one argument ARG for a dummy call and update the argument |
| 1700 | passing state AS accordingly. If the regcache field in AS is set, |
| 1701 | operate in "write mode" and write ARG into the inferior. Otherwise |
| 1702 | run "preparation mode" and skip all updates to the inferior. */ |
| 1703 | |
| 1704 | static void |
| 1705 | s390_handle_arg (struct s390_arg_state *as, struct value *arg, |
| 1706 | struct gdbarch_tdep *tdep, int word_size, |
| 1707 | enum bfd_endian byte_order, int is_unnamed) |
| 1708 | { |
| 1709 | struct type *type = check_typedef (value_type (arg)); |
| 1710 | unsigned int length = TYPE_LENGTH (type); |
| 1711 | int write_mode = as->regcache != NULL; |
| 1712 | |
| 1713 | if (s390_function_arg_float (type)) |
| 1714 | { |
| 1715 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass |
| 1716 | arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and |
| 1717 | 6. */ |
| 1718 | if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) |
| 1719 | { |
| 1720 | /* When we store a single-precision value in an FP register, |
| 1721 | it occupies the leftmost bits. */ |
| 1722 | if (write_mode) |
| 1723 | regcache_cooked_write_part (as->regcache, |
| 1724 | S390_F0_REGNUM + as->fr, |
| 1725 | 0, length, |
| 1726 | value_contents (arg)); |
| 1727 | as->fr += 2; |
| 1728 | } |
| 1729 | else |
| 1730 | { |
| 1731 | /* When we store a single-precision value in a stack slot, |
| 1732 | it occupies the rightmost bits. */ |
| 1733 | as->argp = align_up (as->argp + length, word_size); |
| 1734 | if (write_mode) |
| 1735 | write_memory (as->argp - length, value_contents (arg), |
| 1736 | length); |
| 1737 | } |
| 1738 | } |
| 1739 | else if (tdep->vector_abi == S390_VECTOR_ABI_128 |
| 1740 | && s390_function_arg_vector (type)) |
| 1741 | { |
| 1742 | static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31}; |
| 1743 | |
| 1744 | if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr)) |
| 1745 | { |
| 1746 | int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24; |
| 1747 | |
| 1748 | if (write_mode) |
| 1749 | regcache_cooked_write_part (as->regcache, regnum, |
| 1750 | 0, length, |
| 1751 | value_contents (arg)); |
| 1752 | as->vr++; |
| 1753 | } |
| 1754 | else |
| 1755 | { |
| 1756 | if (write_mode) |
| 1757 | write_memory (as->argp, value_contents (arg), length); |
| 1758 | as->argp = align_up (as->argp + length, word_size); |
| 1759 | } |
| 1760 | } |
| 1761 | else if (s390_function_arg_integer (type) && length <= word_size) |
| 1762 | { |
| 1763 | /* Initialize it just to avoid a GCC false warning. */ |
| 1764 | ULONGEST val = 0; |
| 1765 | |
| 1766 | if (write_mode) |
| 1767 | { |
| 1768 | /* Place value in least significant bits of the register or |
| 1769 | memory word and sign- or zero-extend to full word size. |
| 1770 | This also applies to a struct or union. */ |
| 1771 | val = TYPE_UNSIGNED (type) |
| 1772 | ? extract_unsigned_integer (value_contents (arg), |
| 1773 | length, byte_order) |
| 1774 | : extract_signed_integer (value_contents (arg), |
| 1775 | length, byte_order); |
| 1776 | } |
| 1777 | |
| 1778 | if (as->gr <= 6) |
| 1779 | { |
| 1780 | if (write_mode) |
| 1781 | regcache_cooked_write_unsigned (as->regcache, |
| 1782 | S390_R0_REGNUM + as->gr, |
| 1783 | val); |
| 1784 | as->gr++; |
| 1785 | } |
| 1786 | else |
| 1787 | { |
| 1788 | if (write_mode) |
| 1789 | write_memory_unsigned_integer (as->argp, word_size, |
| 1790 | byte_order, val); |
| 1791 | as->argp += word_size; |
| 1792 | } |
| 1793 | } |
| 1794 | else if (s390_function_arg_integer (type) && length == 8) |
| 1795 | { |
| 1796 | if (as->gr <= 5) |
| 1797 | { |
| 1798 | if (write_mode) |
| 1799 | { |
| 1800 | regcache_cooked_write (as->regcache, |
| 1801 | S390_R0_REGNUM + as->gr, |
| 1802 | value_contents (arg)); |
| 1803 | regcache_cooked_write (as->regcache, |
| 1804 | S390_R0_REGNUM + as->gr + 1, |
| 1805 | value_contents (arg) + word_size); |
| 1806 | } |
| 1807 | as->gr += 2; |
| 1808 | } |
| 1809 | else |
| 1810 | { |
| 1811 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG |
| 1812 | in it, then don't go back and use it again later. */ |
| 1813 | as->gr = 7; |
| 1814 | |
| 1815 | if (write_mode) |
| 1816 | write_memory (as->argp, value_contents (arg), length); |
| 1817 | as->argp += length; |
| 1818 | } |
| 1819 | } |
| 1820 | else |
| 1821 | { |
| 1822 | /* This argument type is never passed in registers. Place the |
| 1823 | value in the copy area and pass a pointer to it. Use 8-byte |
| 1824 | alignment as a conservative assumption. */ |
| 1825 | as->copy = align_down (as->copy - length, 8); |
| 1826 | if (write_mode) |
| 1827 | write_memory (as->copy, value_contents (arg), length); |
| 1828 | |
| 1829 | if (as->gr <= 6) |
| 1830 | { |
| 1831 | if (write_mode) |
| 1832 | regcache_cooked_write_unsigned (as->regcache, |
| 1833 | S390_R0_REGNUM + as->gr, |
| 1834 | as->copy); |
| 1835 | as->gr++; |
| 1836 | } |
| 1837 | else |
| 1838 | { |
| 1839 | if (write_mode) |
| 1840 | write_memory_unsigned_integer (as->argp, word_size, |
| 1841 | byte_order, as->copy); |
| 1842 | as->argp += word_size; |
| 1843 | } |
| 1844 | } |
| 1845 | } |
| 1846 | |
| 1847 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in |
| 1848 | place to be passed to a function, as specified by the "GNU/Linux |
| 1849 | for S/390 ELF Application Binary Interface Supplement". |
| 1850 | |
| 1851 | SP is the current stack pointer. We must put arguments, links, |
| 1852 | padding, etc. whereever they belong, and return the new stack |
| 1853 | pointer value. |
| 1854 | |
| 1855 | If STRUCT_RETURN is non-zero, then the function we're calling is |
| 1856 | going to return a structure by value; STRUCT_ADDR is the address of |
| 1857 | a block we've allocated for it on the stack. |
| 1858 | |
| 1859 | Our caller has taken care of any type promotions needed to satisfy |
| 1860 | prototypes or the old K&R argument-passing rules. */ |
| 1861 | |
| 1862 | static CORE_ADDR |
| 1863 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
| 1864 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 1865 | int nargs, struct value **args, CORE_ADDR sp, |
| 1866 | int struct_return, CORE_ADDR struct_addr) |
| 1867 | { |
| 1868 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1869 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 1870 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1871 | int i; |
| 1872 | struct s390_arg_state arg_state, arg_prep; |
| 1873 | CORE_ADDR param_area_start, new_sp; |
| 1874 | struct type *ftype = check_typedef (value_type (function)); |
| 1875 | |
| 1876 | if (TYPE_CODE (ftype) == TYPE_CODE_PTR) |
| 1877 | ftype = check_typedef (TYPE_TARGET_TYPE (ftype)); |
| 1878 | |
| 1879 | arg_prep.copy = sp; |
| 1880 | arg_prep.gr = struct_return ? 3 : 2; |
| 1881 | arg_prep.fr = 0; |
| 1882 | arg_prep.vr = 0; |
| 1883 | arg_prep.argp = 0; |
| 1884 | arg_prep.regcache = NULL; |
| 1885 | |
| 1886 | /* Initialize arg_state for "preparation mode". */ |
| 1887 | arg_state = arg_prep; |
| 1888 | |
| 1889 | /* Update arg_state.copy with the start of the reference-to-copy area |
| 1890 | and arg_state.argp with the size of the parameter area. */ |
| 1891 | for (i = 0; i < nargs; i++) |
| 1892 | s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order, |
| 1893 | TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype)); |
| 1894 | |
| 1895 | param_area_start = align_down (arg_state.copy - arg_state.argp, 8); |
| 1896 | |
| 1897 | /* Allocate the standard frame areas: the register save area, the |
| 1898 | word reserved for the compiler, and the back chain pointer. */ |
| 1899 | new_sp = param_area_start - (16 * word_size + 32); |
| 1900 | |
| 1901 | /* Now we have the final stack pointer. Make sure we didn't |
| 1902 | underflow; on 31-bit, this would result in addresses with the |
| 1903 | high bit set, which causes confusion elsewhere. Note that if we |
| 1904 | error out here, stack and registers remain untouched. */ |
| 1905 | if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp) |
| 1906 | error (_("Stack overflow")); |
| 1907 | |
| 1908 | /* Pass the structure return address in general register 2. */ |
| 1909 | if (struct_return) |
| 1910 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr); |
| 1911 | |
| 1912 | /* Initialize arg_state for "write mode". */ |
| 1913 | arg_state = arg_prep; |
| 1914 | arg_state.argp = param_area_start; |
| 1915 | arg_state.regcache = regcache; |
| 1916 | |
| 1917 | /* Write all parameters. */ |
| 1918 | for (i = 0; i < nargs; i++) |
| 1919 | s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order, |
| 1920 | TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype)); |
| 1921 | |
| 1922 | /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */ |
| 1923 | if (word_size == 4) |
| 1924 | { |
| 1925 | ULONGEST pswa; |
| 1926 | regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa); |
| 1927 | bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000); |
| 1928 | } |
| 1929 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); |
| 1930 | |
| 1931 | /* Store updated stack pointer. */ |
| 1932 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp); |
| 1933 | |
| 1934 | /* We need to return the 'stack part' of the frame ID, |
| 1935 | which is actually the top of the register save area. */ |
| 1936 | return param_area_start; |
| 1937 | } |
| 1938 | |
| 1939 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
| 1940 | dummy frame. The frame ID's base needs to match the TOS value |
| 1941 | returned by push_dummy_call, and the PC match the dummy frame's |
| 1942 | breakpoint. */ |
| 1943 | |
| 1944 | static struct frame_id |
| 1945 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
| 1946 | { |
| 1947 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 1948 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
| 1949 | sp = gdbarch_addr_bits_remove (gdbarch, sp); |
| 1950 | |
| 1951 | return frame_id_build (sp + 16*word_size + 32, |
| 1952 | get_frame_pc (this_frame)); |
| 1953 | } |
| 1954 | |
| 1955 | /* Implement frame_align gdbarch method. */ |
| 1956 | |
| 1957 | static CORE_ADDR |
| 1958 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) |
| 1959 | { |
| 1960 | /* Both the 32- and 64-bit ABI's say that the stack pointer should |
| 1961 | always be aligned on an eight-byte boundary. */ |
| 1962 | return (addr & -8); |
| 1963 | } |
| 1964 | |
| 1965 | /* Helper for s390_return_value: Set or retrieve a function return |
| 1966 | value if it resides in a register. */ |
| 1967 | |
| 1968 | static void |
| 1969 | s390_register_return_value (struct gdbarch *gdbarch, struct type *type, |
| 1970 | struct regcache *regcache, |
| 1971 | gdb_byte *out, const gdb_byte *in) |
| 1972 | { |
| 1973 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1974 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 1975 | int length = TYPE_LENGTH (type); |
| 1976 | int code = TYPE_CODE (type); |
| 1977 | |
| 1978 | if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT) |
| 1979 | { |
| 1980 | /* Float-like value: left-aligned in f0. */ |
| 1981 | if (in != NULL) |
| 1982 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, |
| 1983 | 0, length, in); |
| 1984 | else |
| 1985 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, |
| 1986 | 0, length, out); |
| 1987 | } |
| 1988 | else if (code == TYPE_CODE_ARRAY) |
| 1989 | { |
| 1990 | /* Vector: left-aligned in v24. */ |
| 1991 | if (in != NULL) |
| 1992 | regcache_cooked_write_part (regcache, S390_V24_REGNUM, |
| 1993 | 0, length, in); |
| 1994 | else |
| 1995 | regcache_cooked_read_part (regcache, S390_V24_REGNUM, |
| 1996 | 0, length, out); |
| 1997 | } |
| 1998 | else if (length <= word_size) |
| 1999 | { |
| 2000 | /* Integer: zero- or sign-extended in r2. */ |
| 2001 | if (out != NULL) |
| 2002 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, |
| 2003 | word_size - length, length, out); |
| 2004 | else if (TYPE_UNSIGNED (type)) |
| 2005 | regcache_cooked_write_unsigned |
| 2006 | (regcache, S390_R2_REGNUM, |
| 2007 | extract_unsigned_integer (in, length, byte_order)); |
| 2008 | else |
| 2009 | regcache_cooked_write_signed |
| 2010 | (regcache, S390_R2_REGNUM, |
| 2011 | extract_signed_integer (in, length, byte_order)); |
| 2012 | } |
| 2013 | else if (length == 2 * word_size) |
| 2014 | { |
| 2015 | /* Double word: in r2 and r3. */ |
| 2016 | if (in != NULL) |
| 2017 | { |
| 2018 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); |
| 2019 | regcache_cooked_write (regcache, S390_R3_REGNUM, |
| 2020 | in + word_size); |
| 2021 | } |
| 2022 | else |
| 2023 | { |
| 2024 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); |
| 2025 | regcache_cooked_read (regcache, S390_R3_REGNUM, |
| 2026 | out + word_size); |
| 2027 | } |
| 2028 | } |
| 2029 | else |
| 2030 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
| 2031 | } |
| 2032 | |
| 2033 | /* Implement the 'return_value' gdbarch method. */ |
| 2034 | |
| 2035 | static enum return_value_convention |
| 2036 | s390_return_value (struct gdbarch *gdbarch, struct value *function, |
| 2037 | struct type *type, struct regcache *regcache, |
| 2038 | gdb_byte *out, const gdb_byte *in) |
| 2039 | { |
| 2040 | enum return_value_convention rvc; |
| 2041 | |
| 2042 | type = check_typedef (type); |
| 2043 | |
| 2044 | switch (TYPE_CODE (type)) |
| 2045 | { |
| 2046 | case TYPE_CODE_STRUCT: |
| 2047 | case TYPE_CODE_UNION: |
| 2048 | case TYPE_CODE_COMPLEX: |
| 2049 | rvc = RETURN_VALUE_STRUCT_CONVENTION; |
| 2050 | break; |
| 2051 | case TYPE_CODE_ARRAY: |
| 2052 | rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128 |
| 2053 | && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type)) |
| 2054 | ? RETURN_VALUE_REGISTER_CONVENTION |
| 2055 | : RETURN_VALUE_STRUCT_CONVENTION; |
| 2056 | break; |
| 2057 | default: |
| 2058 | rvc = TYPE_LENGTH (type) <= 8 |
| 2059 | ? RETURN_VALUE_REGISTER_CONVENTION |
| 2060 | : RETURN_VALUE_STRUCT_CONVENTION; |
| 2061 | } |
| 2062 | |
| 2063 | if (in != NULL || out != NULL) |
| 2064 | { |
| 2065 | if (rvc == RETURN_VALUE_REGISTER_CONVENTION) |
| 2066 | s390_register_return_value (gdbarch, type, regcache, out, in); |
| 2067 | else if (in != NULL) |
| 2068 | error (_("Cannot set function return value.")); |
| 2069 | else |
| 2070 | error (_("Function return value unknown.")); |
| 2071 | } |
| 2072 | |
| 2073 | return rvc; |
| 2074 | } |
| 2075 | |
| 2076 | /* Frame unwinding. */ |
| 2077 | |
| 2078 | /* Implmement the stack_frame_destroyed_p gdbarch method. */ |
| 2079 | |
| 2080 | static int |
| 2081 | s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 2082 | { |
| 2083 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 2084 | |
| 2085 | /* In frameless functions, there's no frame to destroy and thus |
| 2086 | we don't care about the epilogue. |
| 2087 | |
| 2088 | In functions with frame, the epilogue sequence is a pair of |
| 2089 | a LM-type instruction that restores (amongst others) the |
| 2090 | return register %r14 and the stack pointer %r15, followed |
| 2091 | by a branch 'br %r14' --or equivalent-- that effects the |
| 2092 | actual return. |
| 2093 | |
| 2094 | In that situation, this function needs to return 'true' in |
| 2095 | exactly one case: when pc points to that branch instruction. |
| 2096 | |
| 2097 | Thus we try to disassemble the one instructions immediately |
| 2098 | preceding pc and check whether it is an LM-type instruction |
| 2099 | modifying the stack pointer. |
| 2100 | |
| 2101 | Note that disassembling backwards is not reliable, so there |
| 2102 | is a slight chance of false positives here ... */ |
| 2103 | |
| 2104 | bfd_byte insn[6]; |
| 2105 | unsigned int r1, r3, b2; |
| 2106 | int d2; |
| 2107 | |
| 2108 | if (word_size == 4 |
| 2109 | && !target_read_memory (pc - 4, insn, 4) |
| 2110 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
| 2111 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
| 2112 | return 1; |
| 2113 | |
| 2114 | if (word_size == 4 |
| 2115 | && !target_read_memory (pc - 6, insn, 6) |
| 2116 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
| 2117 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
| 2118 | return 1; |
| 2119 | |
| 2120 | if (word_size == 8 |
| 2121 | && !target_read_memory (pc - 6, insn, 6) |
| 2122 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
| 2123 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
| 2124 | return 1; |
| 2125 | |
| 2126 | return 0; |
| 2127 | } |
| 2128 | |
| 2129 | /* Implement unwind_pc gdbarch method. */ |
| 2130 | |
| 2131 | static CORE_ADDR |
| 2132 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 2133 | { |
| 2134 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 2135 | ULONGEST pc; |
| 2136 | pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); |
| 2137 | return gdbarch_addr_bits_remove (gdbarch, pc); |
| 2138 | } |
| 2139 | |
| 2140 | /* Implement unwind_sp gdbarch method. */ |
| 2141 | |
| 2142 | static CORE_ADDR |
| 2143 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 2144 | { |
| 2145 | ULONGEST sp; |
| 2146 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); |
| 2147 | return gdbarch_addr_bits_remove (gdbarch, sp); |
| 2148 | } |
| 2149 | |
| 2150 | /* Helper routine to unwind pseudo registers. */ |
| 2151 | |
| 2152 | static struct value * |
| 2153 | s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum) |
| 2154 | { |
| 2155 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 2156 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 2157 | struct type *type = register_type (gdbarch, regnum); |
| 2158 | |
| 2159 | /* Unwind PC via PSW address. */ |
| 2160 | if (regnum == tdep->pc_regnum) |
| 2161 | { |
| 2162 | struct value *val; |
| 2163 | |
| 2164 | val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM); |
| 2165 | if (!value_optimized_out (val)) |
| 2166 | { |
| 2167 | LONGEST pswa = value_as_long (val); |
| 2168 | |
| 2169 | if (TYPE_LENGTH (type) == 4) |
| 2170 | return value_from_pointer (type, pswa & 0x7fffffff); |
| 2171 | else |
| 2172 | return value_from_pointer (type, pswa); |
| 2173 | } |
| 2174 | } |
| 2175 | |
| 2176 | /* Unwind CC via PSW mask. */ |
| 2177 | if (regnum == tdep->cc_regnum) |
| 2178 | { |
| 2179 | struct value *val; |
| 2180 | |
| 2181 | val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM); |
| 2182 | if (!value_optimized_out (val)) |
| 2183 | { |
| 2184 | LONGEST pswm = value_as_long (val); |
| 2185 | |
| 2186 | if (TYPE_LENGTH (type) == 4) |
| 2187 | return value_from_longest (type, (pswm >> 12) & 3); |
| 2188 | else |
| 2189 | return value_from_longest (type, (pswm >> 44) & 3); |
| 2190 | } |
| 2191 | } |
| 2192 | |
| 2193 | /* Unwind full GPRs to show at least the lower halves (as the |
| 2194 | upper halves are undefined). */ |
| 2195 | if (regnum_is_gpr_full (tdep, regnum)) |
| 2196 | { |
| 2197 | int reg = regnum - tdep->gpr_full_regnum; |
| 2198 | struct value *val; |
| 2199 | |
| 2200 | val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); |
| 2201 | if (!value_optimized_out (val)) |
| 2202 | return value_cast (type, val); |
| 2203 | } |
| 2204 | |
| 2205 | return allocate_optimized_out_value (type); |
| 2206 | } |
| 2207 | |
| 2208 | /* Translate a .eh_frame register to DWARF register, or adjust a |
| 2209 | .debug_frame register. */ |
| 2210 | |
| 2211 | static int |
| 2212 | s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) |
| 2213 | { |
| 2214 | /* See s390_dwarf_reg_to_regnum for comments. */ |
| 2215 | return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num; |
| 2216 | } |
| 2217 | |
| 2218 | /* DWARF-2 frame unwinding. */ |
| 2219 | |
| 2220 | /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by |
| 2221 | s390_dwarf2_frame_init_reg. */ |
| 2222 | |
| 2223 | static struct value * |
| 2224 | s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, |
| 2225 | int regnum) |
| 2226 | { |
| 2227 | return s390_unwind_pseudo_register (this_frame, regnum); |
| 2228 | } |
| 2229 | |
| 2230 | /* Implement init_reg dwarf2_frame method. */ |
| 2231 | |
| 2232 | static void |
| 2233 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, |
| 2234 | struct dwarf2_frame_state_reg *reg, |
| 2235 | struct frame_info *this_frame) |
| 2236 | { |
| 2237 | /* The condition code (and thus PSW mask) is call-clobbered. */ |
| 2238 | if (regnum == S390_PSWM_REGNUM) |
| 2239 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
| 2240 | |
| 2241 | /* The PSW address unwinds to the return address. */ |
| 2242 | else if (regnum == S390_PSWA_REGNUM) |
| 2243 | reg->how = DWARF2_FRAME_REG_RA; |
| 2244 | |
| 2245 | /* Fixed registers are call-saved or call-clobbered |
| 2246 | depending on the ABI in use. */ |
| 2247 | else if (regnum < S390_NUM_REGS) |
| 2248 | { |
| 2249 | if (s390_register_call_saved (gdbarch, regnum)) |
| 2250 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; |
| 2251 | else |
| 2252 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
| 2253 | } |
| 2254 | |
| 2255 | /* We install a special function to unwind pseudos. */ |
| 2256 | else |
| 2257 | { |
| 2258 | reg->how = DWARF2_FRAME_REG_FN; |
| 2259 | reg->loc.fn = s390_dwarf2_prev_register; |
| 2260 | } |
| 2261 | } |
| 2262 | |
| 2263 | /* Frame unwinding. */ |
| 2264 | |
| 2265 | /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo |
| 2266 | register translation. */ |
| 2267 | |
| 2268 | struct value * |
| 2269 | s390_trad_frame_prev_register (struct frame_info *this_frame, |
| 2270 | struct trad_frame_saved_reg saved_regs[], |
| 2271 | int regnum) |
| 2272 | { |
| 2273 | if (regnum < S390_NUM_REGS) |
| 2274 | return trad_frame_get_prev_register (this_frame, saved_regs, regnum); |
| 2275 | else |
| 2276 | return s390_unwind_pseudo_register (this_frame, regnum); |
| 2277 | } |
| 2278 | |
| 2279 | /* Normal stack frames. */ |
| 2280 | |
| 2281 | struct s390_unwind_cache { |
| 2282 | |
| 2283 | CORE_ADDR func; |
| 2284 | CORE_ADDR frame_base; |
| 2285 | CORE_ADDR local_base; |
| 2286 | |
| 2287 | struct trad_frame_saved_reg *saved_regs; |
| 2288 | }; |
| 2289 | |
| 2290 | /* Unwind THIS_FRAME and write the information into unwind cache INFO using |
| 2291 | prologue analysis. Helper for s390_frame_unwind_cache. */ |
| 2292 | |
| 2293 | static int |
| 2294 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
| 2295 | struct s390_unwind_cache *info) |
| 2296 | { |
| 2297 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 2298 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 2299 | struct s390_prologue_data data; |
| 2300 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
| 2301 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
| 2302 | int i; |
| 2303 | CORE_ADDR cfa; |
| 2304 | CORE_ADDR func; |
| 2305 | CORE_ADDR result; |
| 2306 | ULONGEST reg; |
| 2307 | CORE_ADDR prev_sp; |
| 2308 | int frame_pointer; |
| 2309 | int size; |
| 2310 | struct frame_info *next_frame; |
| 2311 | |
| 2312 | /* Try to find the function start address. If we can't find it, we don't |
| 2313 | bother searching for it -- with modern compilers this would be mostly |
| 2314 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data |
| 2315 | or else a valid backchain ... */ |
| 2316 | if (!get_frame_func_if_available (this_frame, &info->func)) |
| 2317 | { |
| 2318 | info->func = -1; |
| 2319 | return 0; |
| 2320 | } |
| 2321 | func = info->func; |
| 2322 | |
| 2323 | /* Try to analyze the prologue. */ |
| 2324 | result = s390_analyze_prologue (gdbarch, func, |
| 2325 | get_frame_pc (this_frame), &data); |
| 2326 | if (!result) |
| 2327 | return 0; |
| 2328 | |
| 2329 | /* If this was successful, we should have found the instruction that |
| 2330 | sets the stack pointer register to the previous value of the stack |
| 2331 | pointer minus the frame size. */ |
| 2332 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
| 2333 | return 0; |
| 2334 | |
| 2335 | /* A frame size of zero at this point can mean either a real |
| 2336 | frameless function, or else a failure to find the prologue. |
| 2337 | Perform some sanity checks to verify we really have a |
| 2338 | frameless function. */ |
| 2339 | if (sp->k == 0) |
| 2340 | { |
| 2341 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
| 2342 | size zero. This is only possible if the next frame is a sentinel |
| 2343 | frame, a dummy frame, or a signal trampoline frame. */ |
| 2344 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
| 2345 | needed, instead the code should simpliy rely on its |
| 2346 | analysis. */ |
| 2347 | next_frame = get_next_frame (this_frame); |
| 2348 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) |
| 2349 | next_frame = get_next_frame (next_frame); |
| 2350 | if (next_frame |
| 2351 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
| 2352 | return 0; |
| 2353 | |
| 2354 | /* If we really have a frameless function, %r14 must be valid |
| 2355 | -- in particular, it must point to a different function. */ |
| 2356 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
| 2357 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
| 2358 | if (get_pc_function_start (reg) == func) |
| 2359 | { |
| 2360 | /* However, there is one case where it *is* valid for %r14 |
| 2361 | to point to the same function -- if this is a recursive |
| 2362 | call, and we have stopped in the prologue *before* the |
| 2363 | stack frame was allocated. |
| 2364 | |
| 2365 | Recognize this case by looking ahead a bit ... */ |
| 2366 | |
| 2367 | struct s390_prologue_data data2; |
| 2368 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
| 2369 | |
| 2370 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) |
| 2371 | && pv_is_register (*sp, S390_SP_REGNUM) |
| 2372 | && sp->k != 0)) |
| 2373 | return 0; |
| 2374 | } |
| 2375 | } |
| 2376 | |
| 2377 | /* OK, we've found valid prologue data. */ |
| 2378 | size = -sp->k; |
| 2379 | |
| 2380 | /* If the frame pointer originally also holds the same value |
| 2381 | as the stack pointer, we're probably using it. If it holds |
| 2382 | some other value -- even a constant offset -- it is most |
| 2383 | likely used as temp register. */ |
| 2384 | if (pv_is_identical (*sp, *fp)) |
| 2385 | frame_pointer = S390_FRAME_REGNUM; |
| 2386 | else |
| 2387 | frame_pointer = S390_SP_REGNUM; |
| 2388 | |
| 2389 | /* If we've detected a function with stack frame, we'll still have to |
| 2390 | treat it as frameless if we're currently within the function epilog |
| 2391 | code at a point where the frame pointer has already been restored. |
| 2392 | This can only happen in an innermost frame. */ |
| 2393 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
| 2394 | instead the code should simpliy rely on its analysis. */ |
| 2395 | next_frame = get_next_frame (this_frame); |
| 2396 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) |
| 2397 | next_frame = get_next_frame (next_frame); |
| 2398 | if (size > 0 |
| 2399 | && (next_frame == NULL |
| 2400 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
| 2401 | { |
| 2402 | /* See the comment in s390_stack_frame_destroyed_p on why this is |
| 2403 | not completely reliable ... */ |
| 2404 | if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame))) |
| 2405 | { |
| 2406 | memset (&data, 0, sizeof (data)); |
| 2407 | size = 0; |
| 2408 | frame_pointer = S390_SP_REGNUM; |
| 2409 | } |
| 2410 | } |
| 2411 | |
| 2412 | /* Once we know the frame register and the frame size, we can unwind |
| 2413 | the current value of the frame register from the next frame, and |
| 2414 | add back the frame size to arrive that the previous frame's |
| 2415 | stack pointer value. */ |
| 2416 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
| 2417 | cfa = prev_sp + 16*word_size + 32; |
| 2418 | |
| 2419 | /* Set up ABI call-saved/call-clobbered registers. */ |
| 2420 | for (i = 0; i < S390_NUM_REGS; i++) |
| 2421 | if (!s390_register_call_saved (gdbarch, i)) |
| 2422 | trad_frame_set_unknown (info->saved_regs, i); |
| 2423 | |
| 2424 | /* CC is always call-clobbered. */ |
| 2425 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
| 2426 | |
| 2427 | /* Record the addresses of all register spill slots the prologue parser |
| 2428 | has recognized. Consider only registers defined as call-saved by the |
| 2429 | ABI; for call-clobbered registers the parser may have recognized |
| 2430 | spurious stores. */ |
| 2431 | |
| 2432 | for (i = 0; i < 16; i++) |
| 2433 | if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) |
| 2434 | && data.gpr_slot[i] != 0) |
| 2435 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; |
| 2436 | |
| 2437 | for (i = 0; i < 16; i++) |
| 2438 | if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) |
| 2439 | && data.fpr_slot[i] != 0) |
| 2440 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; |
| 2441 | |
| 2442 | /* Function return will set PC to %r14. */ |
| 2443 | info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; |
| 2444 | |
| 2445 | /* In frameless functions, we unwind simply by moving the return |
| 2446 | address to the PC. However, if we actually stored to the |
| 2447 | save area, use that -- we might only think the function frameless |
| 2448 | because we're in the middle of the prologue ... */ |
| 2449 | if (size == 0 |
| 2450 | && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
| 2451 | { |
| 2452 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
| 2453 | } |
| 2454 | |
| 2455 | /* Another sanity check: unless this is a frameless function, |
| 2456 | we should have found spill slots for SP and PC. |
| 2457 | If not, we cannot unwind further -- this happens e.g. in |
| 2458 | libc's thread_start routine. */ |
| 2459 | if (size > 0) |
| 2460 | { |
| 2461 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
| 2462 | || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
| 2463 | prev_sp = -1; |
| 2464 | } |
| 2465 | |
| 2466 | /* We use the current value of the frame register as local_base, |
| 2467 | and the top of the register save area as frame_base. */ |
| 2468 | if (prev_sp != -1) |
| 2469 | { |
| 2470 | info->frame_base = prev_sp + 16*word_size + 32; |
| 2471 | info->local_base = prev_sp - size; |
| 2472 | } |
| 2473 | |
| 2474 | return 1; |
| 2475 | } |
| 2476 | |
| 2477 | /* Unwind THIS_FRAME and write the information into unwind cache INFO using |
| 2478 | back chain unwinding. Helper for s390_frame_unwind_cache. */ |
| 2479 | |
| 2480 | static void |
| 2481 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
| 2482 | struct s390_unwind_cache *info) |
| 2483 | { |
| 2484 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 2485 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 2486 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 2487 | CORE_ADDR backchain; |
| 2488 | ULONGEST reg; |
| 2489 | LONGEST sp, tmp; |
| 2490 | int i; |
| 2491 | |
| 2492 | /* Set up ABI call-saved/call-clobbered registers. */ |
| 2493 | for (i = 0; i < S390_NUM_REGS; i++) |
| 2494 | if (!s390_register_call_saved (gdbarch, i)) |
| 2495 | trad_frame_set_unknown (info->saved_regs, i); |
| 2496 | |
| 2497 | /* CC is always call-clobbered. */ |
| 2498 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
| 2499 | |
| 2500 | /* Get the backchain. */ |
| 2501 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
| 2502 | if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp)) |
| 2503 | tmp = 0; |
| 2504 | backchain = (CORE_ADDR) tmp; |
| 2505 | |
| 2506 | /* A zero backchain terminates the frame chain. As additional |
| 2507 | sanity check, let's verify that the spill slot for SP in the |
| 2508 | save area pointed to by the backchain in fact links back to |
| 2509 | the save area. */ |
| 2510 | if (backchain != 0 |
| 2511 | && safe_read_memory_integer (backchain + 15*word_size, |
| 2512 | word_size, byte_order, &sp) |
| 2513 | && (CORE_ADDR)sp == backchain) |
| 2514 | { |
| 2515 | /* We don't know which registers were saved, but it will have |
| 2516 | to be at least %r14 and %r15. This will allow us to continue |
| 2517 | unwinding, but other prev-frame registers may be incorrect ... */ |
| 2518 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; |
| 2519 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; |
| 2520 | |
| 2521 | /* Function return will set PC to %r14. */ |
| 2522 | info->saved_regs[S390_PSWA_REGNUM] |
| 2523 | = info->saved_regs[S390_RETADDR_REGNUM]; |
| 2524 | |
| 2525 | /* We use the current value of the frame register as local_base, |
| 2526 | and the top of the register save area as frame_base. */ |
| 2527 | info->frame_base = backchain + 16*word_size + 32; |
| 2528 | info->local_base = reg; |
| 2529 | } |
| 2530 | |
| 2531 | info->func = get_frame_pc (this_frame); |
| 2532 | } |
| 2533 | |
| 2534 | /* Unwind THIS_FRAME and return the corresponding unwind cache for |
| 2535 | s390_frame_unwind and s390_frame_base. */ |
| 2536 | |
| 2537 | static struct s390_unwind_cache * |
| 2538 | s390_frame_unwind_cache (struct frame_info *this_frame, |
| 2539 | void **this_prologue_cache) |
| 2540 | { |
| 2541 | struct s390_unwind_cache *info; |
| 2542 | |
| 2543 | if (*this_prologue_cache) |
| 2544 | return (struct s390_unwind_cache *) *this_prologue_cache; |
| 2545 | |
| 2546 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); |
| 2547 | *this_prologue_cache = info; |
| 2548 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
| 2549 | info->func = -1; |
| 2550 | info->frame_base = -1; |
| 2551 | info->local_base = -1; |
| 2552 | |
| 2553 | TRY |
| 2554 | { |
| 2555 | /* Try to use prologue analysis to fill the unwind cache. |
| 2556 | If this fails, fall back to reading the stack backchain. */ |
| 2557 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) |
| 2558 | s390_backchain_frame_unwind_cache (this_frame, info); |
| 2559 | } |
| 2560 | CATCH (ex, RETURN_MASK_ERROR) |
| 2561 | { |
| 2562 | if (ex.error != NOT_AVAILABLE_ERROR) |
| 2563 | throw_exception (ex); |
| 2564 | } |
| 2565 | END_CATCH |
| 2566 | |
| 2567 | return info; |
| 2568 | } |
| 2569 | |
| 2570 | /* Implement this_id frame_unwind method for s390_frame_unwind. */ |
| 2571 | |
| 2572 | static void |
| 2573 | s390_frame_this_id (struct frame_info *this_frame, |
| 2574 | void **this_prologue_cache, |
| 2575 | struct frame_id *this_id) |
| 2576 | { |
| 2577 | struct s390_unwind_cache *info |
| 2578 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
| 2579 | |
| 2580 | if (info->frame_base == -1) |
| 2581 | { |
| 2582 | if (info->func != -1) |
| 2583 | *this_id = frame_id_build_unavailable_stack (info->func); |
| 2584 | return; |
| 2585 | } |
| 2586 | |
| 2587 | *this_id = frame_id_build (info->frame_base, info->func); |
| 2588 | } |
| 2589 | |
| 2590 | /* Implement prev_register frame_unwind method for s390_frame_unwind. */ |
| 2591 | |
| 2592 | static struct value * |
| 2593 | s390_frame_prev_register (struct frame_info *this_frame, |
| 2594 | void **this_prologue_cache, int regnum) |
| 2595 | { |
| 2596 | struct s390_unwind_cache *info |
| 2597 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
| 2598 | |
| 2599 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
| 2600 | } |
| 2601 | |
| 2602 | /* Default S390 frame unwinder. */ |
| 2603 | |
| 2604 | static const struct frame_unwind s390_frame_unwind = { |
| 2605 | NORMAL_FRAME, |
| 2606 | default_frame_unwind_stop_reason, |
| 2607 | s390_frame_this_id, |
| 2608 | s390_frame_prev_register, |
| 2609 | NULL, |
| 2610 | default_frame_sniffer |
| 2611 | }; |
| 2612 | |
| 2613 | /* Code stubs and their stack frames. For things like PLTs and NULL |
| 2614 | function calls (where there is no true frame and the return address |
| 2615 | is in the RETADDR register). */ |
| 2616 | |
| 2617 | struct s390_stub_unwind_cache |
| 2618 | { |
| 2619 | CORE_ADDR frame_base; |
| 2620 | struct trad_frame_saved_reg *saved_regs; |
| 2621 | }; |
| 2622 | |
| 2623 | /* Unwind THIS_FRAME and return the corresponding unwind cache for |
| 2624 | s390_stub_frame_unwind. */ |
| 2625 | |
| 2626 | static struct s390_stub_unwind_cache * |
| 2627 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
| 2628 | void **this_prologue_cache) |
| 2629 | { |
| 2630 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 2631 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
| 2632 | struct s390_stub_unwind_cache *info; |
| 2633 | ULONGEST reg; |
| 2634 | |
| 2635 | if (*this_prologue_cache) |
| 2636 | return (struct s390_stub_unwind_cache *) *this_prologue_cache; |
| 2637 | |
| 2638 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
| 2639 | *this_prologue_cache = info; |
| 2640 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
| 2641 | |
| 2642 | /* The return address is in register %r14. */ |
| 2643 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
| 2644 | |
| 2645 | /* Retrieve stack pointer and determine our frame base. */ |
| 2646 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
| 2647 | info->frame_base = reg + 16*word_size + 32; |
| 2648 | |
| 2649 | return info; |
| 2650 | } |
| 2651 | |
| 2652 | /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */ |
| 2653 | |
| 2654 | static void |
| 2655 | s390_stub_frame_this_id (struct frame_info *this_frame, |
| 2656 | void **this_prologue_cache, |
| 2657 | struct frame_id *this_id) |
| 2658 | { |
| 2659 | struct s390_stub_unwind_cache *info |
| 2660 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
| 2661 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); |
| 2662 | } |
| 2663 | |
| 2664 | /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */ |
| 2665 | |
| 2666 | static struct value * |
| 2667 | s390_stub_frame_prev_register (struct frame_info *this_frame, |
| 2668 | void **this_prologue_cache, int regnum) |
| 2669 | { |
| 2670 | struct s390_stub_unwind_cache *info |
| 2671 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
| 2672 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
| 2673 | } |
| 2674 | |
| 2675 | /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */ |
| 2676 | |
| 2677 | static int |
| 2678 | s390_stub_frame_sniffer (const struct frame_unwind *self, |
| 2679 | struct frame_info *this_frame, |
| 2680 | void **this_prologue_cache) |
| 2681 | { |
| 2682 | CORE_ADDR addr_in_block; |
| 2683 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
| 2684 | |
| 2685 | /* If the current PC points to non-readable memory, we assume we |
| 2686 | have trapped due to an invalid function pointer call. We handle |
| 2687 | the non-existing current function like a PLT stub. */ |
| 2688 | addr_in_block = get_frame_address_in_block (this_frame); |
| 2689 | if (in_plt_section (addr_in_block) |
| 2690 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
| 2691 | return 1; |
| 2692 | return 0; |
| 2693 | } |
| 2694 | |
| 2695 | /* S390 stub frame unwinder. */ |
| 2696 | |
| 2697 | static const struct frame_unwind s390_stub_frame_unwind = { |
| 2698 | NORMAL_FRAME, |
| 2699 | default_frame_unwind_stop_reason, |
| 2700 | s390_stub_frame_this_id, |
| 2701 | s390_stub_frame_prev_register, |
| 2702 | NULL, |
| 2703 | s390_stub_frame_sniffer |
| 2704 | }; |
| 2705 | |
| 2706 | /* Frame base handling. */ |
| 2707 | |
| 2708 | static CORE_ADDR |
| 2709 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
| 2710 | { |
| 2711 | struct s390_unwind_cache *info |
| 2712 | = s390_frame_unwind_cache (this_frame, this_cache); |
| 2713 | return info->frame_base; |
| 2714 | } |
| 2715 | |
| 2716 | static CORE_ADDR |
| 2717 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
| 2718 | { |
| 2719 | struct s390_unwind_cache *info |
| 2720 | = s390_frame_unwind_cache (this_frame, this_cache); |
| 2721 | return info->local_base; |
| 2722 | } |
| 2723 | |
| 2724 | static const struct frame_base s390_frame_base = { |
| 2725 | &s390_frame_unwind, |
| 2726 | s390_frame_base_address, |
| 2727 | s390_local_base_address, |
| 2728 | s390_local_base_address |
| 2729 | }; |
| 2730 | |
| 2731 | /* Miscellaneous. */ |
| 2732 | |
| 2733 | /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or |
| 2734 | "-mcmodel=large". */ |
| 2735 | |
| 2736 | static char * |
| 2737 | s390_gcc_target_options (struct gdbarch *gdbarch) |
| 2738 | { |
| 2739 | return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31"); |
| 2740 | } |
| 2741 | |
| 2742 | /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*" |
| 2743 | for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is |
| 2744 | always "s390". Note that an s390x compiler supports "-m31" as |
| 2745 | well. */ |
| 2746 | |
| 2747 | static const char * |
| 2748 | s390_gnu_triplet_regexp (struct gdbarch *gdbarch) |
| 2749 | { |
| 2750 | return "s390x?"; |
| 2751 | } |
| 2752 | |
| 2753 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
| 2754 | gdbarch.h. */ |
| 2755 | |
| 2756 | static int |
| 2757 | s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) |
| 2758 | { |
| 2759 | return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement |
| 2760 | or indirection. */ |
| 2761 | || *s == '%' /* Register access. */ |
| 2762 | || isdigit (*s)); /* Literal number. */ |
| 2763 | } |
| 2764 | |
| 2765 | /* gdbarch init. */ |
| 2766 | |
| 2767 | /* Validate the range of registers. NAMES must be known at compile time. */ |
| 2768 | |
| 2769 | #define s390_validate_reg_range(feature, tdesc_data, start, names) \ |
| 2770 | do \ |
| 2771 | { \ |
| 2772 | for (int i = 0; i < ARRAY_SIZE (names); i++) \ |
| 2773 | if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \ |
| 2774 | return false; \ |
| 2775 | } \ |
| 2776 | while (0) |
| 2777 | |
| 2778 | /* Validate the target description. Also numbers registers contained in |
| 2779 | tdesc. */ |
| 2780 | |
| 2781 | static bool |
| 2782 | s390_tdesc_valid (struct gdbarch_tdep *tdep, |
| 2783 | struct tdesc_arch_data *tdesc_data) |
| 2784 | { |
| 2785 | static const char *const psw[] = { |
| 2786 | "pswm", "pswa" |
| 2787 | }; |
| 2788 | static const char *const gprs[] = { |
| 2789 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 2790 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" |
| 2791 | }; |
| 2792 | static const char *const fprs[] = { |
| 2793 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", |
| 2794 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" |
| 2795 | }; |
| 2796 | static const char *const acrs[] = { |
| 2797 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", |
| 2798 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" |
| 2799 | }; |
| 2800 | static const char *const gprs_lower[] = { |
| 2801 | "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", |
| 2802 | "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" |
| 2803 | }; |
| 2804 | static const char *const gprs_upper[] = { |
| 2805 | "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", |
| 2806 | "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" |
| 2807 | }; |
| 2808 | static const char *const tdb_regs[] = { |
| 2809 | "tdb0", "tac", "tct", "atia", |
| 2810 | "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7", |
| 2811 | "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15" |
| 2812 | }; |
| 2813 | static const char *const vxrs_low[] = { |
| 2814 | "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l", |
| 2815 | "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l", |
| 2816 | }; |
| 2817 | static const char *const vxrs_high[] = { |
| 2818 | "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", |
| 2819 | "v25", "v26", "v27", "v28", "v29", "v30", "v31", |
| 2820 | }; |
| 2821 | static const char *const gs_cb[] = { |
| 2822 | "gsd", "gssm", "gsepla", |
| 2823 | }; |
| 2824 | static const char *const gs_bc[] = { |
| 2825 | "bc_gsd", "bc_gssm", "bc_gsepla", |
| 2826 | }; |
| 2827 | |
| 2828 | const struct target_desc *tdesc = tdep->tdesc; |
| 2829 | const struct tdesc_feature *feature; |
| 2830 | |
| 2831 | /* Core registers, i.e. general purpose and PSW. */ |
| 2832 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); |
| 2833 | if (feature == NULL) |
| 2834 | return false; |
| 2835 | |
| 2836 | s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw); |
| 2837 | |
| 2838 | if (tdesc_unnumbered_register (feature, "r0")) |
| 2839 | { |
| 2840 | s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs); |
| 2841 | } |
| 2842 | else |
| 2843 | { |
| 2844 | tdep->have_upper = true; |
| 2845 | s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, |
| 2846 | gprs_lower); |
| 2847 | s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM, |
| 2848 | gprs_upper); |
| 2849 | } |
| 2850 | |
| 2851 | /* Floating point registers. */ |
| 2852 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); |
| 2853 | if (feature == NULL) |
| 2854 | return false; |
| 2855 | |
| 2856 | if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc")) |
| 2857 | return false; |
| 2858 | |
| 2859 | s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs); |
| 2860 | |
| 2861 | /* Access control registers. */ |
| 2862 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); |
| 2863 | if (feature == NULL) |
| 2864 | return false; |
| 2865 | |
| 2866 | s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs); |
| 2867 | |
| 2868 | /* Optional GNU/Linux-specific "registers". */ |
| 2869 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux"); |
| 2870 | if (feature) |
| 2871 | { |
| 2872 | tdesc_numbered_register (feature, tdesc_data, |
| 2873 | S390_ORIG_R2_REGNUM, "orig_r2"); |
| 2874 | |
| 2875 | if (tdesc_numbered_register (feature, tdesc_data, |
| 2876 | S390_LAST_BREAK_REGNUM, "last_break")) |
| 2877 | tdep->have_linux_v1 = true; |
| 2878 | |
| 2879 | if (tdesc_numbered_register (feature, tdesc_data, |
| 2880 | S390_SYSTEM_CALL_REGNUM, "system_call")) |
| 2881 | tdep->have_linux_v2 = true; |
| 2882 | |
| 2883 | if (tdep->have_linux_v2 && !tdep->have_linux_v1) |
| 2884 | return false; |
| 2885 | } |
| 2886 | |
| 2887 | /* Transaction diagnostic block. */ |
| 2888 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb"); |
| 2889 | if (feature) |
| 2890 | { |
| 2891 | s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM, |
| 2892 | tdb_regs); |
| 2893 | tdep->have_tdb = true; |
| 2894 | } |
| 2895 | |
| 2896 | /* Vector registers. */ |
| 2897 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx"); |
| 2898 | if (feature) |
| 2899 | { |
| 2900 | s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM, |
| 2901 | vxrs_low); |
| 2902 | s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM, |
| 2903 | vxrs_high); |
| 2904 | tdep->have_vx = true; |
| 2905 | } |
| 2906 | |
| 2907 | /* Guarded-storage registers. */ |
| 2908 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs"); |
| 2909 | if (feature) |
| 2910 | { |
| 2911 | s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb); |
| 2912 | tdep->have_gs = true; |
| 2913 | } |
| 2914 | |
| 2915 | /* Guarded-storage broadcast control. */ |
| 2916 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc"); |
| 2917 | if (feature) |
| 2918 | { |
| 2919 | if (!tdep->have_gs) |
| 2920 | return false; |
| 2921 | s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM, |
| 2922 | gs_bc); |
| 2923 | } |
| 2924 | |
| 2925 | return true; |
| 2926 | } |
| 2927 | |
| 2928 | /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free |
| 2929 | memory after use. */ |
| 2930 | |
| 2931 | static struct gdbarch_tdep * |
| 2932 | s390_gdbarch_tdep_alloc () |
| 2933 | { |
| 2934 | struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep); |
| 2935 | |
| 2936 | tdep->tdesc = NULL; |
| 2937 | |
| 2938 | tdep->abi = ABI_NONE; |
| 2939 | tdep->vector_abi = S390_VECTOR_ABI_NONE; |
| 2940 | |
| 2941 | tdep->gpr_full_regnum = -1; |
| 2942 | tdep->v0_full_regnum = -1; |
| 2943 | tdep->pc_regnum = -1; |
| 2944 | tdep->cc_regnum = -1; |
| 2945 | |
| 2946 | tdep->have_upper = false; |
| 2947 | tdep->have_linux_v1 = false; |
| 2948 | tdep->have_linux_v2 = false; |
| 2949 | tdep->have_tdb = false; |
| 2950 | tdep->have_vx = false; |
| 2951 | tdep->have_gs = false; |
| 2952 | |
| 2953 | tdep->s390_syscall_record = NULL; |
| 2954 | |
| 2955 | return tdep; |
| 2956 | } |
| 2957 | |
| 2958 | /* Set up gdbarch struct. */ |
| 2959 | |
| 2960 | static struct gdbarch * |
| 2961 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 2962 | { |
| 2963 | const struct target_desc *tdesc = info.target_desc; |
| 2964 | int first_pseudo_reg, last_pseudo_reg; |
| 2965 | static const char *const stap_register_prefixes[] = { "%", NULL }; |
| 2966 | static const char *const stap_register_indirection_prefixes[] = { "(", |
| 2967 | NULL }; |
| 2968 | static const char *const stap_register_indirection_suffixes[] = { ")", |
| 2969 | NULL }; |
| 2970 | |
| 2971 | /* Otherwise create a new gdbarch for the specified machine type. */ |
| 2972 | struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc (); |
| 2973 | struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep); |
| 2974 | struct tdesc_arch_data *tdesc_data = tdesc_data_alloc (); |
| 2975 | info.tdesc_data = tdesc_data; |
| 2976 | |
| 2977 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); |
| 2978 | set_gdbarch_char_signed (gdbarch, 0); |
| 2979 | |
| 2980 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
| 2981 | We can safely let them default to 128-bit, since the debug info |
| 2982 | will give the size of type actually used in each case. */ |
| 2983 | set_gdbarch_long_double_bit (gdbarch, 128); |
| 2984 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); |
| 2985 | |
| 2986 | /* Breakpoints. */ |
| 2987 | /* Amount PC must be decremented by after a breakpoint. This is |
| 2988 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
| 2989 | always. */ |
| 2990 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
| 2991 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc); |
| 2992 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind); |
| 2993 | |
| 2994 | /* Displaced stepping. */ |
| 2995 | set_gdbarch_displaced_step_copy_insn (gdbarch, |
| 2996 | s390_displaced_step_copy_insn); |
| 2997 | set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); |
| 2998 | set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location); |
| 2999 | set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep); |
| 3000 | set_gdbarch_software_single_step (gdbarch, s390_software_single_step); |
| 3001 | set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); |
| 3002 | |
| 3003 | /* Prologue analysis. */ |
| 3004 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); |
| 3005 | |
| 3006 | /* Register handling. */ |
| 3007 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
| 3008 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); |
| 3009 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
| 3010 | set_gdbarch_guess_tracepoint_registers (gdbarch, |
| 3011 | s390_guess_tracepoint_registers); |
| 3012 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
| 3013 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
| 3014 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
| 3015 | |
| 3016 | /* Pseudo registers. */ |
| 3017 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); |
| 3018 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); |
| 3019 | set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); |
| 3020 | set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); |
| 3021 | set_tdesc_pseudo_register_reggroup_p (gdbarch, |
| 3022 | s390_pseudo_register_reggroup_p); |
| 3023 | set_gdbarch_ax_pseudo_register_collect (gdbarch, |
| 3024 | s390_ax_pseudo_register_collect); |
| 3025 | set_gdbarch_ax_pseudo_register_push_stack |
| 3026 | (gdbarch, s390_ax_pseudo_register_push_stack); |
| 3027 | set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address); |
| 3028 | |
| 3029 | /* Inferior function calls. */ |
| 3030 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); |
| 3031 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
| 3032 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
| 3033 | set_gdbarch_return_value (gdbarch, s390_return_value); |
| 3034 | |
| 3035 | /* Frame handling. */ |
| 3036 | /* Stack grows downward. */ |
| 3037 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 3038 | set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p); |
| 3039 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
| 3040 | dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); |
| 3041 | dwarf2_append_unwinders (gdbarch); |
| 3042 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); |
| 3043 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); |
| 3044 | |
| 3045 | switch (info.bfd_arch_info->mach) |
| 3046 | { |
| 3047 | case bfd_mach_s390_31: |
| 3048 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); |
| 3049 | break; |
| 3050 | |
| 3051 | case bfd_mach_s390_64: |
| 3052 | set_gdbarch_long_bit (gdbarch, 64); |
| 3053 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 3054 | set_gdbarch_ptr_bit (gdbarch, 64); |
| 3055 | set_gdbarch_address_class_type_flags (gdbarch, |
| 3056 | s390_address_class_type_flags); |
| 3057 | set_gdbarch_address_class_type_flags_to_name (gdbarch, |
| 3058 | s390_address_class_type_flags_to_name); |
| 3059 | set_gdbarch_address_class_name_to_type_flags (gdbarch, |
| 3060 | s390_address_class_name_to_type_flags); |
| 3061 | break; |
| 3062 | } |
| 3063 | |
| 3064 | /* SystemTap functions. */ |
| 3065 | set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes); |
| 3066 | set_gdbarch_stap_register_indirection_prefixes (gdbarch, |
| 3067 | stap_register_indirection_prefixes); |
| 3068 | set_gdbarch_stap_register_indirection_suffixes (gdbarch, |
| 3069 | stap_register_indirection_suffixes); |
| 3070 | |
| 3071 | set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options); |
| 3072 | set_gdbarch_valid_disassembler_options (gdbarch, |
| 3073 | disassembler_options_s390 ()); |
| 3074 | |
| 3075 | /* Miscellaneous. */ |
| 3076 | set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand); |
| 3077 | set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options); |
| 3078 | set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp); |
| 3079 | |
| 3080 | /* Initialize the OSABI. */ |
| 3081 | gdbarch_init_osabi (info, gdbarch); |
| 3082 | |
| 3083 | /* Check any target description for validity. */ |
| 3084 | gdb_assert (tdesc_has_registers (tdep->tdesc)); |
| 3085 | if (!s390_tdesc_valid (tdep, tdesc_data)) |
| 3086 | { |
| 3087 | tdesc_data_cleanup (tdesc_data); |
| 3088 | xfree (tdep); |
| 3089 | gdbarch_free (gdbarch); |
| 3090 | return NULL; |
| 3091 | } |
| 3092 | |
| 3093 | /* Determine vector ABI. */ |
| 3094 | #ifdef HAVE_ELF |
| 3095 | if (tdep->have_vx |
| 3096 | && info.abfd != NULL |
| 3097 | && info.abfd->format == bfd_object |
| 3098 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour |
| 3099 | && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU, |
| 3100 | Tag_GNU_S390_ABI_Vector) == 2) |
| 3101 | tdep->vector_abi = S390_VECTOR_ABI_128; |
| 3102 | #endif |
| 3103 | |
| 3104 | /* Find a candidate among extant architectures. */ |
| 3105 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
| 3106 | arches != NULL; |
| 3107 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) |
| 3108 | { |
| 3109 | struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch); |
| 3110 | if (!tmp) |
| 3111 | continue; |
| 3112 | /* A program can 'choose' not to use the vector registers when they |
| 3113 | are present. Leading to the same tdesc but different tdep and |
| 3114 | thereby a different gdbarch. */ |
| 3115 | if (tmp->vector_abi != tdep->vector_abi) |
| 3116 | continue; |
| 3117 | |
| 3118 | tdesc_data_cleanup (tdesc_data); |
| 3119 | xfree (tdep); |
| 3120 | gdbarch_free (gdbarch); |
| 3121 | return arches->gdbarch; |
| 3122 | } |
| 3123 | |
| 3124 | tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data); |
| 3125 | set_gdbarch_register_name (gdbarch, s390_register_name); |
| 3126 | |
| 3127 | /* Assign pseudo register numbers. */ |
| 3128 | first_pseudo_reg = gdbarch_num_regs (gdbarch); |
| 3129 | last_pseudo_reg = first_pseudo_reg; |
| 3130 | if (tdep->have_upper) |
| 3131 | { |
| 3132 | tdep->gpr_full_regnum = last_pseudo_reg; |
| 3133 | last_pseudo_reg += 16; |
| 3134 | } |
| 3135 | if (tdep->have_vx) |
| 3136 | { |
| 3137 | tdep->v0_full_regnum = last_pseudo_reg; |
| 3138 | last_pseudo_reg += 16; |
| 3139 | } |
| 3140 | tdep->pc_regnum = last_pseudo_reg++; |
| 3141 | tdep->cc_regnum = last_pseudo_reg++; |
| 3142 | set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); |
| 3143 | set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); |
| 3144 | |
| 3145 | /* Frame handling. */ |
| 3146 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
| 3147 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
| 3148 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); |
| 3149 | frame_base_set_default (gdbarch, &s390_frame_base); |
| 3150 | |
| 3151 | return gdbarch; |
| 3152 | } |
| 3153 | |
| 3154 | void |
| 3155 | _initialize_s390_tdep (void) |
| 3156 | { |
| 3157 | /* Hook us into the gdbarch mechanism. */ |
| 3158 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); |
| 3159 | } |