| 1 | /* Target-dependent code for Hitachi Super-H, for GDB. |
| 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 20 | Boston, MA 02111-1307, USA. */ |
| 21 | |
| 22 | /* |
| 23 | Contributed by Steve Chamberlain |
| 24 | sac@cygnus.com |
| 25 | */ |
| 26 | |
| 27 | #include "defs.h" |
| 28 | #include "frame.h" |
| 29 | #include "obstack.h" |
| 30 | #include "symtab.h" |
| 31 | #include "symfile.h" |
| 32 | #include "gdbtypes.h" |
| 33 | #include "gdbcmd.h" |
| 34 | #include "gdbcore.h" |
| 35 | #include "value.h" |
| 36 | #include "dis-asm.h" |
| 37 | #include "inferior.h" /* for BEFORE_TEXT_END etc. */ |
| 38 | #include "gdb_string.h" |
| 39 | #include "arch-utils.h" |
| 40 | #include "floatformat.h" |
| 41 | #include "regcache.h" |
| 42 | #include "doublest.h" |
| 43 | |
| 44 | #include "solib-svr4.h" |
| 45 | |
| 46 | #undef XMALLOC |
| 47 | #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) |
| 48 | |
| 49 | void (*sh_show_regs) (void); |
| 50 | CORE_ADDR (*skip_prologue_hard_way) (CORE_ADDR); |
| 51 | void (*do_pseudo_register) (int); |
| 52 | |
| 53 | #define SH_DEFAULT_NUM_REGS 59 |
| 54 | |
| 55 | /* Define other aspects of the stack frame. |
| 56 | we keep a copy of the worked out return pc lying around, since it |
| 57 | is a useful bit of info */ |
| 58 | |
| 59 | struct frame_extra_info |
| 60 | { |
| 61 | CORE_ADDR return_pc; |
| 62 | int leaf_function; |
| 63 | int f_offset; |
| 64 | }; |
| 65 | |
| 66 | static char * |
| 67 | sh_generic_register_name (int reg_nr) |
| 68 | { |
| 69 | static char *register_names[] = |
| 70 | { |
| 71 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 72 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 73 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 74 | "fpul", "fpscr", |
| 75 | "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", |
| 76 | "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", |
| 77 | "ssr", "spc", |
| 78 | "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", |
| 79 | "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", |
| 80 | }; |
| 81 | if (reg_nr < 0) |
| 82 | return NULL; |
| 83 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 84 | return NULL; |
| 85 | return register_names[reg_nr]; |
| 86 | } |
| 87 | |
| 88 | static char * |
| 89 | sh_sh_register_name (int reg_nr) |
| 90 | { |
| 91 | static char *register_names[] = |
| 92 | { |
| 93 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 94 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 95 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 96 | "", "", |
| 97 | "", "", "", "", "", "", "", "", |
| 98 | "", "", "", "", "", "", "", "", |
| 99 | "", "", |
| 100 | "", "", "", "", "", "", "", "", |
| 101 | "", "", "", "", "", "", "", "", |
| 102 | }; |
| 103 | if (reg_nr < 0) |
| 104 | return NULL; |
| 105 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 106 | return NULL; |
| 107 | return register_names[reg_nr]; |
| 108 | } |
| 109 | |
| 110 | static char * |
| 111 | sh_sh3_register_name (int reg_nr) |
| 112 | { |
| 113 | static char *register_names[] = |
| 114 | { |
| 115 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 116 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 117 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 118 | "", "", |
| 119 | "", "", "", "", "", "", "", "", |
| 120 | "", "", "", "", "", "", "", "", |
| 121 | "ssr", "spc", |
| 122 | "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", |
| 123 | "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" |
| 124 | }; |
| 125 | if (reg_nr < 0) |
| 126 | return NULL; |
| 127 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 128 | return NULL; |
| 129 | return register_names[reg_nr]; |
| 130 | } |
| 131 | |
| 132 | static char * |
| 133 | sh_sh3e_register_name (int reg_nr) |
| 134 | { |
| 135 | static char *register_names[] = |
| 136 | { |
| 137 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 138 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 139 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 140 | "fpul", "fpscr", |
| 141 | "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", |
| 142 | "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", |
| 143 | "ssr", "spc", |
| 144 | "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", |
| 145 | "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", |
| 146 | }; |
| 147 | if (reg_nr < 0) |
| 148 | return NULL; |
| 149 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 150 | return NULL; |
| 151 | return register_names[reg_nr]; |
| 152 | } |
| 153 | |
| 154 | static char * |
| 155 | sh_sh_dsp_register_name (int reg_nr) |
| 156 | { |
| 157 | static char *register_names[] = |
| 158 | { |
| 159 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 160 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 161 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 162 | "", "dsr", |
| 163 | "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", |
| 164 | "y0", "y1", "", "", "", "", "", "mod", |
| 165 | "", "", |
| 166 | "rs", "re", "", "", "", "", "", "", |
| 167 | "", "", "", "", "", "", "", "", |
| 168 | }; |
| 169 | if (reg_nr < 0) |
| 170 | return NULL; |
| 171 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 172 | return NULL; |
| 173 | return register_names[reg_nr]; |
| 174 | } |
| 175 | |
| 176 | static char * |
| 177 | sh_sh3_dsp_register_name (int reg_nr) |
| 178 | { |
| 179 | static char *register_names[] = |
| 180 | { |
| 181 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 182 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 183 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 184 | "", "dsr", |
| 185 | "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", |
| 186 | "y0", "y1", "", "", "", "", "", "mod", |
| 187 | "ssr", "spc", |
| 188 | "rs", "re", "", "", "", "", "", "", |
| 189 | "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b" |
| 190 | "", "", "", "", "", "", "", "", |
| 191 | }; |
| 192 | if (reg_nr < 0) |
| 193 | return NULL; |
| 194 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 195 | return NULL; |
| 196 | return register_names[reg_nr]; |
| 197 | } |
| 198 | |
| 199 | static char * |
| 200 | sh_sh4_register_name (int reg_nr) |
| 201 | { |
| 202 | static char *register_names[] = |
| 203 | { |
| 204 | /* general registers 0-15 */ |
| 205 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 206 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 207 | /* 16 - 22 */ |
| 208 | "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", |
| 209 | /* 23, 24 */ |
| 210 | "fpul", "fpscr", |
| 211 | /* floating point registers 25 - 40 */ |
| 212 | "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", |
| 213 | "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", |
| 214 | /* 41, 42 */ |
| 215 | "ssr", "spc", |
| 216 | /* bank 0 43 - 50 */ |
| 217 | "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", |
| 218 | /* bank 1 51 - 58 */ |
| 219 | "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", |
| 220 | /* double precision (pseudo) 59 - 66 */ |
| 221 | "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14", |
| 222 | /* vectors (pseudo) 67 - 70 */ |
| 223 | "fv0", "fv4", "fv8", "fv12", |
| 224 | /* FIXME: missing XF 71 - 86 */ |
| 225 | /* FIXME: missing XD 87 - 94 */ |
| 226 | }; |
| 227 | if (reg_nr < 0) |
| 228 | return NULL; |
| 229 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) |
| 230 | return NULL; |
| 231 | return register_names[reg_nr]; |
| 232 | } |
| 233 | |
| 234 | static unsigned char * |
| 235 | sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
| 236 | { |
| 237 | /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */ |
| 238 | static unsigned char breakpoint[] = {0xc3, 0xc3}; |
| 239 | |
| 240 | *lenptr = sizeof (breakpoint); |
| 241 | return breakpoint; |
| 242 | } |
| 243 | |
| 244 | /* Prologue looks like |
| 245 | [mov.l <regs>,@-r15]... |
| 246 | [sts.l pr,@-r15] |
| 247 | [mov.l r14,@-r15] |
| 248 | [mov r15,r14] |
| 249 | |
| 250 | Actually it can be more complicated than this. For instance, with |
| 251 | newer gcc's: |
| 252 | |
| 253 | mov.l r14,@-r15 |
| 254 | add #-12,r15 |
| 255 | mov r15,r14 |
| 256 | mov r4,r1 |
| 257 | mov r5,r2 |
| 258 | mov.l r6,@(4,r14) |
| 259 | mov.l r7,@(8,r14) |
| 260 | mov.b r1,@r14 |
| 261 | mov r14,r1 |
| 262 | mov r14,r1 |
| 263 | add #2,r1 |
| 264 | mov.w r2,@r1 |
| 265 | |
| 266 | */ |
| 267 | |
| 268 | /* STS.L PR,@-r15 0100111100100010 |
| 269 | r15-4-->r15, PR-->(r15) */ |
| 270 | #define IS_STS(x) ((x) == 0x4f22) |
| 271 | |
| 272 | /* MOV.L Rm,@-r15 00101111mmmm0110 |
| 273 | r15-4-->r15, Rm-->(R15) */ |
| 274 | #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06) |
| 275 | |
| 276 | #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf) |
| 277 | |
| 278 | /* MOV r15,r14 0110111011110011 |
| 279 | r15-->r14 */ |
| 280 | #define IS_MOV_SP_FP(x) ((x) == 0x6ef3) |
| 281 | |
| 282 | /* ADD #imm,r15 01111111iiiiiiii |
| 283 | r15+imm-->r15 */ |
| 284 | #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00) |
| 285 | |
| 286 | #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00) |
| 287 | #define IS_SHLL_R3(x) ((x) == 0x4300) |
| 288 | |
| 289 | /* ADD r3,r15 0011111100111100 |
| 290 | r15+r3-->r15 */ |
| 291 | #define IS_ADD_R3SP(x) ((x) == 0x3f3c) |
| 292 | |
| 293 | /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011 |
| 294 | FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011 |
| 295 | FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */ |
| 296 | #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b) |
| 297 | |
| 298 | /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011 |
| 299 | MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd |
| 300 | MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010 |
| 301 | where Rm is one of r4,r5,r6,r7 which are the argument registers. */ |
| 302 | #define IS_ARG_MOV(x) \ |
| 303 | (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \ |
| 304 | || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \ |
| 305 | || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))) |
| 306 | |
| 307 | /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd |
| 308 | Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */ |
| 309 | #define IS_MOV_TO_R14(x) \ |
| 310 | ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) |
| 311 | |
| 312 | #define FPSCR_SZ (1 << 20) |
| 313 | |
| 314 | /* Skip any prologue before the guts of a function */ |
| 315 | |
| 316 | /* Skip the prologue using the debug information. If this fails we'll |
| 317 | fall back on the 'guess' method below. */ |
| 318 | static CORE_ADDR |
| 319 | after_prologue (CORE_ADDR pc) |
| 320 | { |
| 321 | struct symtab_and_line sal; |
| 322 | CORE_ADDR func_addr, func_end; |
| 323 | |
| 324 | /* If we can not find the symbol in the partial symbol table, then |
| 325 | there is no hope we can determine the function's start address |
| 326 | with this code. */ |
| 327 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 328 | return 0; |
| 329 | |
| 330 | /* Get the line associated with FUNC_ADDR. */ |
| 331 | sal = find_pc_line (func_addr, 0); |
| 332 | |
| 333 | /* There are only two cases to consider. First, the end of the source line |
| 334 | is within the function bounds. In that case we return the end of the |
| 335 | source line. Second is the end of the source line extends beyond the |
| 336 | bounds of the current function. We need to use the slow code to |
| 337 | examine instructions in that case. */ |
| 338 | if (sal.end < func_end) |
| 339 | return sal.end; |
| 340 | else |
| 341 | return 0; |
| 342 | } |
| 343 | |
| 344 | /* Here we look at each instruction in the function, and try to guess |
| 345 | where the prologue ends. Unfortunately this is not always |
| 346 | accurate. */ |
| 347 | static CORE_ADDR |
| 348 | sh_skip_prologue_hard_way (CORE_ADDR start_pc) |
| 349 | { |
| 350 | CORE_ADDR here, end; |
| 351 | int updated_fp = 0; |
| 352 | |
| 353 | if (!start_pc) |
| 354 | return 0; |
| 355 | |
| 356 | for (here = start_pc, end = start_pc + (2 * 28); here < end;) |
| 357 | { |
| 358 | int w = read_memory_integer (here, 2); |
| 359 | here += 2; |
| 360 | if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w) |
| 361 | || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w) |
| 362 | || IS_ARG_MOV (w) || IS_MOV_TO_R14 (w)) |
| 363 | { |
| 364 | start_pc = here; |
| 365 | } |
| 366 | else if (IS_MOV_SP_FP (w)) |
| 367 | { |
| 368 | start_pc = here; |
| 369 | updated_fp = 1; |
| 370 | } |
| 371 | else |
| 372 | /* Don't bail out yet, if we are before the copy of sp. */ |
| 373 | if (updated_fp) |
| 374 | break; |
| 375 | } |
| 376 | |
| 377 | return start_pc; |
| 378 | } |
| 379 | |
| 380 | static CORE_ADDR |
| 381 | sh_skip_prologue (CORE_ADDR pc) |
| 382 | { |
| 383 | CORE_ADDR post_prologue_pc; |
| 384 | |
| 385 | /* See if we can determine the end of the prologue via the symbol table. |
| 386 | If so, then return either PC, or the PC after the prologue, whichever |
| 387 | is greater. */ |
| 388 | post_prologue_pc = after_prologue (pc); |
| 389 | |
| 390 | /* If after_prologue returned a useful address, then use it. Else |
| 391 | fall back on the instruction skipping code. */ |
| 392 | if (post_prologue_pc != 0) |
| 393 | return max (pc, post_prologue_pc); |
| 394 | else |
| 395 | return (skip_prologue_hard_way (pc)); |
| 396 | } |
| 397 | |
| 398 | /* Immediately after a function call, return the saved pc. |
| 399 | Can't always go through the frames for this because on some machines |
| 400 | the new frame is not set up until the new function executes |
| 401 | some instructions. |
| 402 | |
| 403 | The return address is the value saved in the PR register + 4 */ |
| 404 | static CORE_ADDR |
| 405 | sh_saved_pc_after_call (struct frame_info *frame) |
| 406 | { |
| 407 | return (ADDR_BITS_REMOVE (read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM))); |
| 408 | } |
| 409 | |
| 410 | /* Should call_function allocate stack space for a struct return? */ |
| 411 | static int |
| 412 | sh_use_struct_convention (int gcc_p, struct type *type) |
| 413 | { |
| 414 | return (TYPE_LENGTH (type) > 1); |
| 415 | } |
| 416 | |
| 417 | /* Store the address of the place in which to copy the structure the |
| 418 | subroutine will return. This is called from call_function. |
| 419 | |
| 420 | We store structs through a pointer passed in R2 */ |
| 421 | static void |
| 422 | sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) |
| 423 | { |
| 424 | write_register (STRUCT_RETURN_REGNUM, (addr)); |
| 425 | } |
| 426 | |
| 427 | /* Disassemble an instruction. */ |
| 428 | static int |
| 429 | gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info) |
| 430 | { |
| 431 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 432 | return print_insn_sh (memaddr, info); |
| 433 | else |
| 434 | return print_insn_shl (memaddr, info); |
| 435 | } |
| 436 | |
| 437 | /* Given a GDB frame, determine the address of the calling function's frame. |
| 438 | This will be used to create a new GDB frame struct, and then |
| 439 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. |
| 440 | |
| 441 | For us, the frame address is its stack pointer value, so we look up |
| 442 | the function prologue to determine the caller's sp value, and return it. */ |
| 443 | static CORE_ADDR |
| 444 | sh_frame_chain (struct frame_info *frame) |
| 445 | { |
| 446 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
| 447 | return frame->frame; /* dummy frame same as caller's frame */ |
| 448 | if (frame->pc && !inside_entry_file (frame->pc)) |
| 449 | return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4); |
| 450 | else |
| 451 | return 0; |
| 452 | } |
| 453 | |
| 454 | /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing |
| 455 | we might want to do here is to check REGNUM against the clobber mask, and |
| 456 | somehow flag it as invalid if it isn't saved on the stack somewhere. This |
| 457 | would provide a graceful failure mode when trying to get the value of |
| 458 | caller-saves registers for an inner frame. */ |
| 459 | static CORE_ADDR |
| 460 | sh_find_callers_reg (struct frame_info *fi, int regnum) |
| 461 | { |
| 462 | for (; fi; fi = fi->next) |
| 463 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 464 | /* When the caller requests PR from the dummy frame, we return PC because |
| 465 | that's where the previous routine appears to have done a call from. */ |
| 466 | return generic_read_register_dummy (fi->pc, fi->frame, regnum); |
| 467 | else |
| 468 | { |
| 469 | FRAME_INIT_SAVED_REGS (fi); |
| 470 | if (!fi->pc) |
| 471 | return 0; |
| 472 | if (fi->saved_regs[regnum] != 0) |
| 473 | return read_memory_integer (fi->saved_regs[regnum], |
| 474 | REGISTER_RAW_SIZE (regnum)); |
| 475 | } |
| 476 | return read_register (regnum); |
| 477 | } |
| 478 | |
| 479 | /* Put here the code to store, into a struct frame_saved_regs, the |
| 480 | addresses of the saved registers of frame described by FRAME_INFO. |
| 481 | This includes special registers such as pc and fp saved in special |
| 482 | ways in the stack frame. sp is even more special: the address we |
| 483 | return for it IS the sp for the next frame. */ |
| 484 | static void |
| 485 | sh_nofp_frame_init_saved_regs (struct frame_info *fi) |
| 486 | { |
| 487 | int where[NUM_REGS]; |
| 488 | int rn; |
| 489 | int have_fp = 0; |
| 490 | int depth; |
| 491 | int pc; |
| 492 | int opc; |
| 493 | int insn; |
| 494 | int r3_val = 0; |
| 495 | char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame); |
| 496 | |
| 497 | if (fi->saved_regs == NULL) |
| 498 | frame_saved_regs_zalloc (fi); |
| 499 | else |
| 500 | memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS); |
| 501 | |
| 502 | if (dummy_regs) |
| 503 | { |
| 504 | /* DANGER! This is ONLY going to work if the char buffer format of |
| 505 | the saved registers is byte-for-byte identical to the |
| 506 | CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */ |
| 507 | memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs)); |
| 508 | return; |
| 509 | } |
| 510 | |
| 511 | fi->extra_info->leaf_function = 1; |
| 512 | fi->extra_info->f_offset = 0; |
| 513 | |
| 514 | for (rn = 0; rn < NUM_REGS; rn++) |
| 515 | where[rn] = -1; |
| 516 | |
| 517 | depth = 0; |
| 518 | |
| 519 | /* Loop around examining the prologue insns until we find something |
| 520 | that does not appear to be part of the prologue. But give up |
| 521 | after 20 of them, since we're getting silly then. */ |
| 522 | |
| 523 | pc = get_pc_function_start (fi->pc); |
| 524 | if (!pc) |
| 525 | { |
| 526 | fi->pc = 0; |
| 527 | return; |
| 528 | } |
| 529 | |
| 530 | for (opc = pc + (2 * 28); pc < opc; pc += 2) |
| 531 | { |
| 532 | insn = read_memory_integer (pc, 2); |
| 533 | /* See where the registers will be saved to */ |
| 534 | if (IS_PUSH (insn)) |
| 535 | { |
| 536 | rn = GET_PUSHED_REG (insn); |
| 537 | where[rn] = depth; |
| 538 | depth += 4; |
| 539 | } |
| 540 | else if (IS_STS (insn)) |
| 541 | { |
| 542 | where[gdbarch_tdep (current_gdbarch)->PR_REGNUM] = depth; |
| 543 | /* If we're storing the pr then this isn't a leaf */ |
| 544 | fi->extra_info->leaf_function = 0; |
| 545 | depth += 4; |
| 546 | } |
| 547 | else if (IS_MOV_R3 (insn)) |
| 548 | { |
| 549 | r3_val = ((insn & 0xff) ^ 0x80) - 0x80; |
| 550 | } |
| 551 | else if (IS_SHLL_R3 (insn)) |
| 552 | { |
| 553 | r3_val <<= 1; |
| 554 | } |
| 555 | else if (IS_ADD_R3SP (insn)) |
| 556 | { |
| 557 | depth += -r3_val; |
| 558 | } |
| 559 | else if (IS_ADD_SP (insn)) |
| 560 | { |
| 561 | depth -= ((insn & 0xff) ^ 0x80) - 0x80; |
| 562 | } |
| 563 | else if (IS_MOV_SP_FP (insn)) |
| 564 | break; |
| 565 | #if 0 /* This used to just stop when it found an instruction that |
| 566 | was not considered part of the prologue. Now, we just |
| 567 | keep going looking for likely instructions. */ |
| 568 | else |
| 569 | break; |
| 570 | #endif |
| 571 | } |
| 572 | |
| 573 | /* Now we know how deep things are, we can work out their addresses */ |
| 574 | |
| 575 | for (rn = 0; rn < NUM_REGS; rn++) |
| 576 | { |
| 577 | if (where[rn] >= 0) |
| 578 | { |
| 579 | if (rn == FP_REGNUM) |
| 580 | have_fp = 1; |
| 581 | |
| 582 | fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4; |
| 583 | } |
| 584 | else |
| 585 | { |
| 586 | fi->saved_regs[rn] = 0; |
| 587 | } |
| 588 | } |
| 589 | |
| 590 | if (have_fp) |
| 591 | { |
| 592 | fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4); |
| 593 | } |
| 594 | else |
| 595 | { |
| 596 | fi->saved_regs[SP_REGNUM] = fi->frame - 4; |
| 597 | } |
| 598 | |
| 599 | fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4; |
| 600 | /* Work out the return pc - either from the saved pr or the pr |
| 601 | value */ |
| 602 | } |
| 603 | |
| 604 | /* For vectors of 4 floating point registers. */ |
| 605 | static int |
| 606 | fv_reg_base_num (int fv_regnum) |
| 607 | { |
| 608 | int fp_regnum; |
| 609 | |
| 610 | fp_regnum = FP0_REGNUM + |
| 611 | (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4; |
| 612 | return fp_regnum; |
| 613 | } |
| 614 | |
| 615 | /* For double precision floating point registers, i.e 2 fp regs.*/ |
| 616 | static int |
| 617 | dr_reg_base_num (int dr_regnum) |
| 618 | { |
| 619 | int fp_regnum; |
| 620 | |
| 621 | fp_regnum = FP0_REGNUM + |
| 622 | (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2; |
| 623 | return fp_regnum; |
| 624 | } |
| 625 | |
| 626 | static void |
| 627 | sh_fp_frame_init_saved_regs (struct frame_info *fi) |
| 628 | { |
| 629 | int where[NUM_REGS]; |
| 630 | int rn; |
| 631 | int have_fp = 0; |
| 632 | int depth; |
| 633 | int pc; |
| 634 | int opc; |
| 635 | int insn; |
| 636 | int r3_val = 0; |
| 637 | char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame); |
| 638 | |
| 639 | if (fi->saved_regs == NULL) |
| 640 | frame_saved_regs_zalloc (fi); |
| 641 | else |
| 642 | memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS); |
| 643 | |
| 644 | if (dummy_regs) |
| 645 | { |
| 646 | /* DANGER! This is ONLY going to work if the char buffer format of |
| 647 | the saved registers is byte-for-byte identical to the |
| 648 | CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */ |
| 649 | memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs)); |
| 650 | return; |
| 651 | } |
| 652 | |
| 653 | fi->extra_info->leaf_function = 1; |
| 654 | fi->extra_info->f_offset = 0; |
| 655 | |
| 656 | for (rn = 0; rn < NUM_REGS; rn++) |
| 657 | where[rn] = -1; |
| 658 | |
| 659 | depth = 0; |
| 660 | |
| 661 | /* Loop around examining the prologue insns until we find something |
| 662 | that does not appear to be part of the prologue. But give up |
| 663 | after 20 of them, since we're getting silly then. */ |
| 664 | |
| 665 | pc = get_pc_function_start (fi->pc); |
| 666 | if (!pc) |
| 667 | { |
| 668 | fi->pc = 0; |
| 669 | return; |
| 670 | } |
| 671 | |
| 672 | for (opc = pc + (2 * 28); pc < opc; pc += 2) |
| 673 | { |
| 674 | insn = read_memory_integer (pc, 2); |
| 675 | /* See where the registers will be saved to */ |
| 676 | if (IS_PUSH (insn)) |
| 677 | { |
| 678 | rn = GET_PUSHED_REG (insn); |
| 679 | where[rn] = depth; |
| 680 | depth += 4; |
| 681 | } |
| 682 | else if (IS_STS (insn)) |
| 683 | { |
| 684 | where[gdbarch_tdep (current_gdbarch)->PR_REGNUM] = depth; |
| 685 | /* If we're storing the pr then this isn't a leaf */ |
| 686 | fi->extra_info->leaf_function = 0; |
| 687 | depth += 4; |
| 688 | } |
| 689 | else if (IS_MOV_R3 (insn)) |
| 690 | { |
| 691 | r3_val = ((insn & 0xff) ^ 0x80) - 0x80; |
| 692 | } |
| 693 | else if (IS_SHLL_R3 (insn)) |
| 694 | { |
| 695 | r3_val <<= 1; |
| 696 | } |
| 697 | else if (IS_ADD_R3SP (insn)) |
| 698 | { |
| 699 | depth += -r3_val; |
| 700 | } |
| 701 | else if (IS_ADD_SP (insn)) |
| 702 | { |
| 703 | depth -= ((insn & 0xff) ^ 0x80) - 0x80; |
| 704 | } |
| 705 | else if (IS_FMOV (insn)) |
| 706 | { |
| 707 | if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ) |
| 708 | { |
| 709 | depth += 8; |
| 710 | } |
| 711 | else |
| 712 | { |
| 713 | depth += 4; |
| 714 | } |
| 715 | } |
| 716 | else if (IS_MOV_SP_FP (insn)) |
| 717 | break; |
| 718 | #if 0 /* This used to just stop when it found an instruction that |
| 719 | was not considered part of the prologue. Now, we just |
| 720 | keep going looking for likely instructions. */ |
| 721 | else |
| 722 | break; |
| 723 | #endif |
| 724 | } |
| 725 | |
| 726 | /* Now we know how deep things are, we can work out their addresses */ |
| 727 | |
| 728 | for (rn = 0; rn < NUM_REGS; rn++) |
| 729 | { |
| 730 | if (where[rn] >= 0) |
| 731 | { |
| 732 | if (rn == FP_REGNUM) |
| 733 | have_fp = 1; |
| 734 | |
| 735 | fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4; |
| 736 | } |
| 737 | else |
| 738 | { |
| 739 | fi->saved_regs[rn] = 0; |
| 740 | } |
| 741 | } |
| 742 | |
| 743 | if (have_fp) |
| 744 | { |
| 745 | fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4); |
| 746 | } |
| 747 | else |
| 748 | { |
| 749 | fi->saved_regs[SP_REGNUM] = fi->frame - 4; |
| 750 | } |
| 751 | |
| 752 | fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4; |
| 753 | /* Work out the return pc - either from the saved pr or the pr |
| 754 | value */ |
| 755 | } |
| 756 | |
| 757 | /* Initialize the extra info saved in a FRAME */ |
| 758 | static void |
| 759 | sh_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
| 760 | { |
| 761 | |
| 762 | fi->extra_info = (struct frame_extra_info *) |
| 763 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
| 764 | |
| 765 | if (fi->next) |
| 766 | fi->pc = FRAME_SAVED_PC (fi->next); |
| 767 | |
| 768 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 769 | { |
| 770 | /* We need to setup fi->frame here because run_stack_dummy gets it wrong |
| 771 | by assuming it's always FP. */ |
| 772 | fi->frame = generic_read_register_dummy (fi->pc, fi->frame, |
| 773 | SP_REGNUM); |
| 774 | fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame, |
| 775 | PC_REGNUM); |
| 776 | fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4); |
| 777 | fi->extra_info->leaf_function = 0; |
| 778 | return; |
| 779 | } |
| 780 | else |
| 781 | { |
| 782 | FRAME_INIT_SAVED_REGS (fi); |
| 783 | fi->extra_info->return_pc = sh_find_callers_reg (fi, gdbarch_tdep (current_gdbarch)->PR_REGNUM); |
| 784 | } |
| 785 | } |
| 786 | |
| 787 | /* Extract from an array REGBUF containing the (raw) register state |
| 788 | the address in which a function should return its structure value, |
| 789 | as a CORE_ADDR (or an expression that can be used as one). */ |
| 790 | static CORE_ADDR |
| 791 | sh_extract_struct_value_address (char *regbuf) |
| 792 | { |
| 793 | return (extract_address ((regbuf), REGISTER_RAW_SIZE (0))); |
| 794 | } |
| 795 | |
| 796 | static CORE_ADDR |
| 797 | sh_frame_saved_pc (struct frame_info *frame) |
| 798 | { |
| 799 | return ((frame)->extra_info->return_pc); |
| 800 | } |
| 801 | |
| 802 | /* Discard from the stack the innermost frame, |
| 803 | restoring all saved registers. */ |
| 804 | static void |
| 805 | sh_pop_frame (void) |
| 806 | { |
| 807 | register struct frame_info *frame = get_current_frame (); |
| 808 | register CORE_ADDR fp; |
| 809 | register int regnum; |
| 810 | |
| 811 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
| 812 | generic_pop_dummy_frame (); |
| 813 | else |
| 814 | { |
| 815 | fp = FRAME_FP (frame); |
| 816 | FRAME_INIT_SAVED_REGS (frame); |
| 817 | |
| 818 | /* Copy regs from where they were saved in the frame */ |
| 819 | for (regnum = 0; regnum < NUM_REGS; regnum++) |
| 820 | if (frame->saved_regs[regnum]) |
| 821 | write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4)); |
| 822 | |
| 823 | write_register (PC_REGNUM, frame->extra_info->return_pc); |
| 824 | write_register (SP_REGNUM, fp + 4); |
| 825 | } |
| 826 | flush_cached_frames (); |
| 827 | } |
| 828 | |
| 829 | /* Function: push_arguments |
| 830 | Setup the function arguments for calling a function in the inferior. |
| 831 | |
| 832 | On the Hitachi SH architecture, there are four registers (R4 to R7) |
| 833 | which are dedicated for passing function arguments. Up to the first |
| 834 | four arguments (depending on size) may go into these registers. |
| 835 | The rest go on the stack. |
| 836 | |
| 837 | Arguments that are smaller than 4 bytes will still take up a whole |
| 838 | register or a whole 32-bit word on the stack, and will be |
| 839 | right-justified in the register or the stack word. This includes |
| 840 | chars, shorts, and small aggregate types. |
| 841 | |
| 842 | Arguments that are larger than 4 bytes may be split between two or |
| 843 | more registers. If there are not enough registers free, an argument |
| 844 | may be passed partly in a register (or registers), and partly on the |
| 845 | stack. This includes doubles, long longs, and larger aggregates. |
| 846 | As far as I know, there is no upper limit to the size of aggregates |
| 847 | that will be passed in this way; in other words, the convention of |
| 848 | passing a pointer to a large aggregate instead of a copy is not used. |
| 849 | |
| 850 | An exceptional case exists for struct arguments (and possibly other |
| 851 | aggregates such as arrays) if the size is larger than 4 bytes but |
| 852 | not a multiple of 4 bytes. In this case the argument is never split |
| 853 | between the registers and the stack, but instead is copied in its |
| 854 | entirety onto the stack, AND also copied into as many registers as |
| 855 | there is room for. In other words, space in registers permitting, |
| 856 | two copies of the same argument are passed in. As far as I can tell, |
| 857 | only the one on the stack is used, although that may be a function |
| 858 | of the level of compiler optimization. I suspect this is a compiler |
| 859 | bug. Arguments of these odd sizes are left-justified within the |
| 860 | word (as opposed to arguments smaller than 4 bytes, which are |
| 861 | right-justified). |
| 862 | |
| 863 | If the function is to return an aggregate type such as a struct, it |
| 864 | is either returned in the normal return value register R0 (if its |
| 865 | size is no greater than one byte), or else the caller must allocate |
| 866 | space into which the callee will copy the return value (if the size |
| 867 | is greater than one byte). In this case, a pointer to the return |
| 868 | value location is passed into the callee in register R2, which does |
| 869 | not displace any of the other arguments passed in via registers R4 |
| 870 | to R7. */ |
| 871 | |
| 872 | static CORE_ADDR |
| 873 | sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
| 874 | int struct_return, CORE_ADDR struct_addr) |
| 875 | { |
| 876 | int stack_offset, stack_alloc; |
| 877 | int argreg; |
| 878 | int argnum; |
| 879 | struct type *type; |
| 880 | CORE_ADDR regval; |
| 881 | char *val; |
| 882 | char valbuf[4]; |
| 883 | int len; |
| 884 | int odd_sized_struct; |
| 885 | |
| 886 | /* first force sp to a 4-byte alignment */ |
| 887 | sp = sp & ~3; |
| 888 | |
| 889 | /* The "struct return pointer" pseudo-argument has its own dedicated |
| 890 | register */ |
| 891 | if (struct_return) |
| 892 | write_register (STRUCT_RETURN_REGNUM, struct_addr); |
| 893 | |
| 894 | /* Now make sure there's space on the stack */ |
| 895 | for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++) |
| 896 | stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3); |
| 897 | sp -= stack_alloc; /* make room on stack for args */ |
| 898 | |
| 899 | /* Now load as many as possible of the first arguments into |
| 900 | registers, and push the rest onto the stack. There are 16 bytes |
| 901 | in four registers available. Loop thru args from first to last. */ |
| 902 | |
| 903 | argreg = gdbarch_tdep (current_gdbarch)->ARG0_REGNUM; |
| 904 | for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++) |
| 905 | { |
| 906 | type = VALUE_TYPE (args[argnum]); |
| 907 | len = TYPE_LENGTH (type); |
| 908 | memset (valbuf, 0, sizeof (valbuf)); |
| 909 | if (len < 4) |
| 910 | { |
| 911 | /* value gets right-justified in the register or stack word */ |
| 912 | memcpy (valbuf + (4 - len), |
| 913 | (char *) VALUE_CONTENTS (args[argnum]), len); |
| 914 | val = valbuf; |
| 915 | } |
| 916 | else |
| 917 | val = (char *) VALUE_CONTENTS (args[argnum]); |
| 918 | |
| 919 | if (len > 4 && (len & 3) != 0) |
| 920 | odd_sized_struct = 1; /* such structs go entirely on stack */ |
| 921 | else |
| 922 | odd_sized_struct = 0; |
| 923 | while (len > 0) |
| 924 | { |
| 925 | if (argreg > gdbarch_tdep (current_gdbarch)->ARGLAST_REGNUM |
| 926 | || odd_sized_struct) |
| 927 | { |
| 928 | /* must go on the stack */ |
| 929 | write_memory (sp + stack_offset, val, 4); |
| 930 | stack_offset += 4; |
| 931 | } |
| 932 | /* NOTE WELL!!!!! This is not an "else if" clause!!! |
| 933 | That's because some *&^%$ things get passed on the stack |
| 934 | AND in the registers! */ |
| 935 | if (argreg <= gdbarch_tdep (current_gdbarch)->ARGLAST_REGNUM) |
| 936 | { |
| 937 | /* there's room in a register */ |
| 938 | regval = extract_address (val, REGISTER_RAW_SIZE (argreg)); |
| 939 | write_register (argreg++, regval); |
| 940 | } |
| 941 | /* Store the value 4 bytes at a time. This means that things |
| 942 | larger than 4 bytes may go partly in registers and partly |
| 943 | on the stack. */ |
| 944 | len -= REGISTER_RAW_SIZE (argreg); |
| 945 | val += REGISTER_RAW_SIZE (argreg); |
| 946 | } |
| 947 | } |
| 948 | return sp; |
| 949 | } |
| 950 | |
| 951 | /* Function: push_return_address (pc) |
| 952 | Set up the return address for the inferior function call. |
| 953 | Needed for targets where we don't actually execute a JSR/BSR instruction */ |
| 954 | |
| 955 | static CORE_ADDR |
| 956 | sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
| 957 | { |
| 958 | write_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM, CALL_DUMMY_ADDRESS ()); |
| 959 | return sp; |
| 960 | } |
| 961 | |
| 962 | /* Function: fix_call_dummy |
| 963 | Poke the callee function's address into the destination part of |
| 964 | the CALL_DUMMY. The address is actually stored in a data word |
| 965 | following the actualy CALL_DUMMY instructions, which will load |
| 966 | it into a register using PC-relative addressing. This function |
| 967 | expects the CALL_DUMMY to look like this: |
| 968 | |
| 969 | mov.w @(2,PC), R8 |
| 970 | jsr @R8 |
| 971 | nop |
| 972 | trap |
| 973 | <destination> |
| 974 | */ |
| 975 | |
| 976 | #if 0 |
| 977 | void |
| 978 | sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs, |
| 979 | struct value **args, struct type *type, int gcc_p) |
| 980 | { |
| 981 | *(unsigned long *) (dummy + 8) = fun; |
| 982 | } |
| 983 | #endif |
| 984 | |
| 985 | static int |
| 986 | sh_coerce_float_to_double (struct type *formal, struct type *actual) |
| 987 | { |
| 988 | return 1; |
| 989 | } |
| 990 | |
| 991 | /* Find a function's return value in the appropriate registers (in |
| 992 | regbuf), and copy it into valbuf. Extract from an array REGBUF |
| 993 | containing the (raw) register state a function return value of type |
| 994 | TYPE, and copy that, in virtual format, into VALBUF. */ |
| 995 | static void |
| 996 | sh_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
| 997 | { |
| 998 | int len = TYPE_LENGTH (type); |
| 999 | int return_register = R0_REGNUM; |
| 1000 | int offset; |
| 1001 | |
| 1002 | if (len <= 4) |
| 1003 | { |
| 1004 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 1005 | offset = REGISTER_BYTE (return_register) + 4 - len; |
| 1006 | else |
| 1007 | offset = REGISTER_BYTE (return_register); |
| 1008 | memcpy (valbuf, regbuf + offset, len); |
| 1009 | } |
| 1010 | else if (len <= 8) |
| 1011 | { |
| 1012 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 1013 | offset = REGISTER_BYTE (return_register) + 8 - len; |
| 1014 | else |
| 1015 | offset = REGISTER_BYTE (return_register); |
| 1016 | memcpy (valbuf, regbuf + offset, len); |
| 1017 | } |
| 1018 | else |
| 1019 | error ("bad size for return value"); |
| 1020 | } |
| 1021 | |
| 1022 | static void |
| 1023 | sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
| 1024 | { |
| 1025 | int return_register; |
| 1026 | int offset; |
| 1027 | int len = TYPE_LENGTH (type); |
| 1028 | |
| 1029 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
| 1030 | return_register = FP0_REGNUM; |
| 1031 | else |
| 1032 | return_register = R0_REGNUM; |
| 1033 | |
| 1034 | if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT) |
| 1035 | { |
| 1036 | DOUBLEST val; |
| 1037 | if (TARGET_BYTE_ORDER == LITTLE_ENDIAN) |
| 1038 | floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, |
| 1039 | (char *) regbuf + REGISTER_BYTE (return_register), |
| 1040 | &val); |
| 1041 | else |
| 1042 | floatformat_to_doublest (&floatformat_ieee_double_big, |
| 1043 | (char *) regbuf + REGISTER_BYTE (return_register), |
| 1044 | &val); |
| 1045 | store_floating (valbuf, len, val); |
| 1046 | } |
| 1047 | else if (len <= 4) |
| 1048 | { |
| 1049 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 1050 | offset = REGISTER_BYTE (return_register) + 4 - len; |
| 1051 | else |
| 1052 | offset = REGISTER_BYTE (return_register); |
| 1053 | memcpy (valbuf, regbuf + offset, len); |
| 1054 | } |
| 1055 | else if (len <= 8) |
| 1056 | { |
| 1057 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) |
| 1058 | offset = REGISTER_BYTE (return_register) + 8 - len; |
| 1059 | else |
| 1060 | offset = REGISTER_BYTE (return_register); |
| 1061 | memcpy (valbuf, regbuf + offset, len); |
| 1062 | } |
| 1063 | else |
| 1064 | error ("bad size for return value"); |
| 1065 | } |
| 1066 | |
| 1067 | /* Write into appropriate registers a function return value |
| 1068 | of type TYPE, given in virtual format. |
| 1069 | If the architecture is sh4 or sh3e, store a function's return value |
| 1070 | in the R0 general register or in the FP0 floating point register, |
| 1071 | depending on the type of the return value. In all the other cases |
| 1072 | the result is stored in r0, left-justified. */ |
| 1073 | static void |
| 1074 | sh_default_store_return_value (struct type *type, char *valbuf) |
| 1075 | { |
| 1076 | char buf[32]; /* more than enough... */ |
| 1077 | |
| 1078 | if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM)) |
| 1079 | { |
| 1080 | /* Add leading zeros to the value. */ |
| 1081 | memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM)); |
| 1082 | memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type), |
| 1083 | valbuf, TYPE_LENGTH (type)); |
| 1084 | write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf, |
| 1085 | REGISTER_RAW_SIZE (R0_REGNUM)); |
| 1086 | } |
| 1087 | else |
| 1088 | write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf, |
| 1089 | TYPE_LENGTH (type)); |
| 1090 | } |
| 1091 | |
| 1092 | static void |
| 1093 | sh3e_sh4_store_return_value (struct type *type, char *valbuf) |
| 1094 | { |
| 1095 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
| 1096 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), |
| 1097 | valbuf, TYPE_LENGTH (type)); |
| 1098 | else |
| 1099 | sh_default_store_return_value (type, valbuf); |
| 1100 | } |
| 1101 | |
| 1102 | /* Print the registers in a form similar to the E7000 */ |
| 1103 | |
| 1104 | static void |
| 1105 | sh_generic_show_regs (void) |
| 1106 | { |
| 1107 | printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", |
| 1108 | paddr (read_register (PC_REGNUM)), |
| 1109 | (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM), |
| 1110 | (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM), |
| 1111 | (long) read_register (MACH_REGNUM), |
| 1112 | (long) read_register (MACL_REGNUM)); |
| 1113 | |
| 1114 | printf_filtered ("GBR=%08lx VBR=%08lx", |
| 1115 | (long) read_register (GBR_REGNUM), |
| 1116 | (long) read_register (VBR_REGNUM)); |
| 1117 | |
| 1118 | printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1119 | (long) read_register (0), |
| 1120 | (long) read_register (1), |
| 1121 | (long) read_register (2), |
| 1122 | (long) read_register (3), |
| 1123 | (long) read_register (4), |
| 1124 | (long) read_register (5), |
| 1125 | (long) read_register (6), |
| 1126 | (long) read_register (7)); |
| 1127 | printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1128 | (long) read_register (8), |
| 1129 | (long) read_register (9), |
| 1130 | (long) read_register (10), |
| 1131 | (long) read_register (11), |
| 1132 | (long) read_register (12), |
| 1133 | (long) read_register (13), |
| 1134 | (long) read_register (14), |
| 1135 | (long) read_register (15)); |
| 1136 | } |
| 1137 | |
| 1138 | static void |
| 1139 | sh3_show_regs (void) |
| 1140 | { |
| 1141 | printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", |
| 1142 | paddr (read_register (PC_REGNUM)), |
| 1143 | (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM), |
| 1144 | (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM), |
| 1145 | (long) read_register (MACH_REGNUM), |
| 1146 | (long) read_register (MACL_REGNUM)); |
| 1147 | |
| 1148 | printf_filtered ("GBR=%08lx VBR=%08lx", |
| 1149 | (long) read_register (GBR_REGNUM), |
| 1150 | (long) read_register (VBR_REGNUM)); |
| 1151 | printf_filtered (" SSR=%08lx SPC=%08lx", |
| 1152 | (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), |
| 1153 | (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); |
| 1154 | |
| 1155 | printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1156 | (long) read_register (0), |
| 1157 | (long) read_register (1), |
| 1158 | (long) read_register (2), |
| 1159 | (long) read_register (3), |
| 1160 | (long) read_register (4), |
| 1161 | (long) read_register (5), |
| 1162 | (long) read_register (6), |
| 1163 | (long) read_register (7)); |
| 1164 | printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1165 | (long) read_register (8), |
| 1166 | (long) read_register (9), |
| 1167 | (long) read_register (10), |
| 1168 | (long) read_register (11), |
| 1169 | (long) read_register (12), |
| 1170 | (long) read_register (13), |
| 1171 | (long) read_register (14), |
| 1172 | (long) read_register (15)); |
| 1173 | } |
| 1174 | |
| 1175 | |
| 1176 | static void |
| 1177 | sh3e_show_regs (void) |
| 1178 | { |
| 1179 | printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", |
| 1180 | paddr (read_register (PC_REGNUM)), |
| 1181 | (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM), |
| 1182 | (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM), |
| 1183 | (long) read_register (MACH_REGNUM), |
| 1184 | (long) read_register (MACL_REGNUM)); |
| 1185 | |
| 1186 | printf_filtered ("GBR=%08lx VBR=%08lx", |
| 1187 | (long) read_register (GBR_REGNUM), |
| 1188 | (long) read_register (VBR_REGNUM)); |
| 1189 | printf_filtered (" SSR=%08lx SPC=%08lx", |
| 1190 | (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), |
| 1191 | (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); |
| 1192 | printf_filtered (" FPUL=%08lx FPSCR=%08lx", |
| 1193 | (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM), |
| 1194 | (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM)); |
| 1195 | |
| 1196 | printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1197 | (long) read_register (0), |
| 1198 | (long) read_register (1), |
| 1199 | (long) read_register (2), |
| 1200 | (long) read_register (3), |
| 1201 | (long) read_register (4), |
| 1202 | (long) read_register (5), |
| 1203 | (long) read_register (6), |
| 1204 | (long) read_register (7)); |
| 1205 | printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1206 | (long) read_register (8), |
| 1207 | (long) read_register (9), |
| 1208 | (long) read_register (10), |
| 1209 | (long) read_register (11), |
| 1210 | (long) read_register (12), |
| 1211 | (long) read_register (13), |
| 1212 | (long) read_register (14), |
| 1213 | (long) read_register (15)); |
| 1214 | |
| 1215 | printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), |
| 1216 | (long) read_register (FP0_REGNUM + 0), |
| 1217 | (long) read_register (FP0_REGNUM + 1), |
| 1218 | (long) read_register (FP0_REGNUM + 2), |
| 1219 | (long) read_register (FP0_REGNUM + 3), |
| 1220 | (long) read_register (FP0_REGNUM + 4), |
| 1221 | (long) read_register (FP0_REGNUM + 5), |
| 1222 | (long) read_register (FP0_REGNUM + 6), |
| 1223 | (long) read_register (FP0_REGNUM + 7)); |
| 1224 | printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), |
| 1225 | (long) read_register (FP0_REGNUM + 8), |
| 1226 | (long) read_register (FP0_REGNUM + 9), |
| 1227 | (long) read_register (FP0_REGNUM + 10), |
| 1228 | (long) read_register (FP0_REGNUM + 11), |
| 1229 | (long) read_register (FP0_REGNUM + 12), |
| 1230 | (long) read_register (FP0_REGNUM + 13), |
| 1231 | (long) read_register (FP0_REGNUM + 14), |
| 1232 | (long) read_register (FP0_REGNUM + 15)); |
| 1233 | } |
| 1234 | |
| 1235 | static void |
| 1236 | sh3_dsp_show_regs (void) |
| 1237 | { |
| 1238 | printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", |
| 1239 | paddr (read_register (PC_REGNUM)), |
| 1240 | (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM), |
| 1241 | (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM), |
| 1242 | (long) read_register (MACH_REGNUM), |
| 1243 | (long) read_register (MACL_REGNUM)); |
| 1244 | |
| 1245 | printf_filtered ("GBR=%08lx VBR=%08lx", |
| 1246 | (long) read_register (GBR_REGNUM), |
| 1247 | (long) read_register (VBR_REGNUM)); |
| 1248 | |
| 1249 | printf_filtered (" SSR=%08lx SPC=%08lx", |
| 1250 | (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), |
| 1251 | (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); |
| 1252 | |
| 1253 | printf_filtered (" DSR=%08lx", |
| 1254 | (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM)); |
| 1255 | |
| 1256 | printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1257 | (long) read_register (0), |
| 1258 | (long) read_register (1), |
| 1259 | (long) read_register (2), |
| 1260 | (long) read_register (3), |
| 1261 | (long) read_register (4), |
| 1262 | (long) read_register (5), |
| 1263 | (long) read_register (6), |
| 1264 | (long) read_register (7)); |
| 1265 | printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1266 | (long) read_register (8), |
| 1267 | (long) read_register (9), |
| 1268 | (long) read_register (10), |
| 1269 | (long) read_register (11), |
| 1270 | (long) read_register (12), |
| 1271 | (long) read_register (13), |
| 1272 | (long) read_register (14), |
| 1273 | (long) read_register (15)); |
| 1274 | |
| 1275 | printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n", |
| 1276 | (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff, |
| 1277 | (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM), |
| 1278 | (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM), |
| 1279 | (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM), |
| 1280 | (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM), |
| 1281 | (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM), |
| 1282 | (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM)); |
| 1283 | printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n", |
| 1284 | (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff, |
| 1285 | (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM), |
| 1286 | (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM), |
| 1287 | (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM), |
| 1288 | (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM), |
| 1289 | (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM)); |
| 1290 | } |
| 1291 | |
| 1292 | static void |
| 1293 | sh4_show_regs (void) |
| 1294 | { |
| 1295 | int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000; |
| 1296 | printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", |
| 1297 | paddr (read_register (PC_REGNUM)), |
| 1298 | (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM), |
| 1299 | (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM), |
| 1300 | (long) read_register (MACH_REGNUM), |
| 1301 | (long) read_register (MACL_REGNUM)); |
| 1302 | |
| 1303 | printf_filtered ("GBR=%08lx VBR=%08lx", |
| 1304 | (long) read_register (GBR_REGNUM), |
| 1305 | (long) read_register (VBR_REGNUM)); |
| 1306 | printf_filtered (" SSR=%08lx SPC=%08lx", |
| 1307 | (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), |
| 1308 | (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); |
| 1309 | printf_filtered (" FPUL=%08lx FPSCR=%08lx", |
| 1310 | (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM), |
| 1311 | (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM)); |
| 1312 | |
| 1313 | printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1314 | (long) read_register (0), |
| 1315 | (long) read_register (1), |
| 1316 | (long) read_register (2), |
| 1317 | (long) read_register (3), |
| 1318 | (long) read_register (4), |
| 1319 | (long) read_register (5), |
| 1320 | (long) read_register (6), |
| 1321 | (long) read_register (7)); |
| 1322 | printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1323 | (long) read_register (8), |
| 1324 | (long) read_register (9), |
| 1325 | (long) read_register (10), |
| 1326 | (long) read_register (11), |
| 1327 | (long) read_register (12), |
| 1328 | (long) read_register (13), |
| 1329 | (long) read_register (14), |
| 1330 | (long) read_register (15)); |
| 1331 | |
| 1332 | printf_filtered ((pr |
| 1333 | ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" |
| 1334 | : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), |
| 1335 | (long) read_register (FP0_REGNUM + 0), |
| 1336 | (long) read_register (FP0_REGNUM + 1), |
| 1337 | (long) read_register (FP0_REGNUM + 2), |
| 1338 | (long) read_register (FP0_REGNUM + 3), |
| 1339 | (long) read_register (FP0_REGNUM + 4), |
| 1340 | (long) read_register (FP0_REGNUM + 5), |
| 1341 | (long) read_register (FP0_REGNUM + 6), |
| 1342 | (long) read_register (FP0_REGNUM + 7)); |
| 1343 | printf_filtered ((pr |
| 1344 | ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" |
| 1345 | : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), |
| 1346 | (long) read_register (FP0_REGNUM + 8), |
| 1347 | (long) read_register (FP0_REGNUM + 9), |
| 1348 | (long) read_register (FP0_REGNUM + 10), |
| 1349 | (long) read_register (FP0_REGNUM + 11), |
| 1350 | (long) read_register (FP0_REGNUM + 12), |
| 1351 | (long) read_register (FP0_REGNUM + 13), |
| 1352 | (long) read_register (FP0_REGNUM + 14), |
| 1353 | (long) read_register (FP0_REGNUM + 15)); |
| 1354 | } |
| 1355 | |
| 1356 | static void |
| 1357 | sh_dsp_show_regs (void) |
| 1358 | { |
| 1359 | printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", |
| 1360 | paddr (read_register (PC_REGNUM)), |
| 1361 | (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM), |
| 1362 | (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM), |
| 1363 | (long) read_register (MACH_REGNUM), |
| 1364 | (long) read_register (MACL_REGNUM)); |
| 1365 | |
| 1366 | printf_filtered ("GBR=%08lx VBR=%08lx", |
| 1367 | (long) read_register (GBR_REGNUM), |
| 1368 | (long) read_register (VBR_REGNUM)); |
| 1369 | |
| 1370 | printf_filtered (" DSR=%08lx", |
| 1371 | (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM)); |
| 1372 | |
| 1373 | printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1374 | (long) read_register (0), |
| 1375 | (long) read_register (1), |
| 1376 | (long) read_register (2), |
| 1377 | (long) read_register (3), |
| 1378 | (long) read_register (4), |
| 1379 | (long) read_register (5), |
| 1380 | (long) read_register (6), |
| 1381 | (long) read_register (7)); |
| 1382 | printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
| 1383 | (long) read_register (8), |
| 1384 | (long) read_register (9), |
| 1385 | (long) read_register (10), |
| 1386 | (long) read_register (11), |
| 1387 | (long) read_register (12), |
| 1388 | (long) read_register (13), |
| 1389 | (long) read_register (14), |
| 1390 | (long) read_register (15)); |
| 1391 | |
| 1392 | printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n", |
| 1393 | (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff, |
| 1394 | (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM), |
| 1395 | (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM), |
| 1396 | (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM), |
| 1397 | (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM), |
| 1398 | (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM), |
| 1399 | (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM)); |
| 1400 | printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n", |
| 1401 | (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff, |
| 1402 | (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM), |
| 1403 | (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM), |
| 1404 | (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM), |
| 1405 | (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM), |
| 1406 | (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM)); |
| 1407 | } |
| 1408 | |
| 1409 | void sh_show_regs_command (char *args, int from_tty) |
| 1410 | { |
| 1411 | if (sh_show_regs) |
| 1412 | (*sh_show_regs)(); |
| 1413 | } |
| 1414 | |
| 1415 | /* Index within `registers' of the first byte of the space for |
| 1416 | register N. */ |
| 1417 | static int |
| 1418 | sh_default_register_byte (int reg_nr) |
| 1419 | { |
| 1420 | return (reg_nr * 4); |
| 1421 | } |
| 1422 | |
| 1423 | static int |
| 1424 | sh_sh4_register_byte (int reg_nr) |
| 1425 | { |
| 1426 | if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1427 | && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1428 | return (dr_reg_base_num (reg_nr) * 4); |
| 1429 | else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM |
| 1430 | && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM) |
| 1431 | return (fv_reg_base_num (reg_nr) * 4); |
| 1432 | else |
| 1433 | return (reg_nr * 4); |
| 1434 | } |
| 1435 | |
| 1436 | /* Number of bytes of storage in the actual machine representation for |
| 1437 | register REG_NR. */ |
| 1438 | static int |
| 1439 | sh_default_register_raw_size (int reg_nr) |
| 1440 | { |
| 1441 | return 4; |
| 1442 | } |
| 1443 | |
| 1444 | static int |
| 1445 | sh_sh4_register_raw_size (int reg_nr) |
| 1446 | { |
| 1447 | if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1448 | && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1449 | return 8; |
| 1450 | else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM |
| 1451 | && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM) |
| 1452 | return 16; |
| 1453 | else |
| 1454 | return 4; |
| 1455 | } |
| 1456 | |
| 1457 | /* Number of bytes of storage in the program's representation |
| 1458 | for register N. */ |
| 1459 | static int |
| 1460 | sh_register_virtual_size (int reg_nr) |
| 1461 | { |
| 1462 | return 4; |
| 1463 | } |
| 1464 | |
| 1465 | /* Return the GDB type object for the "standard" data type |
| 1466 | of data in register N. */ |
| 1467 | static struct type * |
| 1468 | sh_sh3e_register_virtual_type (int reg_nr) |
| 1469 | { |
| 1470 | if ((reg_nr >= FP0_REGNUM |
| 1471 | && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM)) |
| 1472 | || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM)) |
| 1473 | return builtin_type_float; |
| 1474 | else |
| 1475 | return builtin_type_int; |
| 1476 | } |
| 1477 | |
| 1478 | static struct type * |
| 1479 | sh_sh4_build_float_register_type (int high) |
| 1480 | { |
| 1481 | struct type *temp; |
| 1482 | |
| 1483 | temp = create_range_type (NULL, builtin_type_int, 0, high); |
| 1484 | return create_array_type (NULL, builtin_type_float, temp); |
| 1485 | } |
| 1486 | |
| 1487 | static struct type * |
| 1488 | sh_sh4_register_virtual_type (int reg_nr) |
| 1489 | { |
| 1490 | if ((reg_nr >= FP0_REGNUM |
| 1491 | && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM)) |
| 1492 | || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM)) |
| 1493 | return builtin_type_float; |
| 1494 | else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1495 | && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1496 | return builtin_type_double; |
| 1497 | else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM |
| 1498 | && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM) |
| 1499 | return sh_sh4_build_float_register_type (3); |
| 1500 | else |
| 1501 | return builtin_type_int; |
| 1502 | } |
| 1503 | |
| 1504 | static struct type * |
| 1505 | sh_default_register_virtual_type (int reg_nr) |
| 1506 | { |
| 1507 | return builtin_type_int; |
| 1508 | } |
| 1509 | |
| 1510 | /* On the sh4, the DRi pseudo registers are problematic if the target |
| 1511 | is little endian. When the user writes one of those registers, for |
| 1512 | instance with 'ser var $dr0=1', we want the double to be stored |
| 1513 | like this: |
| 1514 | fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f |
| 1515 | fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00 |
| 1516 | |
| 1517 | This corresponds to little endian byte order & big endian word |
| 1518 | order. However if we let gdb write the register w/o conversion, it |
| 1519 | will write fr0 and fr1 this way: |
| 1520 | fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00 |
| 1521 | fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f |
| 1522 | because it will consider fr0 and fr1 as a single LE stretch of memory. |
| 1523 | |
| 1524 | To achieve what we want we must force gdb to store things in |
| 1525 | floatformat_ieee_double_littlebyte_bigword (which is defined in |
| 1526 | include/floatformat.h and libiberty/floatformat.c. |
| 1527 | |
| 1528 | In case the target is big endian, there is no problem, the |
| 1529 | raw bytes will look like: |
| 1530 | fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00 |
| 1531 | fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00 |
| 1532 | |
| 1533 | The other pseudo registers (the FVs) also don't pose a problem |
| 1534 | because they are stored as 4 individual FP elements. */ |
| 1535 | |
| 1536 | int |
| 1537 | sh_sh4_register_convertible (int nr) |
| 1538 | { |
| 1539 | if (TARGET_BYTE_ORDER == LITTLE_ENDIAN) |
| 1540 | return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr |
| 1541 | && nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM); |
| 1542 | else |
| 1543 | return 0; |
| 1544 | } |
| 1545 | |
| 1546 | void |
| 1547 | sh_sh4_register_convert_to_virtual (int regnum, struct type *type, |
| 1548 | char *from, char *to) |
| 1549 | { |
| 1550 | if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1551 | && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1552 | { |
| 1553 | DOUBLEST val; |
| 1554 | floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val); |
| 1555 | store_floating (to, TYPE_LENGTH (type), val); |
| 1556 | } |
| 1557 | else |
| 1558 | error ("sh_register_convert_to_virtual called with non DR register number"); |
| 1559 | } |
| 1560 | |
| 1561 | void |
| 1562 | sh_sh4_register_convert_to_raw (struct type *type, int regnum, |
| 1563 | char *from, char *to) |
| 1564 | { |
| 1565 | if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1566 | && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1567 | { |
| 1568 | DOUBLEST val = extract_floating (from, TYPE_LENGTH(type)); |
| 1569 | floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to); |
| 1570 | } |
| 1571 | else |
| 1572 | error("sh_register_convert_to_raw called with non DR register number"); |
| 1573 | } |
| 1574 | |
| 1575 | void |
| 1576 | sh_fetch_pseudo_register (int reg_nr) |
| 1577 | { |
| 1578 | int base_regnum, portion; |
| 1579 | |
| 1580 | if (!register_cached (reg_nr)) |
| 1581 | { |
| 1582 | if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1583 | && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1584 | { |
| 1585 | base_regnum = dr_reg_base_num (reg_nr); |
| 1586 | |
| 1587 | /* Read the real regs for which this one is an alias. */ |
| 1588 | for (portion = 0; portion < 2; portion++) |
| 1589 | if (!register_cached (base_regnum + portion)) |
| 1590 | target_fetch_registers (base_regnum + portion); |
| 1591 | } |
| 1592 | else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM |
| 1593 | && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM) |
| 1594 | { |
| 1595 | base_regnum = fv_reg_base_num (reg_nr); |
| 1596 | |
| 1597 | /* Read the real regs for which this one is an alias. */ |
| 1598 | for (portion = 0; portion < 4; portion++) |
| 1599 | if (!register_cached (base_regnum + portion)) |
| 1600 | target_fetch_registers (base_regnum + portion); |
| 1601 | } |
| 1602 | register_valid [reg_nr] = 1; |
| 1603 | } |
| 1604 | } |
| 1605 | |
| 1606 | void |
| 1607 | sh_store_pseudo_register (int reg_nr) |
| 1608 | { |
| 1609 | int base_regnum, portion; |
| 1610 | |
| 1611 | if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1612 | && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1613 | { |
| 1614 | base_regnum = dr_reg_base_num (reg_nr); |
| 1615 | |
| 1616 | /* Write the real regs for which this one is an alias. */ |
| 1617 | for (portion = 0; portion < 2; portion++) |
| 1618 | { |
| 1619 | register_valid[base_regnum + portion] = 1; |
| 1620 | target_store_registers (base_regnum + portion); |
| 1621 | } |
| 1622 | } |
| 1623 | else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM |
| 1624 | && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM) |
| 1625 | { |
| 1626 | base_regnum = fv_reg_base_num (reg_nr); |
| 1627 | |
| 1628 | /* Write the real regs for which this one is an alias. */ |
| 1629 | for (portion = 0; portion < 4; portion++) |
| 1630 | { |
| 1631 | register_valid[base_regnum + portion] = 1; |
| 1632 | target_store_registers (base_regnum + portion); |
| 1633 | } |
| 1634 | } |
| 1635 | } |
| 1636 | |
| 1637 | /* Floating point vector of 4 float registers. */ |
| 1638 | static void |
| 1639 | do_fv_register_info (int fv_regnum) |
| 1640 | { |
| 1641 | int first_fp_reg_num = fv_reg_base_num (fv_regnum); |
| 1642 | printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n", |
| 1643 | fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM, |
| 1644 | (int) read_register (first_fp_reg_num), |
| 1645 | (int) read_register (first_fp_reg_num + 1), |
| 1646 | (int) read_register (first_fp_reg_num + 2), |
| 1647 | (int) read_register (first_fp_reg_num + 3)); |
| 1648 | } |
| 1649 | |
| 1650 | /* Double precision registers. */ |
| 1651 | static void |
| 1652 | do_dr_register_info (int dr_regnum) |
| 1653 | { |
| 1654 | int first_fp_reg_num = dr_reg_base_num (dr_regnum); |
| 1655 | |
| 1656 | printf_filtered ("dr%d\t0x%08x%08x\n", |
| 1657 | dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM, |
| 1658 | (int) read_register (first_fp_reg_num), |
| 1659 | (int) read_register (first_fp_reg_num + 1)); |
| 1660 | } |
| 1661 | |
| 1662 | static void |
| 1663 | sh_do_pseudo_register (int regnum) |
| 1664 | { |
| 1665 | if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS) |
| 1666 | internal_error (__FILE__, __LINE__, |
| 1667 | "Invalid pseudo register number %d\n", regnum); |
| 1668 | else if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM |
| 1669 | && regnum < gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM) |
| 1670 | do_dr_register_info (regnum); |
| 1671 | else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM |
| 1672 | && regnum <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM) |
| 1673 | do_fv_register_info (regnum); |
| 1674 | } |
| 1675 | |
| 1676 | static void |
| 1677 | sh_do_fp_register (int regnum) |
| 1678 | { /* do values for FP (float) regs */ |
| 1679 | char *raw_buffer; |
| 1680 | double flt; /* double extracted from raw hex data */ |
| 1681 | int inv; |
| 1682 | int j; |
| 1683 | |
| 1684 | /* Allocate space for the float. */ |
| 1685 | raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM)); |
| 1686 | |
| 1687 | /* Get the data in raw format. */ |
| 1688 | if (read_relative_register_raw_bytes (regnum, raw_buffer)) |
| 1689 | error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum)); |
| 1690 | |
| 1691 | /* Get the register as a number */ |
| 1692 | flt = unpack_double (builtin_type_float, raw_buffer, &inv); |
| 1693 | |
| 1694 | /* Print the name and some spaces. */ |
| 1695 | fputs_filtered (REGISTER_NAME (regnum), gdb_stdout); |
| 1696 | print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout); |
| 1697 | |
| 1698 | /* Print the value. */ |
| 1699 | if (inv) |
| 1700 | printf_filtered ("<invalid float>"); |
| 1701 | else |
| 1702 | printf_filtered ("%-10.9g", flt); |
| 1703 | |
| 1704 | /* Print the fp register as hex. */ |
| 1705 | printf_filtered ("\t(raw 0x"); |
| 1706 | for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++) |
| 1707 | { |
| 1708 | register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j |
| 1709 | : REGISTER_RAW_SIZE (regnum) - 1 - j; |
| 1710 | printf_filtered ("%02x", (unsigned char) raw_buffer[idx]); |
| 1711 | } |
| 1712 | printf_filtered (")"); |
| 1713 | printf_filtered ("\n"); |
| 1714 | } |
| 1715 | |
| 1716 | static void |
| 1717 | sh_do_register (int regnum) |
| 1718 | { |
| 1719 | char raw_buffer[MAX_REGISTER_RAW_SIZE]; |
| 1720 | |
| 1721 | fputs_filtered (REGISTER_NAME (regnum), gdb_stdout); |
| 1722 | print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout); |
| 1723 | |
| 1724 | /* Get the data in raw format. */ |
| 1725 | if (read_relative_register_raw_bytes (regnum, raw_buffer)) |
| 1726 | printf_filtered ("*value not available*\n"); |
| 1727 | |
| 1728 | val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0, |
| 1729 | gdb_stdout, 'x', 1, 0, Val_pretty_default); |
| 1730 | printf_filtered ("\t"); |
| 1731 | val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0, |
| 1732 | gdb_stdout, 0, 1, 0, Val_pretty_default); |
| 1733 | printf_filtered ("\n"); |
| 1734 | } |
| 1735 | |
| 1736 | static void |
| 1737 | sh_print_register (int regnum) |
| 1738 | { |
| 1739 | if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS) |
| 1740 | internal_error (__FILE__, __LINE__, |
| 1741 | "Invalid register number %d\n", regnum); |
| 1742 | |
| 1743 | else if (regnum >= 0 && regnum < NUM_REGS) |
| 1744 | { |
| 1745 | if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT) |
| 1746 | sh_do_fp_register (regnum); /* FP regs */ |
| 1747 | else |
| 1748 | sh_do_register (regnum); /* All other regs */ |
| 1749 | } |
| 1750 | |
| 1751 | else if (regnum < NUM_REGS + NUM_PSEUDO_REGS) |
| 1752 | do_pseudo_register (regnum); |
| 1753 | } |
| 1754 | |
| 1755 | void |
| 1756 | sh_do_registers_info (int regnum, int fpregs) |
| 1757 | { |
| 1758 | if (regnum != -1) /* do one specified register */ |
| 1759 | { |
| 1760 | if (*(REGISTER_NAME (regnum)) == '\0') |
| 1761 | error ("Not a valid register for the current processor type"); |
| 1762 | |
| 1763 | sh_print_register (regnum); |
| 1764 | } |
| 1765 | else |
| 1766 | /* do all (or most) registers */ |
| 1767 | { |
| 1768 | regnum = 0; |
| 1769 | while (regnum < NUM_REGS) |
| 1770 | { |
| 1771 | /* If the register name is empty, it is undefined for this |
| 1772 | processor, so don't display anything. */ |
| 1773 | if (REGISTER_NAME (regnum) == NULL |
| 1774 | || *(REGISTER_NAME (regnum)) == '\0') |
| 1775 | { |
| 1776 | regnum++; |
| 1777 | continue; |
| 1778 | } |
| 1779 | |
| 1780 | if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT) |
| 1781 | { |
| 1782 | if (fpregs) |
| 1783 | { |
| 1784 | /* true for "INFO ALL-REGISTERS" command */ |
| 1785 | sh_do_fp_register (regnum); /* FP regs */ |
| 1786 | regnum ++; |
| 1787 | } |
| 1788 | else |
| 1789 | regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */ |
| 1790 | } |
| 1791 | else |
| 1792 | { |
| 1793 | sh_do_register (regnum); /* All other regs */ |
| 1794 | regnum++; |
| 1795 | } |
| 1796 | } |
| 1797 | |
| 1798 | if (fpregs) |
| 1799 | while (regnum < NUM_REGS + NUM_PSEUDO_REGS) |
| 1800 | { |
| 1801 | do_pseudo_register (regnum); |
| 1802 | regnum++; |
| 1803 | } |
| 1804 | } |
| 1805 | } |
| 1806 | |
| 1807 | #ifdef SVR4_SHARED_LIBS |
| 1808 | |
| 1809 | /* Fetch (and possibly build) an appropriate link_map_offsets structure |
| 1810 | for native i386 linux targets using the struct offsets defined in |
| 1811 | link.h (but without actual reference to that file). |
| 1812 | |
| 1813 | This makes it possible to access i386-linux shared libraries from |
| 1814 | a gdb that was not built on an i386-linux host (for cross debugging). |
| 1815 | */ |
| 1816 | |
| 1817 | struct link_map_offsets * |
| 1818 | sh_linux_svr4_fetch_link_map_offsets (void) |
| 1819 | { |
| 1820 | static struct link_map_offsets lmo; |
| 1821 | static struct link_map_offsets *lmp = 0; |
| 1822 | |
| 1823 | if (lmp == 0) |
| 1824 | { |
| 1825 | lmp = &lmo; |
| 1826 | |
| 1827 | lmo.r_debug_size = 8; /* 20 not actual size but all we need */ |
| 1828 | |
| 1829 | lmo.r_map_offset = 4; |
| 1830 | lmo.r_map_size = 4; |
| 1831 | |
| 1832 | lmo.link_map_size = 20; /* 552 not actual size but all we need */ |
| 1833 | |
| 1834 | lmo.l_addr_offset = 0; |
| 1835 | lmo.l_addr_size = 4; |
| 1836 | |
| 1837 | lmo.l_name_offset = 4; |
| 1838 | lmo.l_name_size = 4; |
| 1839 | |
| 1840 | lmo.l_next_offset = 12; |
| 1841 | lmo.l_next_size = 4; |
| 1842 | |
| 1843 | lmo.l_prev_offset = 16; |
| 1844 | lmo.l_prev_size = 4; |
| 1845 | } |
| 1846 | |
| 1847 | return lmp; |
| 1848 | } |
| 1849 | #endif /* SVR4_SHARED_LIBS */ |
| 1850 | |
| 1851 | static gdbarch_init_ftype sh_gdbarch_init; |
| 1852 | |
| 1853 | static struct gdbarch * |
| 1854 | sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 1855 | { |
| 1856 | static LONGEST sh_call_dummy_words[] = {0}; |
| 1857 | struct gdbarch *gdbarch; |
| 1858 | struct gdbarch_tdep *tdep; |
| 1859 | gdbarch_register_name_ftype *sh_register_name; |
| 1860 | gdbarch_store_return_value_ftype *sh_store_return_value; |
| 1861 | gdbarch_register_virtual_type_ftype *sh_register_virtual_type; |
| 1862 | |
| 1863 | /* Find a candidate among the list of pre-declared architectures. */ |
| 1864 | arches = gdbarch_list_lookup_by_info (arches, &info); |
| 1865 | if (arches != NULL) |
| 1866 | return arches->gdbarch; |
| 1867 | |
| 1868 | /* None found, create a new architecture from the information |
| 1869 | provided. */ |
| 1870 | tdep = XMALLOC (struct gdbarch_tdep); |
| 1871 | gdbarch = gdbarch_alloc (&info, tdep); |
| 1872 | |
| 1873 | /* Initialize the register numbers that are not common to all the |
| 1874 | variants to -1, if necessary thse will be overwritten in the case |
| 1875 | statement below. */ |
| 1876 | tdep->FPUL_REGNUM = -1; |
| 1877 | tdep->FPSCR_REGNUM = -1; |
| 1878 | tdep->PR_REGNUM = 17; |
| 1879 | tdep->SR_REGNUM = 22; |
| 1880 | tdep->DSR_REGNUM = -1; |
| 1881 | tdep->FP_LAST_REGNUM = -1; |
| 1882 | tdep->A0G_REGNUM = -1; |
| 1883 | tdep->A0_REGNUM = -1; |
| 1884 | tdep->A1G_REGNUM = -1; |
| 1885 | tdep->A1_REGNUM = -1; |
| 1886 | tdep->M0_REGNUM = -1; |
| 1887 | tdep->M1_REGNUM = -1; |
| 1888 | tdep->X0_REGNUM = -1; |
| 1889 | tdep->X1_REGNUM = -1; |
| 1890 | tdep->Y0_REGNUM = -1; |
| 1891 | tdep->Y1_REGNUM = -1; |
| 1892 | tdep->MOD_REGNUM = -1; |
| 1893 | tdep->RS_REGNUM = -1; |
| 1894 | tdep->RE_REGNUM = -1; |
| 1895 | tdep->SSR_REGNUM = -1; |
| 1896 | tdep->SPC_REGNUM = -1; |
| 1897 | tdep->DR0_REGNUM = -1; |
| 1898 | tdep->DR_LAST_REGNUM = -1; |
| 1899 | tdep->FV0_REGNUM = -1; |
| 1900 | tdep->FV_LAST_REGNUM = -1; |
| 1901 | tdep->ARG0_REGNUM = 4; |
| 1902 | tdep->ARGLAST_REGNUM = 7; |
| 1903 | tdep->RETURN_REGNUM = 0; |
| 1904 | tdep->FLOAT_ARGLAST_REGNUM = -1; |
| 1905 | |
| 1906 | set_gdbarch_fp0_regnum (gdbarch, -1); |
| 1907 | set_gdbarch_num_pseudo_regs (gdbarch, 0); |
| 1908 | set_gdbarch_max_register_raw_size (gdbarch, 4); |
| 1909 | set_gdbarch_max_register_virtual_size (gdbarch, 4); |
| 1910 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1911 | set_gdbarch_num_regs (gdbarch, SH_DEFAULT_NUM_REGS); |
| 1912 | set_gdbarch_sp_regnum (gdbarch, 15); |
| 1913 | set_gdbarch_fp_regnum (gdbarch, 14); |
| 1914 | set_gdbarch_pc_regnum (gdbarch, 16); |
| 1915 | set_gdbarch_register_size (gdbarch, 4); |
| 1916 | set_gdbarch_register_bytes (gdbarch, SH_DEFAULT_NUM_REGS * 4); |
| 1917 | set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register); |
| 1918 | set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register); |
| 1919 | set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info); |
| 1920 | set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc); |
| 1921 | set_gdbarch_frame_chain (gdbarch, sh_frame_chain); |
| 1922 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); |
| 1923 | set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info); |
| 1924 | set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value); |
| 1925 | set_gdbarch_push_arguments (gdbarch, sh_push_arguments); |
| 1926 | set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return); |
| 1927 | set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention); |
| 1928 | set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address); |
| 1929 | set_gdbarch_pop_frame (gdbarch, sh_pop_frame); |
| 1930 | set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh); |
| 1931 | skip_prologue_hard_way = sh_skip_prologue_hard_way; |
| 1932 | do_pseudo_register = sh_do_pseudo_register; |
| 1933 | |
| 1934 | switch (info.bfd_arch_info->mach) |
| 1935 | { |
| 1936 | case bfd_mach_sh: |
| 1937 | sh_register_name = sh_sh_register_name; |
| 1938 | sh_show_regs = sh_generic_show_regs; |
| 1939 | sh_store_return_value = sh_default_store_return_value; |
| 1940 | sh_register_virtual_type = sh_default_register_virtual_type; |
| 1941 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); |
| 1942 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 1943 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 1944 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 1945 | break; |
| 1946 | case bfd_mach_sh2: |
| 1947 | sh_register_name = sh_sh_register_name; |
| 1948 | sh_show_regs = sh_generic_show_regs; |
| 1949 | sh_store_return_value = sh_default_store_return_value; |
| 1950 | sh_register_virtual_type = sh_default_register_virtual_type; |
| 1951 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); |
| 1952 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 1953 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 1954 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 1955 | break; |
| 1956 | case bfd_mach_sh_dsp: |
| 1957 | sh_register_name = sh_sh_dsp_register_name; |
| 1958 | sh_show_regs = sh_dsp_show_regs; |
| 1959 | sh_store_return_value = sh_default_store_return_value; |
| 1960 | sh_register_virtual_type = sh_default_register_virtual_type; |
| 1961 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); |
| 1962 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 1963 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 1964 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 1965 | tdep->DSR_REGNUM = 24; |
| 1966 | tdep->A0G_REGNUM = 25; |
| 1967 | tdep->A0_REGNUM = 26; |
| 1968 | tdep->A1G_REGNUM = 27; |
| 1969 | tdep->A1_REGNUM = 28; |
| 1970 | tdep->M0_REGNUM = 29; |
| 1971 | tdep->M1_REGNUM = 30; |
| 1972 | tdep->X0_REGNUM = 31; |
| 1973 | tdep->X1_REGNUM = 32; |
| 1974 | tdep->Y0_REGNUM = 33; |
| 1975 | tdep->Y1_REGNUM = 34; |
| 1976 | tdep->MOD_REGNUM = 40; |
| 1977 | tdep->RS_REGNUM = 43; |
| 1978 | tdep->RE_REGNUM = 44; |
| 1979 | break; |
| 1980 | case bfd_mach_sh3: |
| 1981 | sh_register_name = sh_sh3_register_name; |
| 1982 | sh_show_regs = sh3_show_regs; |
| 1983 | sh_store_return_value = sh_default_store_return_value; |
| 1984 | sh_register_virtual_type = sh_default_register_virtual_type; |
| 1985 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); |
| 1986 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 1987 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 1988 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 1989 | tdep->SSR_REGNUM = 41; |
| 1990 | tdep->SPC_REGNUM = 42; |
| 1991 | break; |
| 1992 | case bfd_mach_sh3e: |
| 1993 | sh_register_name = sh_sh3e_register_name; |
| 1994 | sh_show_regs = sh3e_show_regs; |
| 1995 | sh_store_return_value = sh3e_sh4_store_return_value; |
| 1996 | sh_register_virtual_type = sh_sh3e_register_virtual_type; |
| 1997 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs); |
| 1998 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 1999 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 2000 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 2001 | set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value); |
| 2002 | set_gdbarch_fp0_regnum (gdbarch, 25); |
| 2003 | tdep->FPUL_REGNUM = 23; |
| 2004 | tdep->FPSCR_REGNUM = 24; |
| 2005 | tdep->FP_LAST_REGNUM = 40; |
| 2006 | tdep->SSR_REGNUM = 41; |
| 2007 | tdep->SPC_REGNUM = 42; |
| 2008 | break; |
| 2009 | case bfd_mach_sh3_dsp: |
| 2010 | sh_register_name = sh_sh3_dsp_register_name; |
| 2011 | sh_show_regs = sh3_dsp_show_regs; |
| 2012 | sh_store_return_value = sh_default_store_return_value; |
| 2013 | sh_register_virtual_type = sh_default_register_virtual_type; |
| 2014 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); |
| 2015 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 2016 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 2017 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 2018 | tdep->DSR_REGNUM = 24; |
| 2019 | tdep->A0G_REGNUM = 25; |
| 2020 | tdep->A0_REGNUM = 26; |
| 2021 | tdep->A1G_REGNUM = 27; |
| 2022 | tdep->A1_REGNUM = 28; |
| 2023 | tdep->M0_REGNUM = 29; |
| 2024 | tdep->M1_REGNUM = 30; |
| 2025 | tdep->X0_REGNUM = 31; |
| 2026 | tdep->X1_REGNUM = 32; |
| 2027 | tdep->Y0_REGNUM = 33; |
| 2028 | tdep->Y1_REGNUM = 34; |
| 2029 | tdep->MOD_REGNUM = 40; |
| 2030 | tdep->RS_REGNUM = 43; |
| 2031 | tdep->RE_REGNUM = 44; |
| 2032 | tdep->SSR_REGNUM = 41; |
| 2033 | tdep->SPC_REGNUM = 42; |
| 2034 | break; |
| 2035 | case bfd_mach_sh4: |
| 2036 | sh_register_name = sh_sh4_register_name; |
| 2037 | sh_show_regs = sh4_show_regs; |
| 2038 | sh_store_return_value = sh3e_sh4_store_return_value; |
| 2039 | sh_register_virtual_type = sh_sh4_register_virtual_type; |
| 2040 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs); |
| 2041 | set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value); |
| 2042 | set_gdbarch_fp0_regnum (gdbarch, 25); |
| 2043 | set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size); |
| 2044 | set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size); |
| 2045 | set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte); |
| 2046 | set_gdbarch_num_pseudo_regs (gdbarch, 12); |
| 2047 | set_gdbarch_max_register_raw_size (gdbarch, 4 * 4); |
| 2048 | set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4); |
| 2049 | set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw); |
| 2050 | set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual); |
| 2051 | set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible); |
| 2052 | tdep->FPUL_REGNUM = 23; |
| 2053 | tdep->FPSCR_REGNUM = 24; |
| 2054 | tdep->FP_LAST_REGNUM = 40; |
| 2055 | tdep->SSR_REGNUM = 41; |
| 2056 | tdep->SPC_REGNUM = 42; |
| 2057 | tdep->DR0_REGNUM = 59; |
| 2058 | tdep->DR_LAST_REGNUM = 66; |
| 2059 | tdep->FV0_REGNUM = 67; |
| 2060 | tdep->FV_LAST_REGNUM = 70; |
| 2061 | break; |
| 2062 | default: |
| 2063 | sh_register_name = sh_generic_register_name; |
| 2064 | sh_show_regs = sh_generic_show_regs; |
| 2065 | sh_store_return_value = sh_default_store_return_value; |
| 2066 | sh_register_virtual_type = sh_default_register_virtual_type; |
| 2067 | set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); |
| 2068 | set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size); |
| 2069 | set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size); |
| 2070 | set_gdbarch_register_byte (gdbarch, sh_default_register_byte); |
| 2071 | break; |
| 2072 | } |
| 2073 | |
| 2074 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); |
| 2075 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); |
| 2076 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); |
| 2077 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); |
| 2078 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); |
| 2079 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); |
| 2080 | |
| 2081 | set_gdbarch_register_name (gdbarch, sh_register_name); |
| 2082 | set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type); |
| 2083 | |
| 2084 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 2085 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 2086 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 2087 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 2088 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 2089 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 2090 | set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/ |
| 2091 | |
| 2092 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); |
| 2093 | set_gdbarch_call_dummy_length (gdbarch, 0); |
| 2094 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); |
| 2095 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); |
| 2096 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ |
| 2097 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); |
| 2098 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); |
| 2099 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); |
| 2100 | set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words); |
| 2101 | set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words)); |
| 2102 | set_gdbarch_call_dummy_p (gdbarch, 1); |
| 2103 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); |
| 2104 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); |
| 2105 | set_gdbarch_coerce_float_to_double (gdbarch, |
| 2106 | sh_coerce_float_to_double); |
| 2107 | |
| 2108 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); |
| 2109 | set_gdbarch_push_return_address (gdbarch, sh_push_return_address); |
| 2110 | |
| 2111 | set_gdbarch_store_return_value (gdbarch, sh_store_return_value); |
| 2112 | set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue); |
| 2113 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 2114 | set_gdbarch_decr_pc_after_break (gdbarch, 0); |
| 2115 | set_gdbarch_function_start_offset (gdbarch, 0); |
| 2116 | |
| 2117 | set_gdbarch_frame_args_skip (gdbarch, 0); |
| 2118 | set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue); |
| 2119 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); |
| 2120 | set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc); |
| 2121 | set_gdbarch_frame_args_address (gdbarch, default_frame_address); |
| 2122 | set_gdbarch_frame_locals_address (gdbarch, default_frame_address); |
| 2123 | set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call); |
| 2124 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); |
| 2125 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
| 2126 | set_gdbarch_ieee_float (gdbarch, 1); |
| 2127 | |
| 2128 | return gdbarch; |
| 2129 | } |
| 2130 | |
| 2131 | void |
| 2132 | _initialize_sh_tdep (void) |
| 2133 | { |
| 2134 | struct cmd_list_element *c; |
| 2135 | |
| 2136 | register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init); |
| 2137 | |
| 2138 | add_com ("regs", class_vars, sh_show_regs_command, "Print all registers"); |
| 2139 | } |