| 1 | /* Target-dependent code for the SPARC for GDB, the GNU debugger. |
| 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 20 | |
| 21 | /* ??? Support for calling functions from gdb in sparc64 is unfinished. */ |
| 22 | |
| 23 | #include "defs.h" |
| 24 | #include "frame.h" |
| 25 | #include "inferior.h" |
| 26 | #include "obstack.h" |
| 27 | #include "target.h" |
| 28 | #include "value.h" |
| 29 | |
| 30 | #ifdef USE_PROC_FS |
| 31 | #include <sys/procfs.h> |
| 32 | #endif |
| 33 | |
| 34 | #include "gdbcore.h" |
| 35 | |
| 36 | #ifdef GDB_TARGET_IS_SPARC64 |
| 37 | #define NUM_SPARC_FPREGS 64 |
| 38 | #else |
| 39 | #define NUM_SPARC_FPREGS 32 |
| 40 | #endif |
| 41 | |
| 42 | #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM)) |
| 43 | |
| 44 | /* From infrun.c */ |
| 45 | extern int stop_after_trap; |
| 46 | |
| 47 | /* We don't store all registers immediately when requested, since they |
| 48 | get sent over in large chunks anyway. Instead, we accumulate most |
| 49 | of the changes and send them over once. "deferred_stores" keeps |
| 50 | track of which sets of registers we have locally-changed copies of, |
| 51 | so we only need send the groups that have changed. */ |
| 52 | |
| 53 | int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ |
| 54 | |
| 55 | /* Branches with prediction are treated like their non-predicting cousins. */ |
| 56 | /* FIXME: What about floating point branches? */ |
| 57 | |
| 58 | /* Macros to extract fields from sparc instructions. */ |
| 59 | #define X_OP(i) (((i) >> 30) & 0x3) |
| 60 | #define X_RD(i) (((i) >> 25) & 0x1f) |
| 61 | #define X_A(i) (((i) >> 29) & 1) |
| 62 | #define X_COND(i) (((i) >> 25) & 0xf) |
| 63 | #define X_OP2(i) (((i) >> 22) & 0x7) |
| 64 | #define X_IMM22(i) ((i) & 0x3fffff) |
| 65 | #define X_OP3(i) (((i) >> 19) & 0x3f) |
| 66 | #define X_RS1(i) (((i) >> 14) & 0x1f) |
| 67 | #define X_I(i) (((i) >> 13) & 1) |
| 68 | #define X_IMM13(i) ((i) & 0x1fff) |
| 69 | /* Sign extension macros. */ |
| 70 | #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000) |
| 71 | #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000) |
| 72 | #ifdef GDB_TARGET_IS_SPARC64 |
| 73 | #define X_CC(i) (((i) >> 20) & 3) |
| 74 | #define X_P(i) (((i) >> 19) & 1) |
| 75 | #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000) |
| 76 | #define X_RCOND(i) (((i) >> 25) & 7) |
| 77 | #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000) |
| 78 | #define X_FCN(i) (((i) >> 25) & 31) |
| 79 | #endif |
| 80 | |
| 81 | typedef enum |
| 82 | { |
| 83 | Error, not_branch, bicc, bicca, ba, baa, ticc, ta, |
| 84 | #ifdef GDB_TARGET_IS_SPARC64 |
| 85 | done_retry |
| 86 | #endif |
| 87 | } branch_type; |
| 88 | |
| 89 | /* Simulate single-step ptrace call for sun4. Code written by Gary |
| 90 | Beihl (beihl@mcc.com). */ |
| 91 | |
| 92 | /* npc4 and next_pc describe the situation at the time that the |
| 93 | step-breakpoint was set, not necessary the current value of NPC_REGNUM. */ |
| 94 | static CORE_ADDR next_pc, npc4, target; |
| 95 | static int brknpc4, brktrg; |
| 96 | typedef char binsn_quantum[BREAKPOINT_MAX]; |
| 97 | static binsn_quantum break_mem[3]; |
| 98 | |
| 99 | /* Non-zero if we just simulated a single-step ptrace call. This is |
| 100 | needed because we cannot remove the breakpoints in the inferior |
| 101 | process until after the `wait' in `wait_for_inferior'. Used for |
| 102 | sun4. */ |
| 103 | |
| 104 | int one_stepped; |
| 105 | |
| 106 | /* single_step() is called just before we want to resume the inferior, |
| 107 | if we want to single-step it but there is no hardware or kernel single-step |
| 108 | support (as on all SPARCs). We find all the possible targets of the |
| 109 | coming instruction and breakpoint them. |
| 110 | |
| 111 | single_step is also called just after the inferior stops. If we had |
| 112 | set up a simulated single-step, we undo our damage. */ |
| 113 | |
| 114 | void |
| 115 | single_step (ignore) |
| 116 | int ignore; /* pid, but we don't need it */ |
| 117 | { |
| 118 | branch_type br, isbranch(); |
| 119 | CORE_ADDR pc; |
| 120 | long pc_instruction; |
| 121 | |
| 122 | if (!one_stepped) |
| 123 | { |
| 124 | /* Always set breakpoint for NPC. */ |
| 125 | next_pc = read_register (NPC_REGNUM); |
| 126 | npc4 = next_pc + 4; /* branch not taken */ |
| 127 | |
| 128 | target_insert_breakpoint (next_pc, break_mem[0]); |
| 129 | /* printf_unfiltered ("set break at %x\n",next_pc); */ |
| 130 | |
| 131 | pc = read_register (PC_REGNUM); |
| 132 | pc_instruction = read_memory_integer (pc, 4); |
| 133 | br = isbranch (pc_instruction, pc, &target); |
| 134 | brknpc4 = brktrg = 0; |
| 135 | |
| 136 | if (br == bicca) |
| 137 | { |
| 138 | /* Conditional annulled branch will either end up at |
| 139 | npc (if taken) or at npc+4 (if not taken). |
| 140 | Trap npc+4. */ |
| 141 | brknpc4 = 1; |
| 142 | target_insert_breakpoint (npc4, break_mem[1]); |
| 143 | } |
| 144 | else if (br == baa && target != next_pc) |
| 145 | { |
| 146 | /* Unconditional annulled branch will always end up at |
| 147 | the target. */ |
| 148 | brktrg = 1; |
| 149 | target_insert_breakpoint (target, break_mem[2]); |
| 150 | } |
| 151 | #ifdef GDB_TARGET_IS_SPARC64 |
| 152 | else if (br == done_retry) |
| 153 | { |
| 154 | brktrg = 1; |
| 155 | target_insert_breakpoint (target, break_mem[2]); |
| 156 | } |
| 157 | #endif |
| 158 | |
| 159 | /* We are ready to let it go */ |
| 160 | one_stepped = 1; |
| 161 | return; |
| 162 | } |
| 163 | else |
| 164 | { |
| 165 | /* Remove breakpoints */ |
| 166 | target_remove_breakpoint (next_pc, break_mem[0]); |
| 167 | |
| 168 | if (brknpc4) |
| 169 | target_remove_breakpoint (npc4, break_mem[1]); |
| 170 | |
| 171 | if (brktrg) |
| 172 | target_remove_breakpoint (target, break_mem[2]); |
| 173 | |
| 174 | one_stepped = 0; |
| 175 | } |
| 176 | } |
| 177 | \f |
| 178 | /* Call this for each newly created frame. For SPARC, we need to calculate |
| 179 | the bottom of the frame, and do some extra work if the prologue |
| 180 | has been generated via the -mflat option to GCC. In particular, |
| 181 | we need to know where the previous fp and the pc have been stashed, |
| 182 | since their exact position within the frame may vary. */ |
| 183 | |
| 184 | void |
| 185 | sparc_init_extra_frame_info (fromleaf, fi) |
| 186 | int fromleaf; |
| 187 | struct frame_info *fi; |
| 188 | { |
| 189 | char *name; |
| 190 | CORE_ADDR addr; |
| 191 | int insn; |
| 192 | |
| 193 | fi->bottom = |
| 194 | (fi->next ? |
| 195 | (fi->frame == fi->next->frame ? fi->next->bottom : fi->next->frame) : |
| 196 | read_register (SP_REGNUM)); |
| 197 | |
| 198 | /* If fi->next is NULL, then we already set ->frame by passing read_fp() |
| 199 | to create_new_frame. */ |
| 200 | if (fi->next) |
| 201 | { |
| 202 | char buf[MAX_REGISTER_RAW_SIZE]; |
| 203 | int err; |
| 204 | |
| 205 | /* Compute ->frame as if not flat. If it is flat, we'll change |
| 206 | it later. */ |
| 207 | /* FIXME: If error reading memory, should just stop backtracing, rather |
| 208 | than error(). */ |
| 209 | get_saved_register (buf, 0, 0, fi, FP_REGNUM, 0); |
| 210 | fi->frame = extract_address (buf, REGISTER_RAW_SIZE (FP_REGNUM)); |
| 211 | } |
| 212 | |
| 213 | /* Decide whether this is a function with a ``flat register window'' |
| 214 | frame. For such functions, the frame pointer is actually in %i7. */ |
| 215 | fi->flat = 0; |
| 216 | if (find_pc_partial_function (fi->pc, &name, &addr, NULL)) |
| 217 | { |
| 218 | /* See if the function starts with an add (which will be of a |
| 219 | negative number if a flat frame) to the sp. FIXME: Does not |
| 220 | handle large frames which will need more than one instruction |
| 221 | to adjust the sp. */ |
| 222 | insn = read_memory_integer (addr, 4); |
| 223 | if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0 |
| 224 | && X_I (insn) && X_SIMM13 (insn) < 0) |
| 225 | { |
| 226 | int offset = X_SIMM13 (insn); |
| 227 | |
| 228 | /* Then look for a save of %i7 into the frame. */ |
| 229 | insn = read_memory_integer (addr + 4, 4); |
| 230 | if (X_OP (insn) == 3 |
| 231 | && X_RD (insn) == 31 |
| 232 | && X_OP3 (insn) == 4 |
| 233 | && X_RS1 (insn) == 14) |
| 234 | { |
| 235 | char buf[MAX_REGISTER_RAW_SIZE]; |
| 236 | |
| 237 | /* We definitely have a flat frame now. */ |
| 238 | fi->flat = 1; |
| 239 | |
| 240 | fi->sp_offset = offset; |
| 241 | |
| 242 | /* Overwrite the frame's address with the value in %i7. */ |
| 243 | get_saved_register (buf, 0, 0, fi, I7_REGNUM, 0); |
| 244 | fi->frame = extract_address (buf, REGISTER_RAW_SIZE (I7_REGNUM)); |
| 245 | |
| 246 | /* Record where the fp got saved. */ |
| 247 | fi->fp_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn); |
| 248 | |
| 249 | /* Also try to collect where the pc got saved to. */ |
| 250 | fi->pc_addr = 0; |
| 251 | insn = read_memory_integer (addr + 12, 4); |
| 252 | if (X_OP (insn) == 3 |
| 253 | && X_RD (insn) == 15 |
| 254 | && X_OP3 (insn) == 4 |
| 255 | && X_RS1 (insn) == 14) |
| 256 | fi->pc_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn); |
| 257 | } |
| 258 | } |
| 259 | } |
| 260 | if (fi->next && fi->frame == 0) |
| 261 | { |
| 262 | /* Kludge to cause init_prev_frame_info to destroy the new frame. */ |
| 263 | fi->frame = fi->next->frame; |
| 264 | fi->pc = fi->next->pc; |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | CORE_ADDR |
| 269 | sparc_frame_chain (frame) |
| 270 | struct frame_info *frame; |
| 271 | { |
| 272 | /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain |
| 273 | value. If it realy is zero, we detect it later in |
| 274 | sparc_init_prev_frame. */ |
| 275 | return (CORE_ADDR)1; |
| 276 | } |
| 277 | |
| 278 | CORE_ADDR |
| 279 | sparc_extract_struct_value_address (regbuf) |
| 280 | char regbuf[REGISTER_BYTES]; |
| 281 | { |
| 282 | #ifdef GDB_TARGET_IS_SPARC64 |
| 283 | return extract_address (regbuf + REGISTER_BYTE (O0_REGNUM), |
| 284 | REGISTER_RAW_SIZE (O0_REGNUM)); |
| 285 | #else |
| 286 | return read_memory_integer (((int *)(regbuf)) [SP_REGNUM] + (16 * SPARC_INTREG_SIZE), |
| 287 | TARGET_PTR_BIT / TARGET_CHAR_BIT); |
| 288 | #endif |
| 289 | } |
| 290 | |
| 291 | /* Find the pc saved in frame FRAME. */ |
| 292 | |
| 293 | CORE_ADDR |
| 294 | sparc_frame_saved_pc (frame) |
| 295 | struct frame_info *frame; |
| 296 | { |
| 297 | char buf[MAX_REGISTER_RAW_SIZE]; |
| 298 | CORE_ADDR addr; |
| 299 | |
| 300 | if (frame->signal_handler_caller) |
| 301 | { |
| 302 | /* This is the signal trampoline frame. |
| 303 | Get the saved PC from the sigcontext structure. */ |
| 304 | |
| 305 | #ifndef SIGCONTEXT_PC_OFFSET |
| 306 | #define SIGCONTEXT_PC_OFFSET 12 |
| 307 | #endif |
| 308 | |
| 309 | CORE_ADDR sigcontext_addr; |
| 310 | char scbuf[TARGET_PTR_BIT / HOST_CHAR_BIT]; |
| 311 | int saved_pc_offset = SIGCONTEXT_PC_OFFSET; |
| 312 | char *name = NULL; |
| 313 | |
| 314 | /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext |
| 315 | as the third parameter. The offset to the saved pc is 12. */ |
| 316 | find_pc_partial_function (frame->pc, &name, |
| 317 | (CORE_ADDR *)NULL,(CORE_ADDR *)NULL); |
| 318 | if (name && STREQ (name, "ucbsigvechandler")) |
| 319 | saved_pc_offset = 12; |
| 320 | |
| 321 | /* The sigcontext address is contained in register O2. */ |
| 322 | get_saved_register (buf, (int *)NULL, (CORE_ADDR *)NULL, |
| 323 | frame, O0_REGNUM + 2, (enum lval_type *)NULL); |
| 324 | sigcontext_addr = extract_address (buf, REGISTER_RAW_SIZE (O0_REGNUM + 2)); |
| 325 | |
| 326 | /* Don't cause a memory_error when accessing sigcontext in case the |
| 327 | stack layout has changed or the stack is corrupt. */ |
| 328 | target_read_memory (sigcontext_addr + saved_pc_offset, |
| 329 | scbuf, sizeof (scbuf)); |
| 330 | return extract_address (scbuf, sizeof (scbuf)); |
| 331 | } |
| 332 | if (frame->flat) |
| 333 | addr = frame->pc_addr; |
| 334 | else |
| 335 | addr = frame->bottom + FRAME_SAVED_I0 + |
| 336 | SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM); |
| 337 | |
| 338 | if (addr == 0) |
| 339 | /* A flat frame leaf function might not save the PC anywhere, |
| 340 | just leave it in %o7. */ |
| 341 | return PC_ADJUST (read_register (O7_REGNUM)); |
| 342 | |
| 343 | read_memory (addr, buf, SPARC_INTREG_SIZE); |
| 344 | return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE)); |
| 345 | } |
| 346 | |
| 347 | /* Since an individual frame in the frame cache is defined by two |
| 348 | arguments (a frame pointer and a stack pointer), we need two |
| 349 | arguments to get info for an arbitrary stack frame. This routine |
| 350 | takes two arguments and makes the cached frames look as if these |
| 351 | two arguments defined a frame on the cache. This allows the rest |
| 352 | of info frame to extract the important arguments without |
| 353 | difficulty. */ |
| 354 | |
| 355 | struct frame_info * |
| 356 | setup_arbitrary_frame (argc, argv) |
| 357 | int argc; |
| 358 | CORE_ADDR *argv; |
| 359 | { |
| 360 | struct frame_info *frame; |
| 361 | |
| 362 | if (argc != 2) |
| 363 | error ("Sparc frame specifications require two arguments: fp and sp"); |
| 364 | |
| 365 | frame = create_new_frame (argv[0], 0); |
| 366 | |
| 367 | if (!frame) |
| 368 | fatal ("internal: create_new_frame returned invalid frame"); |
| 369 | |
| 370 | frame->bottom = argv[1]; |
| 371 | frame->pc = FRAME_SAVED_PC (frame); |
| 372 | return frame; |
| 373 | } |
| 374 | |
| 375 | /* Given a pc value, skip it forward past the function prologue by |
| 376 | disassembling instructions that appear to be a prologue. |
| 377 | |
| 378 | If FRAMELESS_P is set, we are only testing to see if the function |
| 379 | is frameless. This allows a quicker answer. |
| 380 | |
| 381 | This routine should be more specific in its actions; making sure |
| 382 | that it uses the same register in the initial prologue section. */ |
| 383 | |
| 384 | static CORE_ADDR examine_prologue PARAMS ((CORE_ADDR, int, struct frame_info *, |
| 385 | struct frame_saved_regs *)); |
| 386 | |
| 387 | static CORE_ADDR |
| 388 | examine_prologue (start_pc, frameless_p, fi, saved_regs) |
| 389 | CORE_ADDR start_pc; |
| 390 | int frameless_p; |
| 391 | struct frame_info *fi; |
| 392 | struct frame_saved_regs *saved_regs; |
| 393 | { |
| 394 | int insn; |
| 395 | int dest = -1; |
| 396 | CORE_ADDR pc = start_pc; |
| 397 | int is_flat = 0; |
| 398 | |
| 399 | insn = read_memory_integer (pc, 4); |
| 400 | |
| 401 | /* Recognize the `sethi' insn and record its destination. */ |
| 402 | if (X_OP (insn) == 0 && X_OP2 (insn) == 4) |
| 403 | { |
| 404 | dest = X_RD (insn); |
| 405 | pc += 4; |
| 406 | insn = read_memory_integer (pc, 4); |
| 407 | } |
| 408 | |
| 409 | /* Recognize an add immediate value to register to either %g1 or |
| 410 | the destination register recorded above. Actually, this might |
| 411 | well recognize several different arithmetic operations. |
| 412 | It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1" |
| 413 | followed by "save %sp, %g1, %sp" is a valid prologue (Not that |
| 414 | I imagine any compiler really does that, however). */ |
| 415 | if (X_OP (insn) == 2 |
| 416 | && X_I (insn) |
| 417 | && (X_RD (insn) == 1 || X_RD (insn) == dest)) |
| 418 | { |
| 419 | pc += 4; |
| 420 | insn = read_memory_integer (pc, 4); |
| 421 | } |
| 422 | |
| 423 | /* Recognize any SAVE insn. */ |
| 424 | if (X_OP (insn) == 2 && X_OP3 (insn) == 60) |
| 425 | { |
| 426 | pc += 4; |
| 427 | if (frameless_p) /* If the save is all we care about, */ |
| 428 | return pc; /* return before doing more work */ |
| 429 | insn = read_memory_integer (pc, 4); |
| 430 | } |
| 431 | /* Recognize add to %sp. */ |
| 432 | else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0) |
| 433 | { |
| 434 | pc += 4; |
| 435 | if (frameless_p) /* If the add is all we care about, */ |
| 436 | return pc; /* return before doing more work */ |
| 437 | is_flat = 1; |
| 438 | insn = read_memory_integer (pc, 4); |
| 439 | /* Recognize store of frame pointer (i7). */ |
| 440 | if (X_OP (insn) == 3 |
| 441 | && X_RD (insn) == 31 |
| 442 | && X_OP3 (insn) == 4 |
| 443 | && X_RS1 (insn) == 14) |
| 444 | { |
| 445 | pc += 4; |
| 446 | insn = read_memory_integer (pc, 4); |
| 447 | |
| 448 | /* Recognize sub %sp, <anything>, %i7. */ |
| 449 | if (X_OP (insn) == 2 |
| 450 | && X_OP3 (insn) == 4 |
| 451 | && X_RS1 (insn) == 14 |
| 452 | && X_RD (insn) == 31) |
| 453 | { |
| 454 | pc += 4; |
| 455 | insn = read_memory_integer (pc, 4); |
| 456 | } |
| 457 | else |
| 458 | return pc; |
| 459 | } |
| 460 | else |
| 461 | return pc; |
| 462 | } |
| 463 | else |
| 464 | /* Without a save or add instruction, it's not a prologue. */ |
| 465 | return start_pc; |
| 466 | |
| 467 | while (1) |
| 468 | { |
| 469 | /* Recognize stores into the frame from the input registers. |
| 470 | This recognizes all non alternate stores of input register, |
| 471 | into a location offset from the frame pointer. */ |
| 472 | if ((X_OP (insn) == 3 |
| 473 | && (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */ |
| 474 | && (X_RD (insn) & 0x18) == 0x18 /* Input register. */ |
| 475 | && X_I (insn) /* Immediate mode. */ |
| 476 | && X_RS1 (insn) == 30 /* Off of frame pointer. */ |
| 477 | /* Into reserved stack space. */ |
| 478 | && X_SIMM13 (insn) >= 0x44 |
| 479 | && X_SIMM13 (insn) < 0x5b)) |
| 480 | ; |
| 481 | else if (is_flat |
| 482 | && X_OP (insn) == 3 |
| 483 | && X_OP3 (insn) == 4 |
| 484 | && X_RS1 (insn) == 14 |
| 485 | ) |
| 486 | { |
| 487 | if (saved_regs && X_I (insn)) |
| 488 | saved_regs->regs[X_RD (insn)] = |
| 489 | fi->frame + fi->sp_offset + X_SIMM13 (insn); |
| 490 | } |
| 491 | else |
| 492 | break; |
| 493 | pc += 4; |
| 494 | insn = read_memory_integer (pc, 4); |
| 495 | } |
| 496 | |
| 497 | return pc; |
| 498 | } |
| 499 | |
| 500 | CORE_ADDR |
| 501 | skip_prologue (start_pc, frameless_p) |
| 502 | CORE_ADDR start_pc; |
| 503 | int frameless_p; |
| 504 | { |
| 505 | return examine_prologue (start_pc, frameless_p, NULL, NULL); |
| 506 | } |
| 507 | |
| 508 | /* Check instruction at ADDR to see if it is a branch. |
| 509 | All non-annulled instructions will go to NPC or will trap. |
| 510 | Set *TARGET if we find a candidate branch; set to zero if not. |
| 511 | |
| 512 | This isn't static as it's used by remote-sa.sparc.c. */ |
| 513 | |
| 514 | branch_type |
| 515 | isbranch (instruction, addr, target) |
| 516 | long instruction; |
| 517 | CORE_ADDR addr, *target; |
| 518 | { |
| 519 | branch_type val = not_branch; |
| 520 | long int offset; /* Must be signed for sign-extend. */ |
| 521 | |
| 522 | *target = 0; |
| 523 | |
| 524 | if (X_OP (instruction) == 0 |
| 525 | && (X_OP2 (instruction) == 2 |
| 526 | || X_OP2 (instruction) == 6 |
| 527 | #ifdef GDB_TARGET_IS_SPARC64 |
| 528 | || X_OP2 (instruction) == 1 |
| 529 | || X_OP2 (instruction) == 3 |
| 530 | || X_OP2 (instruction) == 5 |
| 531 | #else |
| 532 | || X_OP2 (instruction) == 7 |
| 533 | #endif |
| 534 | )) |
| 535 | { |
| 536 | if (X_COND (instruction) == 8) |
| 537 | val = X_A (instruction) ? baa : ba; |
| 538 | else |
| 539 | val = X_A (instruction) ? bicca : bicc; |
| 540 | switch (X_OP2 (instruction)) |
| 541 | { |
| 542 | case 2: |
| 543 | case 6: |
| 544 | #ifndef GDB_TARGET_IS_SPARC64 |
| 545 | case 7: |
| 546 | #endif |
| 547 | offset = 4 * X_DISP22 (instruction); |
| 548 | break; |
| 549 | #ifdef GDB_TARGET_IS_SPARC64 |
| 550 | case 1: |
| 551 | case 5: |
| 552 | offset = 4 * X_DISP19 (instruction); |
| 553 | break; |
| 554 | case 3: |
| 555 | offset = 4 * X_DISP16 (instruction); |
| 556 | break; |
| 557 | #endif |
| 558 | } |
| 559 | *target = addr + offset; |
| 560 | } |
| 561 | #ifdef GDB_TARGET_IS_SPARC64 |
| 562 | else if (X_OP (instruction) == 2 |
| 563 | && X_OP3 (instruction) == 62) |
| 564 | { |
| 565 | if (X_FCN (instruction) == 0) |
| 566 | { |
| 567 | /* done */ |
| 568 | *target = read_register (TNPC_REGNUM); |
| 569 | val = done_retry; |
| 570 | } |
| 571 | else if (X_FCN (instruction) == 1) |
| 572 | { |
| 573 | /* retry */ |
| 574 | *target = read_register (TPC_REGNUM); |
| 575 | val = done_retry; |
| 576 | } |
| 577 | } |
| 578 | #endif |
| 579 | |
| 580 | return val; |
| 581 | } |
| 582 | \f |
| 583 | /* Find register number REGNUM relative to FRAME and put its |
| 584 | (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable |
| 585 | was optimized out (and thus can't be fetched). If the variable |
| 586 | was fetched from memory, set *ADDRP to where it was fetched from, |
| 587 | otherwise it was fetched from a register. |
| 588 | |
| 589 | The argument RAW_BUFFER must point to aligned memory. */ |
| 590 | |
| 591 | void |
| 592 | get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) |
| 593 | char *raw_buffer; |
| 594 | int *optimized; |
| 595 | CORE_ADDR *addrp; |
| 596 | struct frame_info *frame; |
| 597 | int regnum; |
| 598 | enum lval_type *lval; |
| 599 | { |
| 600 | struct frame_info *frame1; |
| 601 | CORE_ADDR addr; |
| 602 | |
| 603 | if (!target_has_registers) |
| 604 | error ("No registers."); |
| 605 | |
| 606 | if (optimized) |
| 607 | *optimized = 0; |
| 608 | |
| 609 | addr = 0; |
| 610 | frame1 = frame->next; |
| 611 | while (frame1 != NULL) |
| 612 | { |
| 613 | if (frame1->pc >= (frame1->bottom ? frame1->bottom : |
| 614 | read_register (SP_REGNUM)) |
| 615 | && frame1->pc <= FRAME_FP (frame1)) |
| 616 | { |
| 617 | /* Dummy frame. All but the window regs are in there somewhere. */ |
| 618 | /* FIXME: The offsets are wrong for sparc64 (eg: 0xa0). */ |
| 619 | if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7) |
| 620 | addr = frame1->frame + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE |
| 621 | - (NUM_SPARC_FPREGS * 4 + 8 * SPARC_INTREG_SIZE); |
| 622 | else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8) |
| 623 | addr = frame1->frame + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
| 624 | - (NUM_SPARC_FPREGS * 4 + 16 * SPARC_INTREG_SIZE); |
| 625 | else if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM + NUM_SPARC_FPREGS) |
| 626 | addr = frame1->frame + (regnum - FP0_REGNUM) * 4 |
| 627 | - (NUM_SPARC_FPREGS * 4); |
| 628 | else if (regnum >= Y_REGNUM && regnum < NUM_REGS) |
| 629 | addr = frame1->frame + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE |
| 630 | - (NUM_SPARC_FPREGS * 4 + 24 * SPARC_INTREG_SIZE); |
| 631 | } |
| 632 | else if (frame1->flat) |
| 633 | { |
| 634 | |
| 635 | if (regnum == RP_REGNUM) |
| 636 | addr = frame1->pc_addr; |
| 637 | else if (regnum == I7_REGNUM) |
| 638 | addr = frame1->fp_addr; |
| 639 | else |
| 640 | { |
| 641 | CORE_ADDR func_start; |
| 642 | struct frame_saved_regs regs; |
| 643 | memset (®s, 0, sizeof (regs)); |
| 644 | |
| 645 | find_pc_partial_function (frame1->pc, NULL, &func_start, NULL); |
| 646 | examine_prologue (func_start, 0, frame1, ®s); |
| 647 | addr = regs.regs[regnum]; |
| 648 | } |
| 649 | } |
| 650 | else |
| 651 | { |
| 652 | /* Normal frame. Local and In registers are saved on stack. */ |
| 653 | if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8) |
| 654 | addr = (frame1->prev->bottom |
| 655 | + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
| 656 | + FRAME_SAVED_I0); |
| 657 | else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8) |
| 658 | addr = (frame1->prev->bottom |
| 659 | + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE |
| 660 | + FRAME_SAVED_L0); |
| 661 | else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8) |
| 662 | { |
| 663 | /* Outs become ins. */ |
| 664 | get_saved_register (raw_buffer, optimized, addrp, frame1, |
| 665 | (regnum - O0_REGNUM + I0_REGNUM), lval); |
| 666 | return; |
| 667 | } |
| 668 | } |
| 669 | if (addr != 0) |
| 670 | break; |
| 671 | frame1 = frame1->next; |
| 672 | } |
| 673 | if (addr != 0) |
| 674 | { |
| 675 | if (lval != NULL) |
| 676 | *lval = lval_memory; |
| 677 | if (regnum == SP_REGNUM) |
| 678 | { |
| 679 | if (raw_buffer != NULL) |
| 680 | { |
| 681 | /* Put it back in target format. */ |
| 682 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), addr); |
| 683 | } |
| 684 | if (addrp != NULL) |
| 685 | *addrp = 0; |
| 686 | return; |
| 687 | } |
| 688 | if (raw_buffer != NULL) |
| 689 | read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum)); |
| 690 | } |
| 691 | else |
| 692 | { |
| 693 | if (lval != NULL) |
| 694 | *lval = lval_register; |
| 695 | addr = REGISTER_BYTE (regnum); |
| 696 | if (raw_buffer != NULL) |
| 697 | read_register_gen (regnum, raw_buffer); |
| 698 | } |
| 699 | if (addrp != NULL) |
| 700 | *addrp = addr; |
| 701 | } |
| 702 | |
| 703 | /* Push an empty stack frame, and record in it the current PC, regs, etc. |
| 704 | |
| 705 | We save the non-windowed registers and the ins. The locals and outs |
| 706 | are new; they don't need to be saved. The i's and l's of |
| 707 | the last frame were already saved on the stack. */ |
| 708 | |
| 709 | /* Definitely see tm-sparc.h for more doc of the frame format here. */ |
| 710 | |
| 711 | #ifdef GDB_TARGET_IS_SPARC64 |
| 712 | #define DUMMY_REG_SAVE_OFFSET (128 + 16) |
| 713 | #else |
| 714 | #define DUMMY_REG_SAVE_OFFSET 0x60 |
| 715 | #endif |
| 716 | |
| 717 | /* See tm-sparc.h for how this is calculated. */ |
| 718 | #define DUMMY_STACK_REG_BUF_SIZE \ |
| 719 | (((8+8+8) * SPARC_INTREG_SIZE) + (32 * REGISTER_RAW_SIZE (FP0_REGNUM))) |
| 720 | #define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET) |
| 721 | |
| 722 | void |
| 723 | sparc_push_dummy_frame () |
| 724 | { |
| 725 | CORE_ADDR sp, old_sp; |
| 726 | char register_temp[DUMMY_STACK_SIZE]; |
| 727 | |
| 728 | old_sp = sp = read_register (SP_REGNUM); |
| 729 | |
| 730 | #ifdef GDB_TARGET_IS_SPARC64 |
| 731 | /* FIXME: not sure what needs to be saved here. */ |
| 732 | #else |
| 733 | /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */ |
| 734 | read_register_bytes (REGISTER_BYTE (Y_REGNUM), ®ister_temp[0], |
| 735 | REGISTER_RAW_SIZE (Y_REGNUM) * 8); |
| 736 | #endif |
| 737 | |
| 738 | read_register_bytes (REGISTER_BYTE (O0_REGNUM), |
| 739 | ®ister_temp[8 * SPARC_INTREG_SIZE], |
| 740 | SPARC_INTREG_SIZE * 8); |
| 741 | |
| 742 | read_register_bytes (REGISTER_BYTE (G0_REGNUM), |
| 743 | ®ister_temp[16 * SPARC_INTREG_SIZE], |
| 744 | SPARC_INTREG_SIZE * 8); |
| 745 | |
| 746 | /* ??? The 32 here should be NUM_SPARC_FPREGS, but until we decide what |
| 747 | REGISTER_RAW_SIZE should be for fp regs, it's left as is. */ |
| 748 | read_register_bytes (REGISTER_BYTE (FP0_REGNUM), |
| 749 | ®ister_temp[24 * SPARC_INTREG_SIZE], |
| 750 | REGISTER_RAW_SIZE (FP0_REGNUM) * 32); |
| 751 | |
| 752 | sp -= DUMMY_STACK_SIZE; |
| 753 | |
| 754 | write_register (SP_REGNUM, sp); |
| 755 | |
| 756 | write_memory (sp + DUMMY_REG_SAVE_OFFSET, ®ister_temp[0], |
| 757 | DUMMY_STACK_REG_BUF_SIZE); |
| 758 | |
| 759 | write_register (FP_REGNUM, old_sp); |
| 760 | |
| 761 | /* Set return address register for the call dummy to the current PC. */ |
| 762 | write_register (I7_REGNUM, read_pc() - 8); |
| 763 | } |
| 764 | |
| 765 | /* sparc_frame_find_saved_regs (). This function is here only because |
| 766 | pop_frame uses it. Note there is an interesting corner case which |
| 767 | I think few ports of GDB get right--if you are popping a frame |
| 768 | which does not save some register that *is* saved by a more inner |
| 769 | frame (such a frame will never be a dummy frame because dummy |
| 770 | frames save all registers). Rewriting pop_frame to use |
| 771 | get_saved_register would solve this problem and also get rid of the |
| 772 | ugly duplication between sparc_frame_find_saved_regs and |
| 773 | get_saved_register. |
| 774 | |
| 775 | Stores, into a struct frame_saved_regs, |
| 776 | the addresses of the saved registers of frame described by FRAME_INFO. |
| 777 | This includes special registers such as pc and fp saved in special |
| 778 | ways in the stack frame. sp is even more special: |
| 779 | the address we return for it IS the sp for the next frame. |
| 780 | |
| 781 | Note that on register window machines, we are currently making the |
| 782 | assumption that window registers are being saved somewhere in the |
| 783 | frame in which they are being used. If they are stored in an |
| 784 | inferior frame, find_saved_register will break. |
| 785 | |
| 786 | On the Sun 4, the only time all registers are saved is when |
| 787 | a dummy frame is involved. Otherwise, the only saved registers |
| 788 | are the LOCAL and IN registers which are saved as a result |
| 789 | of the "save/restore" opcodes. This condition is determined |
| 790 | by address rather than by value. |
| 791 | |
| 792 | The "pc" is not stored in a frame on the SPARC. (What is stored |
| 793 | is a return address minus 8.) sparc_pop_frame knows how to |
| 794 | deal with that. Other routines might or might not. |
| 795 | |
| 796 | See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information |
| 797 | about how this works. */ |
| 798 | |
| 799 | static void sparc_frame_find_saved_regs PARAMS ((struct frame_info *, |
| 800 | struct frame_saved_regs *)); |
| 801 | |
| 802 | static void |
| 803 | sparc_frame_find_saved_regs (fi, saved_regs_addr) |
| 804 | struct frame_info *fi; |
| 805 | struct frame_saved_regs *saved_regs_addr; |
| 806 | { |
| 807 | register int regnum; |
| 808 | CORE_ADDR frame_addr = FRAME_FP (fi); |
| 809 | |
| 810 | if (!fi) |
| 811 | fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); |
| 812 | |
| 813 | memset (saved_regs_addr, 0, sizeof (*saved_regs_addr)); |
| 814 | |
| 815 | if (fi->pc >= (fi->bottom ? fi->bottom : |
| 816 | read_register (SP_REGNUM)) |
| 817 | && fi->pc <= FRAME_FP(fi)) |
| 818 | { |
| 819 | /* Dummy frame. All but the window regs are in there somewhere. */ |
| 820 | for (regnum = G1_REGNUM; regnum < G1_REGNUM+7; regnum++) |
| 821 | saved_regs_addr->regs[regnum] = |
| 822 | frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE |
| 823 | - (NUM_SPARC_FPREGS * 4 + 8 * SPARC_INTREG_SIZE); |
| 824 | for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) |
| 825 | saved_regs_addr->regs[regnum] = |
| 826 | frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
| 827 | - (NUM_SPARC_FPREGS * 4 + 16 * SPARC_INTREG_SIZE); |
| 828 | for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++) |
| 829 | saved_regs_addr->regs[regnum] = |
| 830 | frame_addr + (regnum - FP0_REGNUM) * 4 |
| 831 | - (NUM_SPARC_FPREGS * 4); |
| 832 | for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++) |
| 833 | saved_regs_addr->regs[regnum] = |
| 834 | frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE - 0xe0; |
| 835 | - (NUM_SPARC_FPREGS * 4 + 24 * SPARC_INTREG_SIZE); |
| 836 | frame_addr = fi->bottom ? |
| 837 | fi->bottom : read_register (SP_REGNUM); |
| 838 | } |
| 839 | else if (fi->flat) |
| 840 | { |
| 841 | CORE_ADDR func_start; |
| 842 | find_pc_partial_function (fi->pc, NULL, &func_start, NULL); |
| 843 | examine_prologue (func_start, 0, fi, saved_regs_addr); |
| 844 | |
| 845 | /* Flat register window frame. */ |
| 846 | saved_regs_addr->regs[RP_REGNUM] = fi->pc_addr; |
| 847 | saved_regs_addr->regs[I7_REGNUM] = fi->fp_addr; |
| 848 | } |
| 849 | else |
| 850 | { |
| 851 | /* Normal frame. Just Local and In registers */ |
| 852 | frame_addr = fi->bottom ? |
| 853 | fi->bottom : read_register (SP_REGNUM); |
| 854 | for (regnum = L0_REGNUM; regnum < L0_REGNUM+8; regnum++) |
| 855 | saved_regs_addr->regs[regnum] = |
| 856 | (frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE |
| 857 | + FRAME_SAVED_L0); |
| 858 | for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) |
| 859 | saved_regs_addr->regs[regnum] = |
| 860 | (frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
| 861 | + FRAME_SAVED_I0); |
| 862 | } |
| 863 | if (fi->next) |
| 864 | { |
| 865 | if (fi->flat) |
| 866 | { |
| 867 | saved_regs_addr->regs[O7_REGNUM] = fi->pc_addr; |
| 868 | } |
| 869 | else |
| 870 | { |
| 871 | /* Pull off either the next frame pointer or the stack pointer */ |
| 872 | CORE_ADDR next_next_frame_addr = |
| 873 | (fi->next->bottom ? |
| 874 | fi->next->bottom : |
| 875 | read_register (SP_REGNUM)); |
| 876 | for (regnum = O0_REGNUM; regnum < O0_REGNUM+8; regnum++) |
| 877 | saved_regs_addr->regs[regnum] = |
| 878 | (next_next_frame_addr |
| 879 | + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE |
| 880 | + FRAME_SAVED_I0); |
| 881 | } |
| 882 | } |
| 883 | /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */ |
| 884 | saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi); |
| 885 | } |
| 886 | |
| 887 | /* Discard from the stack the innermost frame, restoring all saved registers. |
| 888 | |
| 889 | Note that the values stored in fsr by get_frame_saved_regs are *in |
| 890 | the context of the called frame*. What this means is that the i |
| 891 | regs of fsr must be restored into the o regs of the (calling) frame that |
| 892 | we pop into. We don't care about the output regs of the calling frame, |
| 893 | since unless it's a dummy frame, it won't have any output regs in it. |
| 894 | |
| 895 | We never have to bother with %l (local) regs, since the called routine's |
| 896 | locals get tossed, and the calling routine's locals are already saved |
| 897 | on its stack. */ |
| 898 | |
| 899 | /* Definitely see tm-sparc.h for more doc of the frame format here. */ |
| 900 | |
| 901 | void |
| 902 | sparc_pop_frame () |
| 903 | { |
| 904 | register struct frame_info *frame = get_current_frame (); |
| 905 | register CORE_ADDR pc; |
| 906 | struct frame_saved_regs fsr; |
| 907 | char raw_buffer[REGISTER_BYTES]; |
| 908 | int regnum; |
| 909 | |
| 910 | sparc_frame_find_saved_regs (frame, &fsr); |
| 911 | if (fsr.regs[FP0_REGNUM]) |
| 912 | { |
| 913 | read_memory (fsr.regs[FP0_REGNUM], raw_buffer, NUM_SPARC_FPREGS * 4); |
| 914 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), |
| 915 | raw_buffer, NUM_SPARC_FPREGS * 4); |
| 916 | } |
| 917 | #ifndef GDB_TARGET_IS_SPARC64 |
| 918 | if (fsr.regs[FPS_REGNUM]) |
| 919 | { |
| 920 | read_memory (fsr.regs[FPS_REGNUM], raw_buffer, 4); |
| 921 | write_register_bytes (REGISTER_BYTE (FPS_REGNUM), raw_buffer, 4); |
| 922 | } |
| 923 | if (fsr.regs[CPS_REGNUM]) |
| 924 | { |
| 925 | read_memory (fsr.regs[CPS_REGNUM], raw_buffer, 4); |
| 926 | write_register_bytes (REGISTER_BYTE (CPS_REGNUM), raw_buffer, 4); |
| 927 | } |
| 928 | #endif |
| 929 | if (fsr.regs[G1_REGNUM]) |
| 930 | { |
| 931 | read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE); |
| 932 | write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer, |
| 933 | 7 * SPARC_INTREG_SIZE); |
| 934 | } |
| 935 | |
| 936 | if (frame->flat) |
| 937 | { |
| 938 | /* Each register might or might not have been saved, need to test |
| 939 | individually. */ |
| 940 | for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum) |
| 941 | if (fsr.regs[regnum]) |
| 942 | write_register (regnum, read_memory_integer (fsr.regs[regnum], |
| 943 | SPARC_INTREG_SIZE)); |
| 944 | for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum) |
| 945 | if (fsr.regs[regnum]) |
| 946 | write_register (regnum, read_memory_integer (fsr.regs[regnum], |
| 947 | SPARC_INTREG_SIZE)); |
| 948 | |
| 949 | /* Handle all outs except stack pointer (o0-o5; o7). */ |
| 950 | for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum) |
| 951 | if (fsr.regs[regnum]) |
| 952 | write_register (regnum, read_memory_integer (fsr.regs[regnum], |
| 953 | SPARC_INTREG_SIZE)); |
| 954 | if (fsr.regs[O0_REGNUM + 7]) |
| 955 | write_register (O0_REGNUM + 7, |
| 956 | read_memory_integer (fsr.regs[O0_REGNUM + 7], |
| 957 | SPARC_INTREG_SIZE)); |
| 958 | |
| 959 | write_register (SP_REGNUM, frame->frame); |
| 960 | } |
| 961 | else if (fsr.regs[I0_REGNUM]) |
| 962 | { |
| 963 | CORE_ADDR sp; |
| 964 | |
| 965 | char reg_temp[REGISTER_BYTES]; |
| 966 | |
| 967 | read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE); |
| 968 | |
| 969 | /* Get the ins and locals which we are about to restore. Just |
| 970 | moving the stack pointer is all that is really needed, except |
| 971 | store_inferior_registers is then going to write the ins and |
| 972 | locals from the registers array, so we need to muck with the |
| 973 | registers array. */ |
| 974 | sp = fsr.regs[SP_REGNUM]; |
| 975 | read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16); |
| 976 | |
| 977 | /* Restore the out registers. |
| 978 | Among other things this writes the new stack pointer. */ |
| 979 | write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer, |
| 980 | SPARC_INTREG_SIZE * 8); |
| 981 | |
| 982 | write_register_bytes (REGISTER_BYTE (L0_REGNUM), reg_temp, |
| 983 | SPARC_INTREG_SIZE * 16); |
| 984 | } |
| 985 | #ifndef GDB_TARGET_IS_SPARC64 |
| 986 | if (fsr.regs[PS_REGNUM]) |
| 987 | write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4)); |
| 988 | #endif |
| 989 | if (fsr.regs[Y_REGNUM]) |
| 990 | write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], REGISTER_RAW_SIZE (Y_REGNUM))); |
| 991 | if (fsr.regs[PC_REGNUM]) |
| 992 | { |
| 993 | /* Explicitly specified PC (and maybe NPC) -- just restore them. */ |
| 994 | write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM], |
| 995 | REGISTER_RAW_SIZE (PC_REGNUM))); |
| 996 | if (fsr.regs[NPC_REGNUM]) |
| 997 | write_register (NPC_REGNUM, |
| 998 | read_memory_integer (fsr.regs[NPC_REGNUM], |
| 999 | REGISTER_RAW_SIZE (NPC_REGNUM))); |
| 1000 | } |
| 1001 | else if (frame->flat) |
| 1002 | { |
| 1003 | if (frame->pc_addr) |
| 1004 | pc = PC_ADJUST ((CORE_ADDR) |
| 1005 | read_memory_integer (frame->pc_addr, |
| 1006 | REGISTER_RAW_SIZE (PC_REGNUM))); |
| 1007 | else |
| 1008 | { |
| 1009 | /* I think this happens only in the innermost frame, if so then |
| 1010 | it is a complicated way of saying |
| 1011 | "pc = read_register (O7_REGNUM);". */ |
| 1012 | char buf[MAX_REGISTER_RAW_SIZE]; |
| 1013 | get_saved_register (buf, 0, 0, frame, O7_REGNUM, 0); |
| 1014 | pc = PC_ADJUST (extract_address |
| 1015 | (buf, REGISTER_RAW_SIZE (O7_REGNUM))); |
| 1016 | } |
| 1017 | |
| 1018 | write_register (PC_REGNUM, pc); |
| 1019 | write_register (NPC_REGNUM, pc + 4); |
| 1020 | } |
| 1021 | else if (fsr.regs[I7_REGNUM]) |
| 1022 | { |
| 1023 | /* Return address in %i7 -- adjust it, then restore PC and NPC from it */ |
| 1024 | pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr.regs[I7_REGNUM], |
| 1025 | SPARC_INTREG_SIZE)); |
| 1026 | write_register (PC_REGNUM, pc); |
| 1027 | write_register (NPC_REGNUM, pc + 4); |
| 1028 | } |
| 1029 | flush_cached_frames (); |
| 1030 | } |
| 1031 | |
| 1032 | /* On the Sun 4 under SunOS, the compile will leave a fake insn which |
| 1033 | encodes the structure size being returned. If we detect such |
| 1034 | a fake insn, step past it. */ |
| 1035 | |
| 1036 | CORE_ADDR |
| 1037 | sparc_pc_adjust(pc) |
| 1038 | CORE_ADDR pc; |
| 1039 | { |
| 1040 | unsigned long insn; |
| 1041 | char buf[4]; |
| 1042 | int err; |
| 1043 | |
| 1044 | err = target_read_memory (pc + 8, buf, sizeof(long)); |
| 1045 | insn = extract_unsigned_integer (buf, 4); |
| 1046 | if ((err == 0) && (insn & 0xffc00000) == 0) |
| 1047 | return pc+12; |
| 1048 | else |
| 1049 | return pc+8; |
| 1050 | } |
| 1051 | |
| 1052 | /* If pc is in a shared library trampoline, return its target. |
| 1053 | The SunOs 4.x linker rewrites the jump table entries for PIC |
| 1054 | compiled modules in the main executable to bypass the dynamic linker |
| 1055 | with jumps of the form |
| 1056 | sethi %hi(addr),%g1 |
| 1057 | jmp %g1+%lo(addr) |
| 1058 | and removes the corresponding jump table relocation entry in the |
| 1059 | dynamic relocations. |
| 1060 | find_solib_trampoline_target relies on the presence of the jump |
| 1061 | table relocation entry, so we have to detect these jump instructions |
| 1062 | by hand. */ |
| 1063 | |
| 1064 | CORE_ADDR |
| 1065 | sunos4_skip_trampoline_code (pc) |
| 1066 | CORE_ADDR pc; |
| 1067 | { |
| 1068 | unsigned long insn1; |
| 1069 | char buf[4]; |
| 1070 | int err; |
| 1071 | |
| 1072 | err = target_read_memory (pc, buf, 4); |
| 1073 | insn1 = extract_unsigned_integer (buf, 4); |
| 1074 | if (err == 0 && (insn1 & 0xffc00000) == 0x03000000) |
| 1075 | { |
| 1076 | unsigned long insn2; |
| 1077 | |
| 1078 | err = target_read_memory (pc + 4, buf, 4); |
| 1079 | insn2 = extract_unsigned_integer (buf, 4); |
| 1080 | if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000) |
| 1081 | { |
| 1082 | CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10; |
| 1083 | int delta = insn2 & 0x1fff; |
| 1084 | |
| 1085 | /* Sign extend the displacement. */ |
| 1086 | if (delta & 0x1000) |
| 1087 | delta |= ~0x1fff; |
| 1088 | return target_pc + delta; |
| 1089 | } |
| 1090 | } |
| 1091 | return find_solib_trampoline_target (pc); |
| 1092 | } |
| 1093 | \f |
| 1094 | #ifdef USE_PROC_FS /* Target dependent support for /proc */ |
| 1095 | |
| 1096 | /* The /proc interface divides the target machine's register set up into |
| 1097 | two different sets, the general register set (gregset) and the floating |
| 1098 | point register set (fpregset). For each set, there is an ioctl to get |
| 1099 | the current register set and another ioctl to set the current values. |
| 1100 | |
| 1101 | The actual structure passed through the ioctl interface is, of course, |
| 1102 | naturally machine dependent, and is different for each set of registers. |
| 1103 | For the sparc for example, the general register set is typically defined |
| 1104 | by: |
| 1105 | |
| 1106 | typedef int gregset_t[38]; |
| 1107 | |
| 1108 | #define R_G0 0 |
| 1109 | ... |
| 1110 | #define R_TBR 37 |
| 1111 | |
| 1112 | and the floating point set by: |
| 1113 | |
| 1114 | typedef struct prfpregset { |
| 1115 | union { |
| 1116 | u_long pr_regs[32]; |
| 1117 | double pr_dregs[16]; |
| 1118 | } pr_fr; |
| 1119 | void * pr_filler; |
| 1120 | u_long pr_fsr; |
| 1121 | u_char pr_qcnt; |
| 1122 | u_char pr_q_entrysize; |
| 1123 | u_char pr_en; |
| 1124 | u_long pr_q[64]; |
| 1125 | } prfpregset_t; |
| 1126 | |
| 1127 | These routines provide the packing and unpacking of gregset_t and |
| 1128 | fpregset_t formatted data. |
| 1129 | |
| 1130 | */ |
| 1131 | |
| 1132 | /* Given a pointer to a general register set in /proc format (gregset_t *), |
| 1133 | unpack the register contents and supply them as gdb's idea of the current |
| 1134 | register values. */ |
| 1135 | |
| 1136 | void |
| 1137 | supply_gregset (gregsetp) |
| 1138 | prgregset_t *gregsetp; |
| 1139 | { |
| 1140 | register int regi; |
| 1141 | register prgreg_t *regp = (prgreg_t *) gregsetp; |
| 1142 | static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0}; |
| 1143 | |
| 1144 | /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */ |
| 1145 | for (regi = G0_REGNUM ; regi <= I7_REGNUM ; regi++) |
| 1146 | { |
| 1147 | supply_register (regi, (char *) (regp + regi)); |
| 1148 | } |
| 1149 | |
| 1150 | /* These require a bit more care. */ |
| 1151 | supply_register (PS_REGNUM, (char *) (regp + R_PS)); |
| 1152 | supply_register (PC_REGNUM, (char *) (regp + R_PC)); |
| 1153 | supply_register (NPC_REGNUM,(char *) (regp + R_nPC)); |
| 1154 | supply_register (Y_REGNUM, (char *) (regp + R_Y)); |
| 1155 | |
| 1156 | /* Fill inaccessible registers with zero. */ |
| 1157 | supply_register (WIM_REGNUM, zerobuf); |
| 1158 | supply_register (TBR_REGNUM, zerobuf); |
| 1159 | supply_register (CPS_REGNUM, zerobuf); |
| 1160 | } |
| 1161 | |
| 1162 | void |
| 1163 | fill_gregset (gregsetp, regno) |
| 1164 | prgregset_t *gregsetp; |
| 1165 | int regno; |
| 1166 | { |
| 1167 | int regi; |
| 1168 | register prgreg_t *regp = (prgreg_t *) gregsetp; |
| 1169 | |
| 1170 | for (regi = 0 ; regi <= R_I7 ; regi++) |
| 1171 | { |
| 1172 | if ((regno == -1) || (regno == regi)) |
| 1173 | { |
| 1174 | *(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)]; |
| 1175 | } |
| 1176 | } |
| 1177 | if ((regno == -1) || (regno == PS_REGNUM)) |
| 1178 | { |
| 1179 | *(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)]; |
| 1180 | } |
| 1181 | if ((regno == -1) || (regno == PC_REGNUM)) |
| 1182 | { |
| 1183 | *(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)]; |
| 1184 | } |
| 1185 | if ((regno == -1) || (regno == NPC_REGNUM)) |
| 1186 | { |
| 1187 | *(regp + R_nPC) = *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)]; |
| 1188 | } |
| 1189 | if ((regno == -1) || (regno == Y_REGNUM)) |
| 1190 | { |
| 1191 | *(regp + R_Y) = *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)]; |
| 1192 | } |
| 1193 | } |
| 1194 | |
| 1195 | #if defined (FP0_REGNUM) |
| 1196 | |
| 1197 | /* Given a pointer to a floating point register set in /proc format |
| 1198 | (fpregset_t *), unpack the register contents and supply them as gdb's |
| 1199 | idea of the current floating point register values. */ |
| 1200 | |
| 1201 | void |
| 1202 | supply_fpregset (fpregsetp) |
| 1203 | prfpregset_t *fpregsetp; |
| 1204 | { |
| 1205 | register int regi; |
| 1206 | char *from; |
| 1207 | |
| 1208 | for (regi = FP0_REGNUM ; regi < FP0_REGNUM+32 ; regi++) |
| 1209 | { |
| 1210 | from = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; |
| 1211 | supply_register (regi, from); |
| 1212 | } |
| 1213 | supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr)); |
| 1214 | } |
| 1215 | |
| 1216 | /* Given a pointer to a floating point register set in /proc format |
| 1217 | (fpregset_t *), update the register specified by REGNO from gdb's idea |
| 1218 | of the current floating point register set. If REGNO is -1, update |
| 1219 | them all. */ |
| 1220 | /* ??? This will probably need some changes for sparc64. */ |
| 1221 | |
| 1222 | void |
| 1223 | fill_fpregset (fpregsetp, regno) |
| 1224 | prfpregset_t *fpregsetp; |
| 1225 | int regno; |
| 1226 | { |
| 1227 | int regi; |
| 1228 | char *to; |
| 1229 | char *from; |
| 1230 | |
| 1231 | /* ??? The 32 should probably be NUM_SPARC_FPREGS, but again we're |
| 1232 | waiting on what REGISTER_RAW_SIZE should be for fp regs. */ |
| 1233 | for (regi = FP0_REGNUM ; regi < FP0_REGNUM + 32 ; regi++) |
| 1234 | { |
| 1235 | if ((regno == -1) || (regno == regi)) |
| 1236 | { |
| 1237 | from = (char *) ®isters[REGISTER_BYTE (regi)]; |
| 1238 | to = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; |
| 1239 | memcpy (to, from, REGISTER_RAW_SIZE (regi)); |
| 1240 | } |
| 1241 | } |
| 1242 | if ((regno == -1) || (regno == FPS_REGNUM)) |
| 1243 | { |
| 1244 | fpregsetp->pr_fsr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)]; |
| 1245 | } |
| 1246 | } |
| 1247 | |
| 1248 | #endif /* defined (FP0_REGNUM) */ |
| 1249 | |
| 1250 | #endif /* USE_PROC_FS */ |
| 1251 | |
| 1252 | |
| 1253 | #ifdef GET_LONGJMP_TARGET |
| 1254 | |
| 1255 | /* Figure out where the longjmp will land. We expect that we have just entered |
| 1256 | longjmp and haven't yet setup the stack frame, so the args are still in the |
| 1257 | output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we |
| 1258 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. |
| 1259 | This routine returns true on success */ |
| 1260 | |
| 1261 | int |
| 1262 | get_longjmp_target (pc) |
| 1263 | CORE_ADDR *pc; |
| 1264 | { |
| 1265 | CORE_ADDR jb_addr; |
| 1266 | #define LONGJMP_TARGET_SIZE 4 |
| 1267 | char buf[LONGJMP_TARGET_SIZE]; |
| 1268 | |
| 1269 | jb_addr = read_register (O0_REGNUM); |
| 1270 | |
| 1271 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, |
| 1272 | LONGJMP_TARGET_SIZE)) |
| 1273 | return 0; |
| 1274 | |
| 1275 | *pc = extract_address (buf, LONGJMP_TARGET_SIZE); |
| 1276 | |
| 1277 | return 1; |
| 1278 | } |
| 1279 | #endif /* GET_LONGJMP_TARGET */ |
| 1280 | \f |
| 1281 | #ifdef STATIC_TRANSFORM_NAME |
| 1282 | /* SunPRO (3.0 at least), encodes the static variables. This is not |
| 1283 | related to C++ mangling, it is done for C too. */ |
| 1284 | |
| 1285 | char * |
| 1286 | sunpro_static_transform_name (name) |
| 1287 | char *name; |
| 1288 | { |
| 1289 | char *p; |
| 1290 | if (name[0] == '$') |
| 1291 | { |
| 1292 | /* For file-local statics there will be a dollar sign, a bunch |
| 1293 | of junk (the contents of which match a string given in the |
| 1294 | N_OPT), a period and the name. For function-local statics |
| 1295 | there will be a bunch of junk (which seems to change the |
| 1296 | second character from 'A' to 'B'), a period, the name of the |
| 1297 | function, and the name. So just skip everything before the |
| 1298 | last period. */ |
| 1299 | p = strrchr (name, '.'); |
| 1300 | if (p != NULL) |
| 1301 | name = p + 1; |
| 1302 | } |
| 1303 | return name; |
| 1304 | } |
| 1305 | #endif /* STATIC_TRANSFORM_NAME */ |
| 1306 | \f |
| 1307 | #ifdef GDB_TARGET_IS_SPARC64 |
| 1308 | |
| 1309 | /* Utilities for printing registers. |
| 1310 | Page numbers refer to the SPARC Architecture Manual. */ |
| 1311 | |
| 1312 | static void dump_ccreg PARAMS ((char *, int)); |
| 1313 | |
| 1314 | static void |
| 1315 | dump_ccreg (reg, val) |
| 1316 | char *reg; |
| 1317 | int val; |
| 1318 | { |
| 1319 | /* page 41 */ |
| 1320 | printf_unfiltered ("%s:%s,%s,%s,%s", reg, |
| 1321 | val & 8 ? "N" : "NN", |
| 1322 | val & 4 ? "Z" : "NZ", |
| 1323 | val & 2 ? "O" : "NO", |
| 1324 | val & 1 ? "C" : "NC" |
| 1325 | ); |
| 1326 | } |
| 1327 | |
| 1328 | static char * |
| 1329 | decode_asi (val) |
| 1330 | int val; |
| 1331 | { |
| 1332 | /* page 72 */ |
| 1333 | switch (val) |
| 1334 | { |
| 1335 | case 4 : return "ASI_NUCLEUS"; |
| 1336 | case 0x0c : return "ASI_NUCLEUS_LITTLE"; |
| 1337 | case 0x10 : return "ASI_AS_IF_USER_PRIMARY"; |
| 1338 | case 0x11 : return "ASI_AS_IF_USER_SECONDARY"; |
| 1339 | case 0x18 : return "ASI_AS_IF_USER_PRIMARY_LITTLE"; |
| 1340 | case 0x19 : return "ASI_AS_IF_USER_SECONDARY_LITTLE"; |
| 1341 | case 0x80 : return "ASI_PRIMARY"; |
| 1342 | case 0x81 : return "ASI_SECONDARY"; |
| 1343 | case 0x82 : return "ASI_PRIMARY_NOFAULT"; |
| 1344 | case 0x83 : return "ASI_SECONDARY_NOFAULT"; |
| 1345 | case 0x88 : return "ASI_PRIMARY_LITTLE"; |
| 1346 | case 0x89 : return "ASI_SECONDARY_LITTLE"; |
| 1347 | case 0x8a : return "ASI_PRIMARY_NOFAULT_LITTLE"; |
| 1348 | case 0x8b : return "ASI_SECONDARY_NOFAULT_LITTLE"; |
| 1349 | default : return NULL; |
| 1350 | } |
| 1351 | } |
| 1352 | |
| 1353 | /* PRINT_REGISTER_HOOK routine. |
| 1354 | Pretty print various registers. */ |
| 1355 | /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */ |
| 1356 | |
| 1357 | void |
| 1358 | sparc_print_register_hook (regno) |
| 1359 | int regno; |
| 1360 | { |
| 1361 | unsigned LONGEST val; |
| 1362 | |
| 1363 | if (((unsigned) (regno) - FP0_REGNUM < FP_MAX_REGNUM - FP0_REGNUM) |
| 1364 | && ((regno) & 1) == 0) |
| 1365 | { |
| 1366 | char doublereg[8]; /* two float regs */ |
| 1367 | if (!read_relative_register_raw_bytes ((regno), doublereg)) |
| 1368 | { |
| 1369 | printf_unfiltered("\t"); |
| 1370 | print_floating (doublereg, builtin_type_double, gdb_stdout); |
| 1371 | } |
| 1372 | return; |
| 1373 | } |
| 1374 | |
| 1375 | /* FIXME: Some of these are priviledged registers. |
| 1376 | Not sure how they should be handled. */ |
| 1377 | |
| 1378 | #define BITS(n, mask) ((int) (((val) >> (n)) & (mask))) |
| 1379 | |
| 1380 | val = read_register (regno); |
| 1381 | |
| 1382 | /* pages 40 - 60 */ |
| 1383 | switch (regno) |
| 1384 | { |
| 1385 | case CCR_REGNUM : |
| 1386 | printf_unfiltered("\t"); |
| 1387 | dump_ccreg ("xcc", val >> 4); |
| 1388 | printf_unfiltered(", "); |
| 1389 | dump_ccreg ("icc", val & 15); |
| 1390 | break; |
| 1391 | case FPRS_REGNUM : |
| 1392 | printf ("\tfef:%d, du:%d, dl:%d", |
| 1393 | BITS (2, 1), BITS (1, 1), BITS (0, 1)); |
| 1394 | break; |
| 1395 | case FSR_REGNUM : |
| 1396 | { |
| 1397 | static char *fcc[4] = { "=", "<", ">", "?" }; |
| 1398 | static char *rd[4] = { "N", "0", "+", "-" }; |
| 1399 | /* Long, yes, but I'd rather leave it as is and use a wide screen. */ |
| 1400 | printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d", |
| 1401 | fcc[BITS (10, 3)], fcc[BITS (32, 3)], |
| 1402 | fcc[BITS (34, 3)], fcc[BITS (36, 3)], |
| 1403 | rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7), |
| 1404 | BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31)); |
| 1405 | break; |
| 1406 | } |
| 1407 | case ASI_REGNUM : |
| 1408 | { |
| 1409 | char *asi = decode_asi (val); |
| 1410 | if (asi != NULL) |
| 1411 | printf ("\t%s", asi); |
| 1412 | break; |
| 1413 | } |
| 1414 | case VER_REGNUM : |
| 1415 | printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d", |
| 1416 | BITS (48, 0xffff), BITS (32, 0xffff), |
| 1417 | BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31)); |
| 1418 | break; |
| 1419 | case PSTATE_REGNUM : |
| 1420 | { |
| 1421 | static char *mm[4] = { "tso", "pso", "rso", "?" }; |
| 1422 | printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d", |
| 1423 | BITS (9, 1), BITS (8, 1), mm[BITS (6, 3)], BITS (5, 1), |
| 1424 | BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1), |
| 1425 | BITS (0, 1)); |
| 1426 | break; |
| 1427 | } |
| 1428 | case TSTATE_REGNUM : |
| 1429 | /* FIXME: print all 4? */ |
| 1430 | break; |
| 1431 | case TT_REGNUM : |
| 1432 | /* FIXME: print all 4? */ |
| 1433 | break; |
| 1434 | case TPC_REGNUM : |
| 1435 | /* FIXME: print all 4? */ |
| 1436 | break; |
| 1437 | case TNPC_REGNUM : |
| 1438 | /* FIXME: print all 4? */ |
| 1439 | break; |
| 1440 | case WSTATE_REGNUM : |
| 1441 | printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7)); |
| 1442 | break; |
| 1443 | case CWP_REGNUM : |
| 1444 | printf ("\t%d", BITS (0, 31)); |
| 1445 | break; |
| 1446 | case CANSAVE_REGNUM : |
| 1447 | printf ("\t%-2d before spill", BITS (0, 31)); |
| 1448 | break; |
| 1449 | case CANRESTORE_REGNUM : |
| 1450 | printf ("\t%-2d before fill", BITS (0, 31)); |
| 1451 | break; |
| 1452 | case CLEANWIN_REGNUM : |
| 1453 | printf ("\t%-2d before clean", BITS (0, 31)); |
| 1454 | break; |
| 1455 | case OTHERWIN_REGNUM : |
| 1456 | printf ("\t%d", BITS (0, 31)); |
| 1457 | break; |
| 1458 | } |
| 1459 | |
| 1460 | #undef BITS |
| 1461 | } |
| 1462 | |
| 1463 | #endif |
| 1464 | \f |
| 1465 | void |
| 1466 | _initialize_sparc_tdep () |
| 1467 | { |
| 1468 | tm_print_insn = print_insn_sparc; |
| 1469 | } |