| 1 | /* Target-dependent code for the x86-64 for GDB, the GNU debugger. |
| 2 | |
| 3 | Copyright 2001, 2002 Free Software Foundation, Inc. |
| 4 | |
| 5 | Contributed by Jiri Smid, SuSE Labs. |
| 6 | |
| 7 | This file is part of GDB. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 2 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program; if not, write to the Free Software |
| 21 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 22 | Boston, MA 02111-1307, USA. */ |
| 23 | |
| 24 | #include "defs.h" |
| 25 | #include "inferior.h" |
| 26 | #include "gdbcore.h" |
| 27 | #include "gdbcmd.h" |
| 28 | #include "arch-utils.h" |
| 29 | #include "regcache.h" |
| 30 | #include "symfile.h" |
| 31 | #include "x86-64-tdep.h" |
| 32 | #include "dwarf2cfi.h" |
| 33 | #include "gdb_assert.h" |
| 34 | |
| 35 | /* Register numbers of various important registers. */ |
| 36 | #define RAX_REGNUM 0 |
| 37 | #define RDX_REGNUM 3 |
| 38 | #define RDI_REGNUM 5 |
| 39 | #define EFLAGS_REGNUM 17 |
| 40 | #define ST0_REGNUM 22 |
| 41 | #define XMM1_REGNUM 39 |
| 42 | |
| 43 | struct register_info |
| 44 | { |
| 45 | int size; |
| 46 | char *name; |
| 47 | struct type **type; |
| 48 | }; |
| 49 | |
| 50 | /* x86_64_register_raw_size_table[i] is the number of bytes of storage in |
| 51 | GDB's register array occupied by register i. */ |
| 52 | static struct register_info x86_64_register_info_table[] = { |
| 53 | /* 0 */ {8, "rax", &builtin_type_int64}, |
| 54 | /* 1 */ {8, "rbx", &builtin_type_int64}, |
| 55 | /* 2 */ {8, "rcx", &builtin_type_int64}, |
| 56 | /* 3 */ {8, "rdx", &builtin_type_int64}, |
| 57 | /* 4 */ {8, "rsi", &builtin_type_int64}, |
| 58 | /* 5 */ {8, "rdi", &builtin_type_int64}, |
| 59 | /* 6 */ {8, "rbp", &builtin_type_void_func_ptr}, |
| 60 | /* 7 */ {8, "rsp", &builtin_type_void_func_ptr}, |
| 61 | /* 8 */ {8, "r8", &builtin_type_int64}, |
| 62 | /* 9 */ {8, "r9", &builtin_type_int64}, |
| 63 | /* 10 */ {8, "r10", &builtin_type_int64}, |
| 64 | /* 11 */ {8, "r11", &builtin_type_int64}, |
| 65 | /* 12 */ {8, "r12", &builtin_type_int64}, |
| 66 | /* 13 */ {8, "r13", &builtin_type_int64}, |
| 67 | /* 14 */ {8, "r14", &builtin_type_int64}, |
| 68 | /* 15 */ {8, "r15", &builtin_type_int64}, |
| 69 | /* 16 */ {8, "rip", &builtin_type_void_func_ptr}, |
| 70 | /* 17 */ {4, "eflags", &builtin_type_int32}, |
| 71 | /* 18 */ {4, "ds", &builtin_type_int32}, |
| 72 | /* 19 */ {4, "es", &builtin_type_int32}, |
| 73 | /* 20 */ {4, "fs", &builtin_type_int32}, |
| 74 | /* 21 */ {4, "gs", &builtin_type_int32}, |
| 75 | /* 22 */ {10, "st0", &builtin_type_i387_ext}, |
| 76 | /* 23 */ {10, "st1", &builtin_type_i387_ext}, |
| 77 | /* 24 */ {10, "st2", &builtin_type_i387_ext}, |
| 78 | /* 25 */ {10, "st3", &builtin_type_i387_ext}, |
| 79 | /* 26 */ {10, "st4", &builtin_type_i387_ext}, |
| 80 | /* 27 */ {10, "st5", &builtin_type_i387_ext}, |
| 81 | /* 28 */ {10, "st6", &builtin_type_i387_ext}, |
| 82 | /* 29 */ {10, "st7", &builtin_type_i387_ext}, |
| 83 | /* 30 */ {4, "fctrl", &builtin_type_int32}, |
| 84 | /* 31 */ {4, "fstat", &builtin_type_int32}, |
| 85 | /* 32 */ {4, "ftag", &builtin_type_int32}, |
| 86 | /* 33 */ {4, "fiseg", &builtin_type_int32}, |
| 87 | /* 34 */ {4, "fioff", &builtin_type_int32}, |
| 88 | /* 35 */ {4, "foseg", &builtin_type_int32}, |
| 89 | /* 36 */ {4, "fooff", &builtin_type_int32}, |
| 90 | /* 37 */ {4, "fop", &builtin_type_int32}, |
| 91 | /* 38 */ {16, "xmm0", &builtin_type_v4sf}, |
| 92 | /* 39 */ {16, "xmm1", &builtin_type_v4sf}, |
| 93 | /* 40 */ {16, "xmm2", &builtin_type_v4sf}, |
| 94 | /* 41 */ {16, "xmm3", &builtin_type_v4sf}, |
| 95 | /* 42 */ {16, "xmm4", &builtin_type_v4sf}, |
| 96 | /* 43 */ {16, "xmm5", &builtin_type_v4sf}, |
| 97 | /* 44 */ {16, "xmm6", &builtin_type_v4sf}, |
| 98 | /* 45 */ {16, "xmm7", &builtin_type_v4sf}, |
| 99 | /* 46 */ {16, "xmm8", &builtin_type_v4sf}, |
| 100 | /* 47 */ {16, "xmm9", &builtin_type_v4sf}, |
| 101 | /* 48 */ {16, "xmm10", &builtin_type_v4sf}, |
| 102 | /* 49 */ {16, "xmm11", &builtin_type_v4sf}, |
| 103 | /* 50 */ {16, "xmm12", &builtin_type_v4sf}, |
| 104 | /* 51 */ {16, "xmm13", &builtin_type_v4sf}, |
| 105 | /* 52 */ {16, "xmm14", &builtin_type_v4sf}, |
| 106 | /* 53 */ {16, "xmm15", &builtin_type_v4sf}, |
| 107 | /* 54 */ {4, "mxcsr", &builtin_type_int32} |
| 108 | }; |
| 109 | |
| 110 | /* This array is a mapping from Dwarf-2 register |
| 111 | numbering to GDB's one. Dwarf-2 numbering is |
| 112 | defined in x86-64 ABI, section 3.6. */ |
| 113 | static int x86_64_dwarf2gdb_regno_map[] = { |
| 114 | 0, 1, 2, 3, /* RAX - RDX */ |
| 115 | 4, 5, 6, 7, /* RSI, RDI, RBP, RSP */ |
| 116 | 8, 9, 10, 11, /* R8 - R11 */ |
| 117 | 12, 13, 14, 15, /* R12 - R15 */ |
| 118 | -1, /* RA - not mapped */ |
| 119 | XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */ |
| 120 | XMM1_REGNUM + 1, XMM1_REGNUM + 2, |
| 121 | XMM1_REGNUM + 3, XMM1_REGNUM + 4, |
| 122 | XMM1_REGNUM + 5, XMM1_REGNUM + 6, |
| 123 | XMM1_REGNUM + 7, XMM1_REGNUM + 8, |
| 124 | XMM1_REGNUM + 9, XMM1_REGNUM + 10, |
| 125 | XMM1_REGNUM + 11, XMM1_REGNUM + 12, |
| 126 | XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */ |
| 127 | ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */ |
| 128 | ST0_REGNUM + 2, ST0_REGNUM + 3, |
| 129 | ST0_REGNUM + 4, ST0_REGNUM + 5, |
| 130 | ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */ |
| 131 | }; |
| 132 | |
| 133 | static int x86_64_dwarf2gdb_regno_map_length = |
| 134 | sizeof (x86_64_dwarf2gdb_regno_map) / |
| 135 | sizeof (x86_64_dwarf2gdb_regno_map[0]); |
| 136 | |
| 137 | /* Number of all registers */ |
| 138 | #define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \ |
| 139 | sizeof (x86_64_register_info_table[0])) |
| 140 | |
| 141 | /* Number of general registers. */ |
| 142 | #define X86_64_NUM_GREGS (22) |
| 143 | |
| 144 | int x86_64_num_regs = X86_64_NUM_REGS; |
| 145 | int x86_64_num_gregs = X86_64_NUM_GREGS; |
| 146 | |
| 147 | /* Did we already print a note about frame pointer? */ |
| 148 | int omit_fp_note_printed = 0; |
| 149 | |
| 150 | /* Number of bytes of storage in the actual machine representation for |
| 151 | register REGNO. */ |
| 152 | int |
| 153 | x86_64_register_raw_size (int regno) |
| 154 | { |
| 155 | return x86_64_register_info_table[regno].size; |
| 156 | } |
| 157 | |
| 158 | /* x86_64_register_byte_table[i] is the offset into the register file of the |
| 159 | start of register number i. We initialize this from |
| 160 | x86_64_register_info_table. */ |
| 161 | int x86_64_register_byte_table[X86_64_NUM_REGS]; |
| 162 | |
| 163 | /* Index within `registers' of the first byte of the space for register REGNO. */ |
| 164 | int |
| 165 | x86_64_register_byte (int regno) |
| 166 | { |
| 167 | return x86_64_register_byte_table[regno]; |
| 168 | } |
| 169 | |
| 170 | /* Return the GDB type object for the "standard" data type of data in |
| 171 | register N. */ |
| 172 | static struct type * |
| 173 | x86_64_register_virtual_type (int regno) |
| 174 | { |
| 175 | return *x86_64_register_info_table[regno].type; |
| 176 | } |
| 177 | |
| 178 | /* x86_64_register_convertible is true if register N's virtual format is |
| 179 | different from its raw format. Note that this definition assumes |
| 180 | that the host supports IEEE 32-bit floats, since it doesn't say |
| 181 | that SSE registers need conversion. Even if we can't find a |
| 182 | counterexample, this is still sloppy. */ |
| 183 | int |
| 184 | x86_64_register_convertible (int regno) |
| 185 | { |
| 186 | return IS_FP_REGNUM (regno); |
| 187 | } |
| 188 | |
| 189 | /* Convert data from raw format for register REGNUM in buffer FROM to |
| 190 | virtual format with type TYPE in buffer TO. In principle both |
| 191 | formats are identical except that the virtual format has two extra |
| 192 | bytes appended that aren't used. We set these to zero. */ |
| 193 | void |
| 194 | x86_64_register_convert_to_virtual (int regnum, struct type *type, |
| 195 | char *from, char *to) |
| 196 | { |
| 197 | char buf[12]; |
| 198 | |
| 199 | /* We only support floating-point values. */ |
| 200 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
| 201 | { |
| 202 | warning ("Cannot convert floating-point register value " |
| 203 | "to non-floating-point type."); |
| 204 | memset (to, 0, TYPE_LENGTH (type)); |
| 205 | return; |
| 206 | } |
| 207 | /* First add the necessary padding. */ |
| 208 | memcpy (buf, from, FPU_REG_RAW_SIZE); |
| 209 | memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE); |
| 210 | /* Convert to TYPE. This should be a no-op, if TYPE is equivalent |
| 211 | to the extended floating-point format used by the FPU. */ |
| 212 | convert_typed_floating (to, type, buf, |
| 213 | x86_64_register_virtual_type (regnum)); |
| 214 | } |
| 215 | |
| 216 | /* Convert data from virtual format with type TYPE in buffer FROM to |
| 217 | raw format for register REGNUM in buffer TO. Simply omit the two |
| 218 | unused bytes. */ |
| 219 | |
| 220 | void |
| 221 | x86_64_register_convert_to_raw (struct type *type, int regnum, |
| 222 | char *from, char *to) |
| 223 | { |
| 224 | gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12); |
| 225 | /* Simply omit the two unused bytes. */ |
| 226 | memcpy (to, from, FPU_REG_RAW_SIZE); |
| 227 | } |
| 228 | |
| 229 | /* Dwarf-2 <-> GDB register numbers mapping. */ |
| 230 | int |
| 231 | x86_64_dwarf2_reg_to_regnum (int dw_reg) |
| 232 | { |
| 233 | if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length) |
| 234 | { |
| 235 | warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg); |
| 236 | return dw_reg; |
| 237 | } |
| 238 | |
| 239 | return x86_64_dwarf2gdb_regno_map[dw_reg]; |
| 240 | } |
| 241 | |
| 242 | /* This is the variable that is set with "set disassembly-flavour", and |
| 243 | its legitimate values. */ |
| 244 | static const char att_flavour[] = "att"; |
| 245 | static const char intel_flavour[] = "intel"; |
| 246 | static const char *valid_flavours[] = { |
| 247 | att_flavour, |
| 248 | intel_flavour, |
| 249 | NULL |
| 250 | }; |
| 251 | static const char *disassembly_flavour = att_flavour; |
| 252 | |
| 253 | static CORE_ADDR |
| 254 | x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
| 255 | { |
| 256 | char buf[8]; |
| 257 | |
| 258 | store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ()); |
| 259 | |
| 260 | write_memory (sp - 8, buf, 8); |
| 261 | return sp - 8; |
| 262 | } |
| 263 | |
| 264 | void |
| 265 | x86_64_pop_frame (void) |
| 266 | { |
| 267 | generic_pop_current_frame (cfi_pop_frame); |
| 268 | } |
| 269 | \f |
| 270 | |
| 271 | /* The returning of values is done according to the special algorithm. |
| 272 | Some types are returned in registers an some (big structures) in memory. |
| 273 | See ABI for details. |
| 274 | */ |
| 275 | |
| 276 | #define MAX_CLASSES 4 |
| 277 | |
| 278 | enum x86_64_reg_class |
| 279 | { |
| 280 | X86_64_NO_CLASS, |
| 281 | X86_64_INTEGER_CLASS, |
| 282 | X86_64_INTEGERSI_CLASS, |
| 283 | X86_64_SSE_CLASS, |
| 284 | X86_64_SSESF_CLASS, |
| 285 | X86_64_SSEDF_CLASS, |
| 286 | X86_64_SSEUP_CLASS, |
| 287 | X86_64_X87_CLASS, |
| 288 | X86_64_X87UP_CLASS, |
| 289 | X86_64_MEMORY_CLASS |
| 290 | }; |
| 291 | |
| 292 | /* Return the union class of CLASS1 and CLASS2. |
| 293 | See the x86-64 ABI for details. */ |
| 294 | |
| 295 | static enum x86_64_reg_class |
| 296 | merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2) |
| 297 | { |
| 298 | /* Rule #1: If both classes are equal, this is the resulting class. */ |
| 299 | if (class1 == class2) |
| 300 | return class1; |
| 301 | |
| 302 | /* Rule #2: If one of the classes is NO_CLASS, the resulting class is |
| 303 | the other class. */ |
| 304 | if (class1 == X86_64_NO_CLASS) |
| 305 | return class2; |
| 306 | if (class2 == X86_64_NO_CLASS) |
| 307 | return class1; |
| 308 | |
| 309 | /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */ |
| 310 | if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS) |
| 311 | return X86_64_MEMORY_CLASS; |
| 312 | |
| 313 | /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */ |
| 314 | if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS) |
| 315 | || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS)) |
| 316 | return X86_64_INTEGERSI_CLASS; |
| 317 | if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS |
| 318 | || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS) |
| 319 | return X86_64_INTEGER_CLASS; |
| 320 | |
| 321 | /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */ |
| 322 | if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS |
| 323 | || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS) |
| 324 | return X86_64_MEMORY_CLASS; |
| 325 | |
| 326 | /* Rule #6: Otherwise class SSE is used. */ |
| 327 | return X86_64_SSE_CLASS; |
| 328 | } |
| 329 | |
| 330 | |
| 331 | /* Classify the argument type. |
| 332 | CLASSES will be filled by the register class used to pass each word |
| 333 | of the operand. The number of words is returned. In case the parameter |
| 334 | should be passed in memory, 0 is returned. As a special case for zero |
| 335 | sized containers, classes[0] will be NO_CLASS and 1 is returned. |
| 336 | |
| 337 | See the x86-64 PS ABI for details. |
| 338 | */ |
| 339 | |
| 340 | static int |
| 341 | classify_argument (struct type *type, |
| 342 | enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset) |
| 343 | { |
| 344 | int bytes = TYPE_LENGTH (type); |
| 345 | int words = (bytes + 8 - 1) / 8; |
| 346 | |
| 347 | switch (TYPE_CODE (type)) |
| 348 | { |
| 349 | case TYPE_CODE_ARRAY: |
| 350 | case TYPE_CODE_STRUCT: |
| 351 | case TYPE_CODE_UNION: |
| 352 | { |
| 353 | int i; |
| 354 | enum x86_64_reg_class subclasses[MAX_CLASSES]; |
| 355 | |
| 356 | /* On x86-64 we pass structures larger than 16 bytes on the stack. */ |
| 357 | if (bytes > 16) |
| 358 | return 0; |
| 359 | |
| 360 | for (i = 0; i < words; i++) |
| 361 | classes[i] = X86_64_NO_CLASS; |
| 362 | |
| 363 | /* Zero sized arrays or structures are NO_CLASS. We return 0 to |
| 364 | signalize memory class, so handle it as special case. */ |
| 365 | if (!words) |
| 366 | { |
| 367 | classes[0] = X86_64_NO_CLASS; |
| 368 | return 1; |
| 369 | } |
| 370 | switch (TYPE_CODE (type)) |
| 371 | { |
| 372 | case TYPE_CODE_STRUCT: |
| 373 | { |
| 374 | int j; |
| 375 | for (j = 0; j < TYPE_NFIELDS (type); ++j) |
| 376 | { |
| 377 | int num = classify_argument (TYPE_FIELDS (type)[j].type, |
| 378 | subclasses, |
| 379 | (TYPE_FIELDS (type)[j].loc.bitpos |
| 380 | + bit_offset) % 256); |
| 381 | if (!num) |
| 382 | return 0; |
| 383 | for (i = 0; i < num; i++) |
| 384 | { |
| 385 | int pos = |
| 386 | (TYPE_FIELDS (type)[j].loc.bitpos + bit_offset) / 8 / 8; |
| 387 | classes[i + pos] = |
| 388 | merge_classes (subclasses[i], classes[i + pos]); |
| 389 | } |
| 390 | } |
| 391 | } |
| 392 | break; |
| 393 | case TYPE_CODE_ARRAY: |
| 394 | { |
| 395 | int num; |
| 396 | |
| 397 | num = classify_argument (TYPE_TARGET_TYPE (type), |
| 398 | subclasses, bit_offset); |
| 399 | if (!num) |
| 400 | return 0; |
| 401 | |
| 402 | /* The partial classes are now full classes. */ |
| 403 | if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4) |
| 404 | subclasses[0] = X86_64_SSE_CLASS; |
| 405 | if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4) |
| 406 | subclasses[0] = X86_64_INTEGER_CLASS; |
| 407 | |
| 408 | for (i = 0; i < words; i++) |
| 409 | classes[i] = subclasses[i % num]; |
| 410 | } |
| 411 | break; |
| 412 | case TYPE_CODE_UNION: |
| 413 | { |
| 414 | int j; |
| 415 | { |
| 416 | for (j = 0; j < TYPE_NFIELDS (type); ++j) |
| 417 | { |
| 418 | int num; |
| 419 | num = classify_argument (TYPE_FIELDS (type)[j].type, |
| 420 | subclasses, bit_offset); |
| 421 | if (!num) |
| 422 | return 0; |
| 423 | for (i = 0; i < num; i++) |
| 424 | classes[i] = merge_classes (subclasses[i], classes[i]); |
| 425 | } |
| 426 | } |
| 427 | } |
| 428 | break; |
| 429 | default: |
| 430 | break; |
| 431 | } |
| 432 | /* Final merger cleanup. */ |
| 433 | for (i = 0; i < words; i++) |
| 434 | { |
| 435 | /* If one class is MEMORY, everything should be passed in |
| 436 | memory. */ |
| 437 | if (classes[i] == X86_64_MEMORY_CLASS) |
| 438 | return 0; |
| 439 | |
| 440 | /* The X86_64_SSEUP_CLASS should be always preceeded by |
| 441 | X86_64_SSE_CLASS. */ |
| 442 | if (classes[i] == X86_64_SSEUP_CLASS |
| 443 | && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS)) |
| 444 | classes[i] = X86_64_SSE_CLASS; |
| 445 | |
| 446 | /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */ |
| 447 | if (classes[i] == X86_64_X87UP_CLASS |
| 448 | && (i == 0 || classes[i - 1] != X86_64_X87_CLASS)) |
| 449 | classes[i] = X86_64_SSE_CLASS; |
| 450 | } |
| 451 | return words; |
| 452 | } |
| 453 | break; |
| 454 | case TYPE_CODE_FLT: |
| 455 | switch (bytes) |
| 456 | { |
| 457 | case 4: |
| 458 | if (!(bit_offset % 64)) |
| 459 | classes[0] = X86_64_SSESF_CLASS; |
| 460 | else |
| 461 | classes[0] = X86_64_SSE_CLASS; |
| 462 | return 1; |
| 463 | case 8: |
| 464 | classes[0] = X86_64_SSEDF_CLASS; |
| 465 | return 1; |
| 466 | case 16: |
| 467 | classes[0] = X86_64_X87_CLASS; |
| 468 | classes[1] = X86_64_X87UP_CLASS; |
| 469 | return 2; |
| 470 | } |
| 471 | break; |
| 472 | case TYPE_CODE_INT: |
| 473 | case TYPE_CODE_PTR: |
| 474 | switch (bytes) |
| 475 | { |
| 476 | case 1: |
| 477 | case 2: |
| 478 | case 4: |
| 479 | case 8: |
| 480 | if (bytes * 8 + bit_offset <= 32) |
| 481 | classes[0] = X86_64_INTEGERSI_CLASS; |
| 482 | else |
| 483 | classes[0] = X86_64_INTEGER_CLASS; |
| 484 | return 1; |
| 485 | case 16: |
| 486 | classes[0] = classes[1] = X86_64_INTEGER_CLASS; |
| 487 | return 2; |
| 488 | default: |
| 489 | break; |
| 490 | } |
| 491 | case TYPE_CODE_VOID: |
| 492 | return 0; |
| 493 | default: /* Avoid warning. */ |
| 494 | break; |
| 495 | } |
| 496 | internal_error (__FILE__, __LINE__, |
| 497 | "classify_argument: unknown argument type"); |
| 498 | } |
| 499 | |
| 500 | /* Examine the argument and return set number of register required in each |
| 501 | class. Return 0 ifif parameter should be passed in memory. */ |
| 502 | |
| 503 | static int |
| 504 | examine_argument (enum x86_64_reg_class classes[MAX_CLASSES], |
| 505 | int n, int *int_nregs, int *sse_nregs) |
| 506 | { |
| 507 | *int_nregs = 0; |
| 508 | *sse_nregs = 0; |
| 509 | if (!n) |
| 510 | return 0; |
| 511 | for (n--; n >= 0; n--) |
| 512 | switch (classes[n]) |
| 513 | { |
| 514 | case X86_64_INTEGER_CLASS: |
| 515 | case X86_64_INTEGERSI_CLASS: |
| 516 | (*int_nregs)++; |
| 517 | break; |
| 518 | case X86_64_SSE_CLASS: |
| 519 | case X86_64_SSESF_CLASS: |
| 520 | case X86_64_SSEDF_CLASS: |
| 521 | (*sse_nregs)++; |
| 522 | break; |
| 523 | case X86_64_NO_CLASS: |
| 524 | case X86_64_SSEUP_CLASS: |
| 525 | case X86_64_X87_CLASS: |
| 526 | case X86_64_X87UP_CLASS: |
| 527 | break; |
| 528 | case X86_64_MEMORY_CLASS: |
| 529 | internal_error (__FILE__, __LINE__, |
| 530 | "examine_argument: unexpected memory class"); |
| 531 | } |
| 532 | return 1; |
| 533 | } |
| 534 | |
| 535 | #define RET_INT_REGS 2 |
| 536 | #define RET_SSE_REGS 2 |
| 537 | |
| 538 | /* Check if the structure in value_type is returned in registers or in |
| 539 | memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and |
| 540 | EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE |
| 541 | will be used. */ |
| 542 | int |
| 543 | x86_64_use_struct_convention (int gcc_p, struct type *value_type) |
| 544 | { |
| 545 | enum x86_64_reg_class class[MAX_CLASSES]; |
| 546 | int n = classify_argument (value_type, class, 0); |
| 547 | int needed_intregs; |
| 548 | int needed_sseregs; |
| 549 | |
| 550 | return (!n || |
| 551 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || |
| 552 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS); |
| 553 | } |
| 554 | |
| 555 | |
| 556 | /* Extract from an array REGBUF containing the (raw) register state, a |
| 557 | function return value of TYPE, and copy that, in virtual format, |
| 558 | into VALBUF. */ |
| 559 | |
| 560 | void |
| 561 | x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
| 562 | { |
| 563 | enum x86_64_reg_class class[MAX_CLASSES]; |
| 564 | int n = classify_argument (type, class, 0); |
| 565 | int needed_intregs; |
| 566 | int needed_sseregs; |
| 567 | int intreg = 0; |
| 568 | int ssereg = 0; |
| 569 | int offset = 0; |
| 570 | int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM }; |
| 571 | int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM }; |
| 572 | |
| 573 | if (!n || |
| 574 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || |
| 575 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS) |
| 576 | { /* memory class */ |
| 577 | CORE_ADDR addr; |
| 578 | memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM)); |
| 579 | read_memory (addr, valbuf, TYPE_LENGTH (type)); |
| 580 | return; |
| 581 | } |
| 582 | else |
| 583 | { |
| 584 | int i; |
| 585 | for (i = 0; i < n; i++) |
| 586 | { |
| 587 | switch (class[i]) |
| 588 | { |
| 589 | case X86_64_NO_CLASS: |
| 590 | break; |
| 591 | case X86_64_INTEGER_CLASS: |
| 592 | memcpy (valbuf + offset, |
| 593 | regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]), |
| 594 | 8); |
| 595 | offset += 8; |
| 596 | intreg += 2; |
| 597 | break; |
| 598 | case X86_64_INTEGERSI_CLASS: |
| 599 | memcpy (valbuf + offset, |
| 600 | regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4); |
| 601 | offset += 8; |
| 602 | intreg++; |
| 603 | break; |
| 604 | case X86_64_SSEDF_CLASS: |
| 605 | case X86_64_SSESF_CLASS: |
| 606 | case X86_64_SSE_CLASS: |
| 607 | memcpy (valbuf + offset, |
| 608 | regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]), |
| 609 | 8); |
| 610 | offset += 8; |
| 611 | ssereg += 2; |
| 612 | break; |
| 613 | case X86_64_SSEUP_CLASS: |
| 614 | memcpy (valbuf + offset + 8, |
| 615 | regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8); |
| 616 | offset += 8; |
| 617 | ssereg++; |
| 618 | break; |
| 619 | case X86_64_X87_CLASS: |
| 620 | memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM), |
| 621 | 8); |
| 622 | offset += 8; |
| 623 | break; |
| 624 | case X86_64_X87UP_CLASS: |
| 625 | memcpy (valbuf + offset, |
| 626 | regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8); |
| 627 | offset += 8; |
| 628 | break; |
| 629 | case X86_64_MEMORY_CLASS: |
| 630 | default: |
| 631 | internal_error (__FILE__, __LINE__, |
| 632 | "Unexpected argument class"); |
| 633 | } |
| 634 | } |
| 635 | } |
| 636 | } |
| 637 | |
| 638 | /* Handled by unwind informations. */ |
| 639 | static void |
| 640 | x86_64_frame_init_saved_regs (struct frame_info *fi) |
| 641 | { |
| 642 | } |
| 643 | |
| 644 | #define INT_REGS 6 |
| 645 | #define SSE_REGS 16 |
| 646 | |
| 647 | CORE_ADDR |
| 648 | x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
| 649 | int struct_return, CORE_ADDR struct_addr) |
| 650 | { |
| 651 | int intreg = 0; |
| 652 | int ssereg = 0; |
| 653 | int i; |
| 654 | static int int_parameter_registers[INT_REGS] = { |
| 655 | 5 /* RDI */ , 4 /* RSI */ , |
| 656 | 3 /* RDX */ , 2 /* RCX */ , |
| 657 | 8 /* R8 */ , 9 /* R9 */ |
| 658 | }; |
| 659 | /* XMM0 - XMM15 */ |
| 660 | static int sse_parameter_registers[SSE_REGS] = { |
| 661 | XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2, |
| 662 | XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6, |
| 663 | XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10, |
| 664 | XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14 |
| 665 | }; |
| 666 | int stack_values_count = 0; |
| 667 | int *stack_values; |
| 668 | stack_values = alloca (nargs * sizeof (int)); |
| 669 | for (i = 0; i < nargs; i++) |
| 670 | { |
| 671 | enum x86_64_reg_class class[MAX_CLASSES]; |
| 672 | int n = classify_argument (args[i]->type, class, 0); |
| 673 | int needed_intregs; |
| 674 | int needed_sseregs; |
| 675 | |
| 676 | if (!n || |
| 677 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) |
| 678 | || intreg / 2 + needed_intregs > INT_REGS |
| 679 | || ssereg / 2 + needed_sseregs > SSE_REGS) |
| 680 | { /* memory class */ |
| 681 | stack_values[stack_values_count++] = i; |
| 682 | } |
| 683 | else |
| 684 | { |
| 685 | int j; |
| 686 | for (j = 0; j < n; j++) |
| 687 | { |
| 688 | int offset = 0; |
| 689 | switch (class[j]) |
| 690 | { |
| 691 | case X86_64_NO_CLASS: |
| 692 | break; |
| 693 | case X86_64_INTEGER_CLASS: |
| 694 | write_register_gen (int_parameter_registers |
| 695 | [(intreg + 1) / 2], |
| 696 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 697 | offset += 8; |
| 698 | intreg += 2; |
| 699 | break; |
| 700 | case X86_64_INTEGERSI_CLASS: |
| 701 | write_register_gen (int_parameter_registers[intreg / 2], |
| 702 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 703 | offset += 8; |
| 704 | intreg++; |
| 705 | break; |
| 706 | case X86_64_SSEDF_CLASS: |
| 707 | case X86_64_SSESF_CLASS: |
| 708 | case X86_64_SSE_CLASS: |
| 709 | write_register_gen (sse_parameter_registers |
| 710 | [(ssereg + 1) / 2], |
| 711 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 712 | offset += 8; |
| 713 | ssereg += 2; |
| 714 | break; |
| 715 | case X86_64_SSEUP_CLASS: |
| 716 | write_register_gen (sse_parameter_registers[ssereg / 2], |
| 717 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 718 | offset += 8; |
| 719 | ssereg++; |
| 720 | break; |
| 721 | case X86_64_X87_CLASS: |
| 722 | case X86_64_MEMORY_CLASS: |
| 723 | stack_values[stack_values_count++] = i; |
| 724 | break; |
| 725 | case X86_64_X87UP_CLASS: |
| 726 | break; |
| 727 | default: |
| 728 | internal_error (__FILE__, __LINE__, |
| 729 | "Unexpected argument class"); |
| 730 | } |
| 731 | intreg += intreg % 2; |
| 732 | ssereg += ssereg % 2; |
| 733 | } |
| 734 | } |
| 735 | } |
| 736 | while (--stack_values_count >= 0) |
| 737 | { |
| 738 | struct value *arg = args[stack_values[stack_values_count]]; |
| 739 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg)); |
| 740 | len += 7; |
| 741 | len -= len % 8; |
| 742 | sp -= len; |
| 743 | write_memory (sp, VALUE_CONTENTS_ALL (arg), len); |
| 744 | } |
| 745 | return sp; |
| 746 | } |
| 747 | |
| 748 | /* Write into the appropriate registers a function return value stored |
| 749 | in VALBUF of type TYPE, given in virtual format. */ |
| 750 | void |
| 751 | x86_64_store_return_value (struct type *type, char *valbuf) |
| 752 | { |
| 753 | int len = TYPE_LENGTH (type); |
| 754 | |
| 755 | if (TYPE_CODE_FLT == TYPE_CODE (type)) |
| 756 | { |
| 757 | /* Floating-point return values can be found in %st(0). */ |
| 758 | if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT |
| 759 | && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext) |
| 760 | { |
| 761 | /* Copy straight over. */ |
| 762 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf, |
| 763 | FPU_REG_RAW_SIZE); |
| 764 | } |
| 765 | else |
| 766 | { |
| 767 | char buf[FPU_REG_RAW_SIZE]; |
| 768 | DOUBLEST val; |
| 769 | |
| 770 | /* Convert the value found in VALBUF to the extended |
| 771 | floating point format used by the FPU. This is probably |
| 772 | not exactly how it would happen on the target itself, but |
| 773 | it is the best we can do. */ |
| 774 | val = extract_floating (valbuf, TYPE_LENGTH (type)); |
| 775 | floatformat_from_doublest (&floatformat_i387_ext, &val, buf); |
| 776 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf, |
| 777 | FPU_REG_RAW_SIZE); |
| 778 | } |
| 779 | } |
| 780 | else |
| 781 | { |
| 782 | int low_size = REGISTER_RAW_SIZE (0); |
| 783 | int high_size = REGISTER_RAW_SIZE (1); |
| 784 | |
| 785 | if (len <= low_size) |
| 786 | write_register_bytes (REGISTER_BYTE (0), valbuf, len); |
| 787 | else if (len <= (low_size + high_size)) |
| 788 | { |
| 789 | write_register_bytes (REGISTER_BYTE (0), valbuf, low_size); |
| 790 | write_register_bytes (REGISTER_BYTE (1), |
| 791 | valbuf + low_size, len - low_size); |
| 792 | } |
| 793 | else |
| 794 | internal_error (__FILE__, __LINE__, |
| 795 | "Cannot store return value of %d bytes long.", len); |
| 796 | } |
| 797 | } |
| 798 | \f |
| 799 | |
| 800 | static char * |
| 801 | x86_64_register_name (int reg_nr) |
| 802 | { |
| 803 | if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS) |
| 804 | return NULL; |
| 805 | return x86_64_register_info_table[reg_nr].name; |
| 806 | } |
| 807 | \f |
| 808 | |
| 809 | |
| 810 | /* We have two flavours of disassembly. The machinery on this page |
| 811 | deals with switching between those. */ |
| 812 | |
| 813 | static int |
| 814 | gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info) |
| 815 | { |
| 816 | if (disassembly_flavour == att_flavour) |
| 817 | return print_insn_i386_att (memaddr, info); |
| 818 | else if (disassembly_flavour == intel_flavour) |
| 819 | return print_insn_i386_intel (memaddr, info); |
| 820 | /* Never reached -- disassembly_flavour is always either att_flavour |
| 821 | or intel_flavour. */ |
| 822 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
| 823 | } |
| 824 | \f |
| 825 | |
| 826 | /* Store the address of the place in which to copy the structure the |
| 827 | subroutine will return. This is called from call_function. */ |
| 828 | void |
| 829 | x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) |
| 830 | { |
| 831 | write_register (RDI_REGNUM, addr); |
| 832 | } |
| 833 | |
| 834 | int |
| 835 | x86_64_frameless_function_invocation (struct frame_info *frame) |
| 836 | { |
| 837 | return 0; |
| 838 | } |
| 839 | |
| 840 | /* If a function with debugging information and known beginning |
| 841 | is detected, we will return pc of the next line in the source |
| 842 | code. With this approach we effectively skip the prolog. */ |
| 843 | |
| 844 | #define PROLOG_BUFSIZE 4 |
| 845 | CORE_ADDR |
| 846 | x86_64_skip_prologue (CORE_ADDR pc) |
| 847 | { |
| 848 | int i, firstline, currline; |
| 849 | struct symtab_and_line v_sal; |
| 850 | struct symbol *v_function; |
| 851 | CORE_ADDR salendaddr = 0, endaddr = 0; |
| 852 | |
| 853 | /* We will handle only functions beginning with: |
| 854 | 55 pushq %rbp |
| 855 | 48 89 e5 movq %rsp,%rbp |
| 856 | */ |
| 857 | unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 }, |
| 858 | prolog_buf[PROLOG_BUFSIZE]; |
| 859 | |
| 860 | read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE); |
| 861 | |
| 862 | /* First check, whether pc points to pushq %rbp. If not, |
| 863 | * print a recommendation to enable frame pointer. */ |
| 864 | if (prolog_expect[0] != prolog_buf[0]) |
| 865 | { |
| 866 | if (!omit_fp_note_printed) |
| 867 | { |
| 868 | printf_filtered |
| 869 | ("NOTE: This function doesn't seem to have a valid prologue.\n" |
| 870 | " Consider adding -fno-omit-frame-pointer to your gcc's CFLAGS.\n"); |
| 871 | omit_fp_note_printed++; |
| 872 | } |
| 873 | return pc; |
| 874 | } |
| 875 | /* Valid prolog continues with movq %rsp,%rbp. */ |
| 876 | for (i = 1; i < PROLOG_BUFSIZE; i++) |
| 877 | if (prolog_expect[i] != prolog_buf[i]) |
| 878 | return pc + 1; /* First instruction after pushq %rbp. */ |
| 879 | |
| 880 | v_function = find_pc_function (pc); |
| 881 | v_sal = find_pc_line (pc, 0); |
| 882 | |
| 883 | /* If pc doesn't point to a function with debuginfo, |
| 884 | some of the following may be NULL. */ |
| 885 | if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab) |
| 886 | return pc; |
| 887 | |
| 888 | firstline = v_sal.line; |
| 889 | currline = firstline; |
| 890 | salendaddr = v_sal.end; |
| 891 | endaddr = v_function->ginfo.value.block->endaddr; |
| 892 | |
| 893 | for (i = 0; i < v_sal.symtab->linetable->nitems; i++) |
| 894 | if (v_sal.symtab->linetable->item[i].line > firstline |
| 895 | && v_sal.symtab->linetable->item[i].pc >= salendaddr |
| 896 | && v_sal.symtab->linetable->item[i].pc < endaddr) |
| 897 | { |
| 898 | pc = v_sal.symtab->linetable->item[i].pc; |
| 899 | currline = v_sal.symtab->linetable->item[i].line; |
| 900 | break; |
| 901 | } |
| 902 | |
| 903 | return pc; |
| 904 | } |
| 905 | |
| 906 | /* Sequence of bytes for breakpoint instruction. */ |
| 907 | static unsigned char * |
| 908 | x86_64_breakpoint_from_pc (CORE_ADDR * pc, int *lenptr) |
| 909 | { |
| 910 | static unsigned char breakpoint[] = { 0xcc }; |
| 911 | *lenptr = 1; |
| 912 | return breakpoint; |
| 913 | } |
| 914 | |
| 915 | static struct gdbarch * |
| 916 | x86_64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 917 | { |
| 918 | struct gdbarch *gdbarch; |
| 919 | struct gdbarch_tdep *tdep; |
| 920 | int i, sum; |
| 921 | |
| 922 | /* Find a candidate among the list of pre-declared architectures. */ |
| 923 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
| 924 | arches != NULL; |
| 925 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) |
| 926 | { |
| 927 | switch (info.bfd_arch_info->mach) |
| 928 | { |
| 929 | case bfd_mach_x86_64: |
| 930 | case bfd_mach_x86_64_intel_syntax: |
| 931 | switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach) |
| 932 | { |
| 933 | case bfd_mach_x86_64: |
| 934 | case bfd_mach_x86_64_intel_syntax: |
| 935 | return arches->gdbarch; |
| 936 | case bfd_mach_i386_i386: |
| 937 | case bfd_mach_i386_i8086: |
| 938 | case bfd_mach_i386_i386_intel_syntax: |
| 939 | break; |
| 940 | default: |
| 941 | internal_error (__FILE__, __LINE__, |
| 942 | "x86_64_gdbarch_init: unknown machine type"); |
| 943 | } |
| 944 | break; |
| 945 | case bfd_mach_i386_i386: |
| 946 | case bfd_mach_i386_i8086: |
| 947 | case bfd_mach_i386_i386_intel_syntax: |
| 948 | switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach) |
| 949 | { |
| 950 | case bfd_mach_x86_64: |
| 951 | case bfd_mach_x86_64_intel_syntax: |
| 952 | break; |
| 953 | case bfd_mach_i386_i386: |
| 954 | case bfd_mach_i386_i8086: |
| 955 | case bfd_mach_i386_i386_intel_syntax: |
| 956 | return arches->gdbarch; |
| 957 | default: |
| 958 | internal_error (__FILE__, __LINE__, |
| 959 | "x86_64_gdbarch_init: unknown machine type"); |
| 960 | } |
| 961 | break; |
| 962 | default: |
| 963 | internal_error (__FILE__, __LINE__, |
| 964 | "x86_64_gdbarch_init: unknown machine type"); |
| 965 | } |
| 966 | } |
| 967 | |
| 968 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); |
| 969 | gdbarch = gdbarch_alloc (&info, tdep); |
| 970 | |
| 971 | switch (info.bfd_arch_info->mach) |
| 972 | { |
| 973 | case bfd_mach_x86_64: |
| 974 | case bfd_mach_x86_64_intel_syntax: |
| 975 | tdep->num_xmm_regs = 16; |
| 976 | break; |
| 977 | case bfd_mach_i386_i386: |
| 978 | case bfd_mach_i386_i8086: |
| 979 | case bfd_mach_i386_i386_intel_syntax: |
| 980 | /* This is place for definition of i386 target vector. */ |
| 981 | break; |
| 982 | default: |
| 983 | internal_error (__FILE__, __LINE__, |
| 984 | "x86_64_gdbarch_init: unknown machine type"); |
| 985 | } |
| 986 | |
| 987 | set_gdbarch_long_bit (gdbarch, 64); |
| 988 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 989 | set_gdbarch_ptr_bit (gdbarch, 64); |
| 990 | |
| 991 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); |
| 992 | |
| 993 | set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS); |
| 994 | set_gdbarch_register_name (gdbarch, x86_64_register_name); |
| 995 | set_gdbarch_register_size (gdbarch, 8); |
| 996 | set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size); |
| 997 | set_gdbarch_max_register_raw_size (gdbarch, 16); |
| 998 | set_gdbarch_register_byte (gdbarch, x86_64_register_byte); |
| 999 | |
| 1000 | /* Total amount of space needed to store our copies of the machine's register |
| 1001 | (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */ |
| 1002 | for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++) |
| 1003 | sum += x86_64_register_info_table[i].size; |
| 1004 | set_gdbarch_register_bytes (gdbarch, sum); |
| 1005 | set_gdbarch_register_virtual_size (gdbarch, generic_register_size); |
| 1006 | set_gdbarch_max_register_virtual_size (gdbarch, 16); |
| 1007 | |
| 1008 | set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type); |
| 1009 | |
| 1010 | set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible); |
| 1011 | set_gdbarch_register_convert_to_virtual (gdbarch, |
| 1012 | x86_64_register_convert_to_virtual); |
| 1013 | set_gdbarch_register_convert_to_raw (gdbarch, |
| 1014 | x86_64_register_convert_to_raw); |
| 1015 | |
| 1016 | /* Register numbers of various important registers. */ |
| 1017 | set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */ |
| 1018 | set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */ |
| 1019 | set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */ |
| 1020 | |
| 1021 | set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */ |
| 1022 | |
| 1023 | set_gdbarch_read_fp (gdbarch, cfi_read_fp); |
| 1024 | |
| 1025 | /* Discard from the stack the innermost frame, restoring all registers. */ |
| 1026 | set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame); |
| 1027 | |
| 1028 | /* FRAME_CHAIN takes a frame's nominal address and produces the frame's |
| 1029 | chain-pointer. */ |
| 1030 | set_gdbarch_frame_chain (gdbarch, cfi_frame_chain); |
| 1031 | |
| 1032 | set_gdbarch_frameless_function_invocation (gdbarch, |
| 1033 | x86_64_frameless_function_invocation); |
| 1034 | set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc); |
| 1035 | |
| 1036 | set_gdbarch_frame_args_address (gdbarch, default_frame_address); |
| 1037 | set_gdbarch_frame_locals_address (gdbarch, default_frame_address); |
| 1038 | |
| 1039 | /* Return number of bytes at start of arglist that are not really args. */ |
| 1040 | set_gdbarch_frame_args_skip (gdbarch, 8); |
| 1041 | |
| 1042 | set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); |
| 1043 | |
| 1044 | /* Frame pc initialization is handled by unwind informations. */ |
| 1045 | set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc); |
| 1046 | |
| 1047 | /* Initialization of unwind informations. */ |
| 1048 | set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info); |
| 1049 | |
| 1050 | /* Getting saved registers is handled by unwind informations. */ |
| 1051 | set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register); |
| 1052 | |
| 1053 | set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); |
| 1054 | |
| 1055 | /* Cons up virtual frame pointer for trace */ |
| 1056 | set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer); |
| 1057 | |
| 1058 | |
| 1059 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); |
| 1060 | |
| 1061 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); |
| 1062 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); |
| 1063 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); |
| 1064 | set_gdbarch_call_dummy_length (gdbarch, 0); |
| 1065 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); |
| 1066 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); |
| 1067 | set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point); |
| 1068 | set_gdbarch_call_dummy_words (gdbarch, 0); |
| 1069 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); |
| 1070 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); |
| 1071 | set_gdbarch_call_dummy_p (gdbarch, 1); |
| 1072 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); |
| 1073 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); |
| 1074 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); |
| 1075 | set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address); |
| 1076 | set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments); |
| 1077 | |
| 1078 | /* Return number of args passed to a frame, no way to tell. */ |
| 1079 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); |
| 1080 | /* Don't use default structure extract routine */ |
| 1081 | set_gdbarch_extract_struct_value_address (gdbarch, 0); |
| 1082 | |
| 1083 | /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE |
| 1084 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is |
| 1085 | the case when structure is returned in registers. */ |
| 1086 | set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention); |
| 1087 | |
| 1088 | /* Store the address of the place in which to copy the structure the |
| 1089 | subroutine will return. This is called from call_function. */ |
| 1090 | set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return); |
| 1091 | |
| 1092 | /* Extract from an array REGBUF containing the (raw) register state |
| 1093 | a function return value of type TYPE, and copy that, in virtual format, |
| 1094 | into VALBUF. */ |
| 1095 | set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value); |
| 1096 | |
| 1097 | |
| 1098 | /* Write into the appropriate registers a function return value stored |
| 1099 | in VALBUF of type TYPE, given in virtual format. */ |
| 1100 | set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value); |
| 1101 | \f |
| 1102 | |
| 1103 | /* Offset from address of function to start of its code. */ |
| 1104 | set_gdbarch_function_start_offset (gdbarch, 0); |
| 1105 | |
| 1106 | set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue); |
| 1107 | |
| 1108 | set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call); |
| 1109 | |
| 1110 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1111 | |
| 1112 | set_gdbarch_breakpoint_from_pc (gdbarch, |
| 1113 | (gdbarch_breakpoint_from_pc_ftype *) |
| 1114 | x86_64_breakpoint_from_pc); |
| 1115 | |
| 1116 | |
| 1117 | /* Amount PC must be decremented by after a breakpoint. This is often the |
| 1118 | number of bytes in BREAKPOINT but not always. */ |
| 1119 | set_gdbarch_decr_pc_after_break (gdbarch, 1); |
| 1120 | |
| 1121 | /* Use dwarf2 debug frame informations. */ |
| 1122 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); |
| 1123 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum); |
| 1124 | |
| 1125 | return gdbarch; |
| 1126 | } |
| 1127 | |
| 1128 | void |
| 1129 | _initialize_x86_64_tdep (void) |
| 1130 | { |
| 1131 | register_gdbarch_init (bfd_arch_i386, x86_64_gdbarch_init); |
| 1132 | |
| 1133 | /* Initialize the table saying where each register starts in the |
| 1134 | register file. */ |
| 1135 | { |
| 1136 | int i, offset; |
| 1137 | |
| 1138 | offset = 0; |
| 1139 | for (i = 0; i < X86_64_NUM_REGS; i++) |
| 1140 | { |
| 1141 | x86_64_register_byte_table[i] = offset; |
| 1142 | offset += x86_64_register_info_table[i].size; |
| 1143 | } |
| 1144 | } |
| 1145 | |
| 1146 | tm_print_insn = gdb_print_insn_x86_64; |
| 1147 | tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach; |
| 1148 | |
| 1149 | /* Add the variable that controls the disassembly flavour. */ |
| 1150 | { |
| 1151 | struct cmd_list_element *new_cmd; |
| 1152 | |
| 1153 | new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class, |
| 1154 | valid_flavours, &disassembly_flavour, "\ |
| 1155 | Set the disassembly flavour, the valid values are \"att\" and \"intel\", \ |
| 1156 | and the default value is \"att\".", &setlist); |
| 1157 | add_show_from_set (new_cmd, &showlist); |
| 1158 | } |
| 1159 | } |