| 1 | /* GNU/Linux/IA64 specific low level interface, for the remote server for GDB. |
| 2 | Copyright (C) 1995-2020 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #include "server.h" |
| 20 | #include "linux-low.h" |
| 21 | |
| 22 | #ifdef HAVE_SYS_REG_H |
| 23 | #include <sys/reg.h> |
| 24 | #endif |
| 25 | |
| 26 | /* Linux target op definitions for the IA64 architecture. */ |
| 27 | |
| 28 | class ia64_target : public linux_process_target |
| 29 | { |
| 30 | public: |
| 31 | |
| 32 | const regs_info *get_regs_info () override; |
| 33 | |
| 34 | protected: |
| 35 | |
| 36 | void low_arch_setup () override; |
| 37 | }; |
| 38 | |
| 39 | /* The singleton target ops object. */ |
| 40 | |
| 41 | static ia64_target the_ia64_target; |
| 42 | |
| 43 | /* Defined in auto-generated file reg-ia64.c. */ |
| 44 | void init_registers_ia64 (void); |
| 45 | extern const struct target_desc *tdesc_ia64; |
| 46 | |
| 47 | #define ia64_num_regs 462 |
| 48 | |
| 49 | #include <asm/ptrace_offsets.h> |
| 50 | |
| 51 | static int ia64_regmap[] = |
| 52 | { |
| 53 | /* general registers */ |
| 54 | -1, /* gr0 not available; i.e, it's always zero */ |
| 55 | PT_R1, |
| 56 | PT_R2, |
| 57 | PT_R3, |
| 58 | PT_R4, |
| 59 | PT_R5, |
| 60 | PT_R6, |
| 61 | PT_R7, |
| 62 | PT_R8, |
| 63 | PT_R9, |
| 64 | PT_R10, |
| 65 | PT_R11, |
| 66 | PT_R12, |
| 67 | PT_R13, |
| 68 | PT_R14, |
| 69 | PT_R15, |
| 70 | PT_R16, |
| 71 | PT_R17, |
| 72 | PT_R18, |
| 73 | PT_R19, |
| 74 | PT_R20, |
| 75 | PT_R21, |
| 76 | PT_R22, |
| 77 | PT_R23, |
| 78 | PT_R24, |
| 79 | PT_R25, |
| 80 | PT_R26, |
| 81 | PT_R27, |
| 82 | PT_R28, |
| 83 | PT_R29, |
| 84 | PT_R30, |
| 85 | PT_R31, |
| 86 | /* gr32 through gr127 not directly available via the ptrace interface */ |
| 87 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 88 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 89 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 90 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 91 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 92 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 93 | /* Floating point registers */ |
| 94 | -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */ |
| 95 | PT_F2, |
| 96 | PT_F3, |
| 97 | PT_F4, |
| 98 | PT_F5, |
| 99 | PT_F6, |
| 100 | PT_F7, |
| 101 | PT_F8, |
| 102 | PT_F9, |
| 103 | PT_F10, |
| 104 | PT_F11, |
| 105 | PT_F12, |
| 106 | PT_F13, |
| 107 | PT_F14, |
| 108 | PT_F15, |
| 109 | PT_F16, |
| 110 | PT_F17, |
| 111 | PT_F18, |
| 112 | PT_F19, |
| 113 | PT_F20, |
| 114 | PT_F21, |
| 115 | PT_F22, |
| 116 | PT_F23, |
| 117 | PT_F24, |
| 118 | PT_F25, |
| 119 | PT_F26, |
| 120 | PT_F27, |
| 121 | PT_F28, |
| 122 | PT_F29, |
| 123 | PT_F30, |
| 124 | PT_F31, |
| 125 | PT_F32, |
| 126 | PT_F33, |
| 127 | PT_F34, |
| 128 | PT_F35, |
| 129 | PT_F36, |
| 130 | PT_F37, |
| 131 | PT_F38, |
| 132 | PT_F39, |
| 133 | PT_F40, |
| 134 | PT_F41, |
| 135 | PT_F42, |
| 136 | PT_F43, |
| 137 | PT_F44, |
| 138 | PT_F45, |
| 139 | PT_F46, |
| 140 | PT_F47, |
| 141 | PT_F48, |
| 142 | PT_F49, |
| 143 | PT_F50, |
| 144 | PT_F51, |
| 145 | PT_F52, |
| 146 | PT_F53, |
| 147 | PT_F54, |
| 148 | PT_F55, |
| 149 | PT_F56, |
| 150 | PT_F57, |
| 151 | PT_F58, |
| 152 | PT_F59, |
| 153 | PT_F60, |
| 154 | PT_F61, |
| 155 | PT_F62, |
| 156 | PT_F63, |
| 157 | PT_F64, |
| 158 | PT_F65, |
| 159 | PT_F66, |
| 160 | PT_F67, |
| 161 | PT_F68, |
| 162 | PT_F69, |
| 163 | PT_F70, |
| 164 | PT_F71, |
| 165 | PT_F72, |
| 166 | PT_F73, |
| 167 | PT_F74, |
| 168 | PT_F75, |
| 169 | PT_F76, |
| 170 | PT_F77, |
| 171 | PT_F78, |
| 172 | PT_F79, |
| 173 | PT_F80, |
| 174 | PT_F81, |
| 175 | PT_F82, |
| 176 | PT_F83, |
| 177 | PT_F84, |
| 178 | PT_F85, |
| 179 | PT_F86, |
| 180 | PT_F87, |
| 181 | PT_F88, |
| 182 | PT_F89, |
| 183 | PT_F90, |
| 184 | PT_F91, |
| 185 | PT_F92, |
| 186 | PT_F93, |
| 187 | PT_F94, |
| 188 | PT_F95, |
| 189 | PT_F96, |
| 190 | PT_F97, |
| 191 | PT_F98, |
| 192 | PT_F99, |
| 193 | PT_F100, |
| 194 | PT_F101, |
| 195 | PT_F102, |
| 196 | PT_F103, |
| 197 | PT_F104, |
| 198 | PT_F105, |
| 199 | PT_F106, |
| 200 | PT_F107, |
| 201 | PT_F108, |
| 202 | PT_F109, |
| 203 | PT_F110, |
| 204 | PT_F111, |
| 205 | PT_F112, |
| 206 | PT_F113, |
| 207 | PT_F114, |
| 208 | PT_F115, |
| 209 | PT_F116, |
| 210 | PT_F117, |
| 211 | PT_F118, |
| 212 | PT_F119, |
| 213 | PT_F120, |
| 214 | PT_F121, |
| 215 | PT_F122, |
| 216 | PT_F123, |
| 217 | PT_F124, |
| 218 | PT_F125, |
| 219 | PT_F126, |
| 220 | PT_F127, |
| 221 | /* predicate registers - we don't fetch these individually */ |
| 222 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 223 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 224 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 225 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 226 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 227 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 228 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 229 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 230 | /* branch registers */ |
| 231 | PT_B0, |
| 232 | PT_B1, |
| 233 | PT_B2, |
| 234 | PT_B3, |
| 235 | PT_B4, |
| 236 | PT_B5, |
| 237 | PT_B6, |
| 238 | PT_B7, |
| 239 | /* virtual frame pointer and virtual return address pointer */ |
| 240 | -1, -1, |
| 241 | /* other registers */ |
| 242 | PT_PR, |
| 243 | PT_CR_IIP, /* ip */ |
| 244 | PT_CR_IPSR, /* psr */ |
| 245 | PT_CFM, /* cfm */ |
| 246 | /* kernel registers not visible via ptrace interface (?) */ |
| 247 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 248 | /* hole */ |
| 249 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 250 | PT_AR_RSC, |
| 251 | PT_AR_BSP, |
| 252 | PT_AR_BSPSTORE, |
| 253 | PT_AR_RNAT, |
| 254 | -1, |
| 255 | -1, /* Not available: FCR, IA32 floating control register */ |
| 256 | -1, -1, |
| 257 | -1, /* Not available: EFLAG */ |
| 258 | -1, /* Not available: CSD */ |
| 259 | -1, /* Not available: SSD */ |
| 260 | -1, /* Not available: CFLG */ |
| 261 | -1, /* Not available: FSR */ |
| 262 | -1, /* Not available: FIR */ |
| 263 | -1, /* Not available: FDR */ |
| 264 | -1, |
| 265 | PT_AR_CCV, |
| 266 | -1, -1, -1, |
| 267 | PT_AR_UNAT, |
| 268 | -1, -1, -1, |
| 269 | PT_AR_FPSR, |
| 270 | -1, -1, -1, |
| 271 | -1, /* Not available: ITC */ |
| 272 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 273 | -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 274 | PT_AR_PFS, |
| 275 | PT_AR_LC, |
| 276 | PT_AR_EC, |
| 277 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 278 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 279 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 280 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 281 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 282 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
| 283 | -1, |
| 284 | }; |
| 285 | |
| 286 | static int |
| 287 | ia64_cannot_store_register (int regno) |
| 288 | { |
| 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | static int |
| 293 | ia64_cannot_fetch_register (int regno) |
| 294 | { |
| 295 | return 0; |
| 296 | } |
| 297 | |
| 298 | /* GDB register numbers. */ |
| 299 | #define IA64_GR0_REGNUM 0 |
| 300 | #define IA64_FR0_REGNUM 128 |
| 301 | #define IA64_FR1_REGNUM 129 |
| 302 | |
| 303 | static int |
| 304 | ia64_fetch_register (struct regcache *regcache, int regnum) |
| 305 | { |
| 306 | /* r0 cannot be fetched but is always zero. */ |
| 307 | if (regnum == IA64_GR0_REGNUM) |
| 308 | { |
| 309 | const gdb_byte zero[8] = { 0 }; |
| 310 | |
| 311 | gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum)); |
| 312 | supply_register (regcache, regnum, zero); |
| 313 | return 1; |
| 314 | } |
| 315 | |
| 316 | /* fr0 cannot be fetched but is always zero. */ |
| 317 | if (regnum == IA64_FR0_REGNUM) |
| 318 | { |
| 319 | const gdb_byte f_zero[16] = { 0 }; |
| 320 | |
| 321 | gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum)); |
| 322 | supply_register (regcache, regnum, f_zero); |
| 323 | return 1; |
| 324 | } |
| 325 | |
| 326 | /* fr1 cannot be fetched but is always one (1.0). */ |
| 327 | if (regnum == IA64_FR1_REGNUM) |
| 328 | { |
| 329 | const gdb_byte f_one[16] = |
| 330 | { 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 }; |
| 331 | |
| 332 | gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum)); |
| 333 | supply_register (regcache, regnum, f_one); |
| 334 | return 1; |
| 335 | } |
| 336 | |
| 337 | return 0; |
| 338 | } |
| 339 | |
| 340 | static struct usrregs_info ia64_usrregs_info = |
| 341 | { |
| 342 | ia64_num_regs, |
| 343 | ia64_regmap, |
| 344 | }; |
| 345 | |
| 346 | static struct regs_info myregs_info = |
| 347 | { |
| 348 | NULL, /* regset_bitmap */ |
| 349 | &ia64_usrregs_info |
| 350 | }; |
| 351 | |
| 352 | const regs_info * |
| 353 | ia64_target::get_regs_info () |
| 354 | { |
| 355 | return &myregs_info; |
| 356 | } |
| 357 | |
| 358 | void |
| 359 | ia64_target::low_arch_setup () |
| 360 | { |
| 361 | current_process ()->tdesc = tdesc_ia64; |
| 362 | } |
| 363 | |
| 364 | |
| 365 | struct linux_target_ops the_low_target = { |
| 366 | ia64_cannot_fetch_register, |
| 367 | ia64_cannot_store_register, |
| 368 | ia64_fetch_register, |
| 369 | }; |
| 370 | |
| 371 | /* The linux target ops object. */ |
| 372 | |
| 373 | linux_process_target *the_linux_target = &the_ia64_target; |
| 374 | |
| 375 | void |
| 376 | initialize_low_arch (void) |
| 377 | { |
| 378 | init_registers_ia64 (); |
| 379 | } |