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arc: Implement NPS-400 dcmac instruction
[deliverable/binutils-gdb.git] / include / ChangeLog
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CommitLineData
12016-11-03 Graham Markall <graham.markall@embecosm.com>
2
3 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
4
52016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
6
7 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
8 fields.
9 (struct arc_long_opcode): Delete.
10 (struct arc_operand): Change types for insert and extract
11 handlers.
12
132016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
14
15 * opcode/arc.h: Make macros 64-bit safe.
16
172016-11-03 Graham Markall <graham.markall@embecosm.com>
18
19 * opcode/arc.h (arc_opcode_len): Declare.
20 (ARC_SHORT): Delete.
21
222016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
23 Andrew Waterman <andrew@sifive.com>
24
25 Add support for RISC-V architecture.
26 * dis-asm.h: Add prototypes for print_insn_riscv and
27 print_riscv_disassembler_options.
28 * elf/riscv.h: New file.
29 * opcode/riscv-opc.h: New file.
30 * opcode/riscv.h: New file.
31
322016-10-17 Nick Clifton <nickc@redhat.com>
33
34 * elf/common.h (DT_SYMTAB_SHNDX): Define.
35 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
36 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
37 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
38 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
39 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
40 (ELFOSABI_OPENVOS): Define.
41 (GRP_MASKOS, GRP_MASKPROC): Define.
42
432016-10-14 Pedro Alves <palves@redhat.com>
44
45 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
46 OVERRIDE): Define as empty.
47 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
48 __final.
49 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
50 empty.
51
522016-10-14 Pedro Alves <palves@redhat.com>
53
54 * ansidecl.h (GCC_FINAL): Delete.
55 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
56
572016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
58
59 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
60
612016-09-29 Alan Modra <amodra@gmail.com>
62
63 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
64
652016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
66
67 * opcode/arc.h (insn_class_t): Add two new classes.
68
692016-09-26 Alan Modra <amodra@gmail.com>
70
71 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
72
732016-09-21 Richard Sandiford <richard.sandiford@arm.com>
74
75 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
76
772016-09-21 Richard Sandiford <richard.sandiford@arm.com>
78
79 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
80 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
81 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
82 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
83
842016-09-21 Richard Sandiford <richard.sandiford@arm.com>
85
86 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
87 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
88 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
89 aarch64_insn_classes.
90
912016-09-21 Richard Sandiford <richard.sandiford@arm.com>
92
93 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
94 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
95 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
96
972016-09-21 Richard Sandiford <richard.sandiford@arm.com>
98
99 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
100 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
101 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
102
1032016-09-21 Richard Sandiford <richard.sandiford@arm.com>
104
105 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
106 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
107 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
108 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
109 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
110 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
111 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
112 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
113 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
114 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
115 (aarch64_sve_dupm_mov_immediate_p): Declare.
116
1172016-09-21 Richard Sandiford <richard.sandiford@arm.com>
118
119 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
120 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
121 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
122 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
123 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
124
1252016-09-21 Richard Sandiford <richard.sandiford@arm.com>
126
127 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
128 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
129 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
130 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
131 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
132 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
133 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
134 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
135 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
136 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
137 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
138 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
139 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
140 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
141 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
142 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
143 Likewise.
144
1452016-09-21 Richard Sandiford <richard.sandiford@arm.com>
146
147 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
148 aarch64_opnd.
149 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
150 (aarch64_opnd_info): Make shifter.amount an int64_t and
151 rearrange the fields.
152
1532016-09-21 Richard Sandiford <richard.sandiford@arm.com>
154
155 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
156 (AARCH64_OPND_SVE_PRFOP): Likewise.
157 (aarch64_sve_pattern_array): Declare.
158 (aarch64_sve_prfop_array): Likewise.
159
1602016-09-21 Richard Sandiford <richard.sandiford@arm.com>
161
162 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
163 (AARCH64_OPND_QLF_P_M): Likewise.
164
1652016-09-21 Richard Sandiford <richard.sandiford@arm.com>
166
167 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
168 aarch64_operand_class.
169 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
170 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
171 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
172 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
173 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
174 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
175 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
176 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
177
1782016-09-21 Richard Sandiford <richard.sandiford@arm.com>
179
180 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
181 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
182
1832016-09-21 Richard Sandiford <richard.sandiford@arm.com>
184
185 * opcode/aarch64.h (F_STRICT): New flag.
186
1872016-09-07 Richard Earnshaw <rearnsha@arm.com>
188
189 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
190
1912016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
192 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
193 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
194 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
195 relocation.
196
1972016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
198
199 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
200 (ARM_SET_SYM_CMSE_SPCL): Likewise.
201
2022016-08-01 Andrew Jenner <andrew@codesourcery.com>
203
204 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
205
2062016-07-29 Aldy Hernandez <aldyh@redhat.com>
207
208 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
209
2102016-07-27 Graham Markall <graham.markall@embecosm.com>
211
212 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
213 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
214 ARC_NUM_ADDRTYPES.
215 * opcode/arc.h: Add BMU to insn_class_t enum.
216 * opcode/arc.h: Add PMU to insn_class_t enum.
217
2182016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
219
220 * dis-asm.h: Declare print_arc_disassembler_options.
221
2222016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
223
224 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
225 out_implib_bfd fields.
226
2272016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
228
229 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
230
2312016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
232
233 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
234 (SHF_ARM_PURECODE): ... this.
235
2362016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
237
238 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
239 (AARCH64_CPU_HAS_ANY_FEATURES): New.
240 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
241 (AARCH64_OPCODE_HAS_FEATURE): Remove.
242
2432016-06-30 Matthew Wahab <matthew.wahab@arm.com>
244
245 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
246 of enabled FPU features.
247
2482016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
249
250 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
251 SPARC_OPCODE_ARCH_MAX into the enum.
252
2532016-06-28 Richard Sandiford <richard.sandiford@arm.com>
254
255 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
256
2572016-06-28 Maciej W. Rozycki <macro@imgtec.com>
258
259 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
260
2612016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
262
263 * elf/xtensa.h (xtensa_make_property_section): New prototype.
264
2652016-06-24 John Baldwin <jhb@FreeBSD.org>
266
267 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
268 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
269 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
270 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
271
2722016-06-23 Graham Markall <graham.markall@embecosm.com>
273
274 * opcode/arc.h: Make insn_class_t alphabetical again.
275
2762016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
277
278 * elf/dlx.h: Wrap in extern C.
279 * elf/xtensa.h: Likewise.
280 * opcode/arc.h: Likewise.
281
2822016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
283
284 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
285 tilegx_pipeline.
286
2872016-06-21 Graham Markall <graham.markall@embecosm.com>
288
289 * opcode/arc.h: Add nps400 extension and instruction
290 subclass.
291 Remove ARC_OPCODE_NPS400
292 * elf/arc.h: Remove E_ARC_MACH_NPS400
293
2942016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
295
296 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
297 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
298 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
299 SPARC_OPCODE_ARCH_V9M.
300
3012016-06-14 John Baldwin <jhb@FreeBSD.org>
302
303 * opcode/msp430-decode.h (MSP430_Size): Remove.
304 (Msp430_Opcode_Decoded): Change type of size to int.
305
3062016-06-11 Alan Modra <amodra@gmail.com>
307
308 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
309
3102016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
311
312 * opcode/sparc.h: Add missing documentation for hyperprivileged
313 registers in rd (%) and rs1 ($).
314
3152016-06-07 Alan Modra <amodra@gmail.com>
316
317 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
318 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
319 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
320 PPC_APUINFO_VLE: Define.
321
3222016-06-07 Matthew Wahab <matthew.wahab@arm.com>
323
324 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
325 entries.
326 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
327
3282016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
329
330 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
331 (struct arc_long_opcode): New structure.
332 (arc_long_opcodes): Declare.
333 (arc_num_long_opcodes): Declare.
334
3352016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
336
337 * elf/mips.h: Add extern "C".
338 * elf/sh.h: Likewise.
339 * opcode/d10v.h: Likewise.
340 * opcode/d30v.h: Likewise.
341 * opcode/ia64.h: Likewise.
342 * opcode/mips.h: Likewise.
343 * opcode/ppc.h: Likewise.
344 * opcode/sparc.h: Likewise.
345 * opcode/tic6x.h: Likewise.
346 * opcode/v850.h: Likewise.
347
3482016-05-28 Alan Modra <amodra@gmail.com>
349
350 * bfdlink.h (struct bfd_link_callbacks): Update comments.
351 Return void from multiple_definition, multiple_common,
352 add_to_set, constructor, warning, undefined_symbol,
353 reloc_overflow, reloc_dangerous and unattached_reloc.
354
3552016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
356
357 * opcode/metag.h: wrap declarations in extern "C".
358
3592016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
360
361 * opcode/arc.h (insn_subclass_t): Add COND.
362 (flag_class_t): Add F_CLASS_EXTEND.
363
3642016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
365
366 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
367 insn_class.
368 (struct arc_flag_class): Renamed attribute class to flag_class.
369
3702016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
371
372 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
373 plain symbol.
374
3752016-04-29 Tom Tromey <tom@tromey.com>
376
377 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
378 DW_LANG_Rust_old>: New constants.
379
3802016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
381
382 * elf/mips.h (AFL_ASE_DSPR3): New macro.
383 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
384 * opcode/mips.h (ASE_DSPR3): New macro.
385
3862016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
387 Nick Clifton <nickc@redhat.com>
388
389 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
390 enumerator.
391 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
392 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
393 (ARM_SYM_BRANCH_TYPE): Replace by ...
394 (ARM_GET_SYM_BRANCH_TYPE): This and ...
395 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
396 BFD_ASSERT is defined or not.
397
3982016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
399
400 * elf/arm.h (Tag_DSP_extension): Define.
401
4022016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
403
404 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
405
4062016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
407
408 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
409 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
410 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
411 for the high core bits.
412
4132016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
414
415 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
416 (ARC_SYNTAX_NOP): Likewsie.
417 (ARC_OP1_MUST_BE_IMM): Update defined value.
418 (ARC_OP1_IMM_IMPLIED): Likewise.
419 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
420
4212016-04-28 Nick Clifton <nickc@redhat.com>
422
423 PR target/19722
424 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
425
4262016-04-27 Alan Modra <amodra@gmail.com>
427
428 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
429 undef. Formatting.
430
4312016-04-21 Nick Clifton <nickc@redhat.com>
432
433 * bfdlink.h: Add prototype for bfd_link_check_relocs.
434
4352016-04-20 H.J. Lu <hongjiu.lu@intel.com>
436
437 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
438
4392016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
440
441 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
442
4432016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
444
445 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
446
4472016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
448
449 * opcode/arc.h (insn_class_t): Add NET and ACL class.
450
4512016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
452
453 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
454 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
455
4562016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
457
458 * opcode/arc.h (flag_class_t): Update.
459 (ARC_OPCODE_NONE): Define.
460 (ARC_OPCODE_ARCALL): Likewise.
461 (ARC_OPCODE_ARCFPX): Likewise.
462 (ARC_REGISTER_READONLY): Likewise.
463 (ARC_REGISTER_WRITEONLY): Likewise.
464 (ARC_REGISTER_NOSHORT_CUT): Likewise.
465 (arc_aux_reg): Add cpu.
466
4672016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
468
469 * opcode/arc.h (arc_num_opcodes): Remove.
470 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
471 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
472 (ARC_SUFFIX_FLAG): Define.
473 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
474 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
475 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
476 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
477 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
478 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
479 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
480 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
481 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
482 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
483
4842016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
485
486 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
487 (ARC_FPUDA): Define.
488 (arc_aux_reg): Add new field.
489
4902016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
491
492 * opcode/arc-func.h (replace_bits24): Changed.
493 (replace_bits24_be): Created.
494
4952016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
496
497 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
498 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
499 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
500 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
501 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
502 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
503 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
504 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
505 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
506 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
507 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
508 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
509 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
510 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
511
5122016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
513
514 * opcode/i960.h: Add const qualifiers.
515 * opcode/tic4x.h (struct tic4x_inst): Likewise.
516
5172016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
518
519 * opcodes/arc.h (insn_class_t): Add BITOP type.
520
5212016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
522
523 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
524 new classes instead.
525
5262016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
527
528 * elf/arc.h (E_ARC_MACH_NPS400): Define.
529 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
530
5312016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
532
533 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
534
5352016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
536
537 * elf/arc.h (EF_ARC_MACH): Delete.
538 (EF_ARC_MACH_MSK): Remove out of date comment.
539
5402016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
541
542 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
543
5442016-03-15 H.J. Lu <hongjiu.lu@intel.com>
545
546 PR ld/19807
547 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
548
5492016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
550 Andrew Burgess <andrew.burgess@embecosm.com>
551
552 * elf/arc-reloc.def: Add a call to ME within the formula for each
553 relocation that requires middle-endian correction.
554
5552016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
556
557 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
558 * opcode/h8300.h (struct h8_opcode): Likewise.
559 * opcode/hppa.h (struct pa_opcode): Likewise.
560 * opcode/msp430.h: Likewise.
561 * opcode/spu.h (struct spu_opcode): Likewise.
562 * opcode/tic30.h (struct _register): Likewise.
563 * opcode/tic4x.h (struct tic4x_register): Likewise.
564 (struct tic4x_cond): Likewise.
565 (struct tic4x_indirect): Likewise.
566 (struct tic4x_inst): Likewise.
567 * opcode/visium.h (struct reg_entry): Likewise.
568
5692016-03-04 Matthew Wahab <matthew.wahab@arm.com>
570
571 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
572 (ARM_CPU_HAS_FEATURE): Add comment.
573
5742016-03-03 Than McIntosh <thanm@google.com>
575
576 * plugin-api.h: Add new hooks to the plugin transfer vector to
577 to support querying section alignment and section size.
578 (ld_plugin_get_input_section_alignment): New hook.
579 (ld_plugin_get_input_section_size): New hook.
580 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
581 and LDPT_GET_INPUT_SECTION_SIZE.
582 (ld_plugin_tv): Add tv_get_input_section_alignment and
583 tv_get_input_section_size.
584
5852016-03-03 Evgenii Stepanov <eugenis@google.com>
586
587 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
588
5892016-02-26 H.J. Lu <hongjiu.lu@intel.com>
590
591 PR ld/19645
592 * bfdlink.h (bfd_link_elf_stt_common): New enum.
593 (bfd_link_info): Add elf_stt_common.
594
5952016-02-26 H.J. Lu <hongjiu.lu@intel.com>
596
597 PR ld/19636
598 PR ld/19704
599 PR ld/19719
600 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
601
6022016-02-19 Matthew Wahab <matthew.wahab@arm.com>
603 Jiong Wang <jiong.wang@arm.com>
604
605 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
606
6072016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
608 Janek van Oirschot <jvanoirs@synopsys.com>
609
610 * opcode/arc.h (arc_opcode arc_relax_opcodes)
611 (arc_num_relax_opcodes): Declare.
612
6132016-02-09 Nick Clifton <nickc@redhat.com>
614
615 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
616 * opcode/nds32.h (nds32_r45map): Likewise.
617 (nds32_r54map): Likewise.
618 * opcode/visium.h (gen_reg_table): Likewise.
619 (fp_reg_table, cc_table, opcode_table): Likewise.
620
6212016-02-09 Alan Modra <amodra@gmail.com>
622
623 PR 16583
624 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
625
6262016-02-04 Nick Clifton <nickc@redhat.com>
627
628 PR target/19561
629 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
630 (RRUX): Synthesise using case 2 rather than 7.
631
6322016-01-19 John Baldwin <jhb@FreeBSD.org>
633
634 * elf/common.h (NT_FREEBSD_THRMISC): Define.
635 (NT_FREEBSD_PROCSTAT_PROC): Define.
636 (NT_FREEBSD_PROCSTAT_FILES): Define.
637 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
638 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
639 (NT_FREEBSD_PROCSTAT_UMASK): Define.
640 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
641 (NT_FREEBSD_PROCSTAT_OSREL): Define.
642 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
643 (NT_FREEBSD_PROCSTAT_AUXV): Define.
644
6452016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
646 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
647
648 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
649 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
650 (ARC_TLS_LE_32): Fixed formula.
651 (ARC_TLS_GD_LD): Use new special function.
652 * opcode/arc-func.h: Changed all the replacement
653 functions to clear the patching bits before doing an or it with the value
654 argument.
655
6562016-01-18 Nick Clifton <nickc@redhat.com>
657
658 PR ld/19440
659 * coff/internal.h (internal_syment): Use int to hold section
660 number.
661 (N_UNDEF): Cast to int not short.
662 (N_ABS): Likewise.
663 (N_DEBUG): Likewise.
664 (N_TV): Likewise.
665 (P_TV): Likewise.
666
6672016-01-11 Nick Clifton <nickc@redhat.com>
668
669 Import this change from GCC mainline:
670
671 2016-01-07 Mike Frysinger <vapier@gentoo.org>
672
673 * longlong.h: Change !__SHMEDIA__ to
674 (!defined (__SHMEDIA__) || !__SHMEDIA__).
675 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
676
6772016-01-06 Maciej W. Rozycki <macro@imgtec.com>
678
679 * opcode/mips.h: Add a summary of MIPS16 operand codes.
680
6812016-01-05 Mike Frysinger <vapier@gentoo.org>
682
683 * libiberty.h (dupargv): Change arg to char * const *.
684 (writeargv, countargv): Likewise.
685
6862016-01-01 Alan Modra <amodra@gmail.com>
687
688 Update year range in copyright notice of all files.
689
690For older changes see ChangeLog-0415, aout/ChangeLog-9115,
691cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
692mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
693som/ChangeLog-1015, and vms/ChangeLog-1015
694\f
695Copyright (C) 2016 Free Software Foundation, Inc.
696
697Copying and distribution of this file, with or without modification,
698are permitted in any medium without royalty provided the copyright
699notice and this notice are preserved.
700
701Local Variables:
702mode: change-log
703left-margin: 8
704fill-column: 74
705version-control: never
706End:
GDB Binutils - Deliverables
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