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libctf: implementation definitions related to file creation
[deliverable/binutils-gdb.git] / include / ChangeLog
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12019-05-28 Nick Alcock <nick.alcock@oracle.com>
2
3 * ctf-api.h (ctf_errno): New declaration.
4 (ctf_errmsg): Likewise.
5
62019-05-28 Nick Alcock <nick.alcock@oracle.com>
7
8 * ctf-api.h (ctf_setdebug): New.
9 (ctf_getdebug): Likewise.
10
112019-05-28 Nick Alcock <nick.alcock@oracle.com>
12
13 * ctf-api.h: New file.
14
152019-05-28 Nick Alcock <nick.alcock@oracle.com>
16
17 * ctf.h: New file.
18
192019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
20
21 * elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define.
22 (STO_AARCH64_VARIANT_PCS): Define.
23
242019-05-24 Alan Modra <amodra@gmail.com>
25
26 * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
27 (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
28 (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
29 (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
30 (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
31 (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
32 (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
33 (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
34 (R_PPC64_D28, R_PPC64_PCREL28): Define.
35
362019-05-24 Peter Bergner <bergner@linux.ibm.com>
37 Alan Modra <amodra@gmail.com>
38
39 * dis-asm.h (WIDE_OUTPUT): Define.
40 * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
41 (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
42 (PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
43
442019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
45
46 * elf/bpf.h: New file.
47
482019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
49
50 * elf/arm.h (Tag_MVE_arch): Define new enum value.
51 * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
52
532019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
54
55 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
56 operand.
57
582019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
59
60 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
61 iclass.
62
632019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
64
65 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
66
672019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
68
69 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
70 iclass.
71
722019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
73
74 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
75 operand.
76 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
77
782019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
79
80 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
81
822019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
83
84 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
85
862019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
87
88 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
89
902019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
91
92 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
93
942019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
95
96 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
97
982019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
99
100 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
101
1022019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
103
104 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
105
1062019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
107
108 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
109 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
110 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
111 feature macros.
112
1132019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
114 Faraz Shahbazker <fshahbazker@wavecomp.com>
115
116 * opcode/mips.h (ASE_EVA_R6): New macro.
117 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
118
1192019-05-01 Sudakshina Das <sudi.das@arm.com>
120
121 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
122 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
123
1242019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
125 Faraz Shahbazker <fshahbazker@wavecomp.com>
126
127 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
128 (M_SCWP_AB, M_SCDP_AB): Likewise.
129
1302019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
131
132 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
133
1342019-04-15 Sudakshina Das <sudi.das@arm.com>
135
136 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
137
1382019-04-15 Sudakshina Das <sudi.das@arm.com>
139
140 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
141
1422019-04-15 Sudakshina Das <sudi.das@arm.com>
143
144 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
145
1462019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
147
148 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
149 (MAX_TAG_CPU_ARCH): Set value to above macro.
150 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
151 (ARM_AEXT_V8_1M_MAIN): Likewise.
152 (ARM_AEXT2_V8_1M_MAIN): Likewise.
153 (ARM_ARCH_V8_1M_MAIN): Likewise.
154
1552019-04-11 Sudakshina Das <sudi.das@arm.com>
156
157 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
158
1592019-04-08 H.J. Lu <hongjiu.lu@intel.com>
160
161 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
162
1632019-04-07 Alan Modra <amodra@gmail.com>
164
165 Merge from gcc.
166 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
167 PR89877
168 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
169 (sub_ddmmss): Likewise.
170
1712019-04-06 H.J. Lu <hongjiu.lu@intel.com>
172
173 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
174
1752019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
176
177 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
178 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
179 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
180 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
181 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
182 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
183 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
184 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
185
1862019-03-28 Alan Modra <amodra@gmail.com>
187
188 PR 24390
189 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
190
1912019-03-25 Tamar Christina <tamar.christina@arm.com>
192
193 * dis-asm.h (struct disassemble_info): Add stop_offset.
194
1952019-03-13 Sudakshina Das <sudi.das@arm.com>
196
197 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
198
1992019-03-13 Sudakshina Das <sudi.das@arm.com>
200 Szabolcs Nagy <szabolcs.nagy@arm.com>
201
202 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
203
2042019-03-13 Sudakshina Das <sudi.das@arm.com>
205
206 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
207 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
208 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
209
2102019-02-20 Alan Hayward <alan.hayward@arm.com>
211
212 * elf/common.h (NT_ARM_PAC_MASK): Add define.
213
2142019-02-15 Saagar Jha <saagar@saagarjha.com>
215
216 * mach-o/loader.h: Use new OS names in comments.
217
2182019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
219
220 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
221 (splay_tree_delete_value_fn): Likewise.
222
2232019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
224
225 * opcode/s390.h (enum s390_opcode_cpu_val): Add
226 S390_OPCODE_ARCH13.
227
2282019-01-25 Sudakshina Das <sudi.das@arm.com>
229 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
230
231 * opcode/aarch64.h (enum aarch64_opnd): Remove
232 AARCH64_OPND_ADDR_SIMPLE_2.
233 (enum aarch64_insn_class): Remove ldstgv_indexed.
234
2352019-01-22 Tom Tromey <tom@tromey.com>
236
237 * coff/ecoff.h: Include coff/sym.h.
238
2392018-06-24 Nick Clifton <nickc@redhat.com>
240
241 2.32 branch created.
242
2432019-01-16 Kito Cheng <kito@andestech.com>
244
245 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
246 (Tag_RISCV_arch): Likewise.
247 (Tag_RISCV_priv_spec): Likewise.
248 (Tag_RISCV_priv_spec_minor): Likewise.
249 (Tag_RISCV_priv_spec_revision): Likewise.
250 (Tag_RISCV_unaligned_access): Likewise.
251 (Tag_RISCV_stack_align): Likewise.
252
2532019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
254
255 * dis-asm.h: include <string.h>
256
2572019-01-10 Nick Clifton <nickc@redhat.com>
258
259 * Merge from GCC:
260 2018-12-22 Jason Merrill <jason@redhat.com>
261
262 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
263 ARM, HP, and EDG demangling styles.
264
2652019-01-09 Sandra Loosemore <sandra@codesourcery.com>
266
267 Merge from GCC:
268 PR other/16615
269
270 * libiberty.h: Mechanically replace "can not" with "cannot".
271 * plugin-api.h: Likewise.
272
2732018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
274
275 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
276 (E_FLAG_RX_V3): New RXv3 type.
277 * opcode/rx.h (RX_Size): Add double size.
278 (RX_Operand_Type): Add double FPU registers.
279 (RX_Opcode_ID): Add new instuctions.
280
2812019-01-01 Alan Modra <amodra@gmail.com>
282
283 Update year range in copyright notice of all files.
284
285For older changes see ChangeLog-2018
286\f
287Copyright (C) 2019 Free Software Foundation, Inc.
288
289Copying and distribution of this file, with or without modification,
290are permitted in any medium without royalty provided the copyright
291notice and this notice are preserved.
292
293Local Variables:
294mode: change-log
295left-margin: 8
296fill-column: 74
297version-control: never
298End:
GDB Binutils - Deliverables
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