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PE linker segmentation fault with MALLOC_PERTURB_=1
[deliverable/binutils-gdb.git] / include / ChangeLog
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12019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
2
3 * elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define.
4 (STO_AARCH64_VARIANT_PCS): Define.
5
62019-05-24 Alan Modra <amodra@gmail.com>
7
8 * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
9 (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
10 (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
11 (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
12 (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
13 (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
14 (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
15 (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
16 (R_PPC64_D28, R_PPC64_PCREL28): Define.
17
182019-05-24 Peter Bergner <bergner@linux.ibm.com>
19 Alan Modra <amodra@gmail.com>
20
21 * dis-asm.h (WIDE_OUTPUT): Define.
22 * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
23 (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
24 (PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
25
262019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
27
28 * elf/bpf.h: New file.
29
302019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
31
32 * elf/arm.h (Tag_MVE_arch): Define new enum value.
33 * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
34
352019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
36
37 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
38 operand.
39
402019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
41
42 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
43 iclass.
44
452019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
46
47 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
48
492019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
50
51 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
52 iclass.
53
542019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
55
56 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
57 operand.
58 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
59
602019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
61
62 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
63
642019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
65
66 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
67
682019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
69
70 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
71
722019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
73
74 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
75
762019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
77
78 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
79
802019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
81
82 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
83
842019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
85
86 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
87
882019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
89
90 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
91 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
92 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
93 feature macros.
94
952019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
96 Faraz Shahbazker <fshahbazker@wavecomp.com>
97
98 * opcode/mips.h (ASE_EVA_R6): New macro.
99 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
100
1012019-05-01 Sudakshina Das <sudi.das@arm.com>
102
103 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
104 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
105
1062019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
107 Faraz Shahbazker <fshahbazker@wavecomp.com>
108
109 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
110 (M_SCWP_AB, M_SCDP_AB): Likewise.
111
1122019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
113
114 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
115
1162019-04-15 Sudakshina Das <sudi.das@arm.com>
117
118 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
119
1202019-04-15 Sudakshina Das <sudi.das@arm.com>
121
122 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
123
1242019-04-15 Sudakshina Das <sudi.das@arm.com>
125
126 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
127
1282019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
129
130 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
131 (MAX_TAG_CPU_ARCH): Set value to above macro.
132 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
133 (ARM_AEXT_V8_1M_MAIN): Likewise.
134 (ARM_AEXT2_V8_1M_MAIN): Likewise.
135 (ARM_ARCH_V8_1M_MAIN): Likewise.
136
1372019-04-11 Sudakshina Das <sudi.das@arm.com>
138
139 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
140
1412019-04-08 H.J. Lu <hongjiu.lu@intel.com>
142
143 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
144
1452019-04-07 Alan Modra <amodra@gmail.com>
146
147 Merge from gcc.
148 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
149 PR89877
150 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
151 (sub_ddmmss): Likewise.
152
1532019-04-06 H.J. Lu <hongjiu.lu@intel.com>
154
155 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
156
1572019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
158
159 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
160 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
161 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
162 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
163 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
164 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
165 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
166 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
167
1682019-03-28 Alan Modra <amodra@gmail.com>
169
170 PR 24390
171 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
172
1732019-03-25 Tamar Christina <tamar.christina@arm.com>
174
175 * dis-asm.h (struct disassemble_info): Add stop_offset.
176
1772019-03-13 Sudakshina Das <sudi.das@arm.com>
178
179 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
180
1812019-03-13 Sudakshina Das <sudi.das@arm.com>
182 Szabolcs Nagy <szabolcs.nagy@arm.com>
183
184 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
185
1862019-03-13 Sudakshina Das <sudi.das@arm.com>
187
188 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
189 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
190 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
191
1922019-02-20 Alan Hayward <alan.hayward@arm.com>
193
194 * elf/common.h (NT_ARM_PAC_MASK): Add define.
195
1962019-02-15 Saagar Jha <saagar@saagarjha.com>
197
198 * mach-o/loader.h: Use new OS names in comments.
199
2002019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
201
202 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
203 (splay_tree_delete_value_fn): Likewise.
204
2052019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
206
207 * opcode/s390.h (enum s390_opcode_cpu_val): Add
208 S390_OPCODE_ARCH13.
209
2102019-01-25 Sudakshina Das <sudi.das@arm.com>
211 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
212
213 * opcode/aarch64.h (enum aarch64_opnd): Remove
214 AARCH64_OPND_ADDR_SIMPLE_2.
215 (enum aarch64_insn_class): Remove ldstgv_indexed.
216
2172019-01-22 Tom Tromey <tom@tromey.com>
218
219 * coff/ecoff.h: Include coff/sym.h.
220
2212018-06-24 Nick Clifton <nickc@redhat.com>
222
223 2.32 branch created.
224
2252019-01-16 Kito Cheng <kito@andestech.com>
226
227 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
228 (Tag_RISCV_arch): Likewise.
229 (Tag_RISCV_priv_spec): Likewise.
230 (Tag_RISCV_priv_spec_minor): Likewise.
231 (Tag_RISCV_priv_spec_revision): Likewise.
232 (Tag_RISCV_unaligned_access): Likewise.
233 (Tag_RISCV_stack_align): Likewise.
234
2352019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
236
237 * dis-asm.h: include <string.h>
238
2392019-01-10 Nick Clifton <nickc@redhat.com>
240
241 * Merge from GCC:
242 2018-12-22 Jason Merrill <jason@redhat.com>
243
244 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
245 ARM, HP, and EDG demangling styles.
246
2472019-01-09 Sandra Loosemore <sandra@codesourcery.com>
248
249 Merge from GCC:
250 PR other/16615
251
252 * libiberty.h: Mechanically replace "can not" with "cannot".
253 * plugin-api.h: Likewise.
254
2552018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
256
257 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
258 (E_FLAG_RX_V3): New RXv3 type.
259 * opcode/rx.h (RX_Size): Add double size.
260 (RX_Operand_Type): Add double FPU registers.
261 (RX_Opcode_ID): Add new instuctions.
262
2632019-01-01 Alan Modra <amodra@gmail.com>
264
265 Update year range in copyright notice of all files.
266
267For older changes see ChangeLog-2018
268\f
269Copyright (C) 2019 Free Software Foundation, Inc.
270
271Copying and distribution of this file, with or without modification,
272are permitted in any medium without royalty provided the copyright
273notice and this notice are preserved.
274
275Local Variables:
276mode: change-log
277left-margin: 8
278fill-column: 74
279version-control: never
280End:
GDB Binutils - Deliverables
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