| | 1 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 2 | |
| | 3 | * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs |
| | 4 | iclass. |
| | 5 | |
| | 6 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 7 | |
| | 8 | * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand. |
| | 9 | |
| | 10 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 11 | |
| | 12 | * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd |
| | 13 | iclass. |
| | 14 | |
| | 15 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 16 | |
| | 17 | * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22 |
| | 18 | operand. |
| | 19 | (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass. |
| | 20 | |
| | 21 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 22 | |
| | 23 | * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass. |
| | 24 | |
| | 25 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 26 | |
| | 27 | * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass. |
| | 28 | |
| | 29 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 30 | |
| | 31 | * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass. |
| | 32 | |
| | 33 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 34 | |
| | 35 | * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand. |
| | 36 | |
| | 37 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 38 | |
| | 39 | * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand. |
| | 40 | |
| | 41 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 42 | |
| | 43 | * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass. |
| | 44 | |
| | 45 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 46 | |
| | 47 | * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand. |
| | 48 | |
| | 49 | 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| | 50 | |
| | 51 | * opcode/aarch64.h (AARCH64_FEATURE_SVE2 |
| | 52 | AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM, |
| | 53 | AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New |
| | 54 | feature macros. |
| | 55 | |
| | 56 | 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com> |
| | 57 | Faraz Shahbazker <fshahbazker@wavecomp.com> |
| | 58 | |
| | 59 | * opcode/mips.h (ASE_EVA_R6): New macro. |
| | 60 | (M_LLWPE_AB, M_SCWPE_AB): New enum values. |
| | 61 | |
| | 62 | 2019-05-01 Sudakshina Das <sudi.das@arm.com> |
| | 63 | |
| | 64 | * opcode/aarch64.h (AARCH64_FEATURE_TME): New. |
| | 65 | (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16. |
| | 66 | |
| | 67 | 2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com> |
| | 68 | Faraz Shahbazker <fshahbazker@wavecomp.com> |
| | 69 | |
| | 70 | * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values. |
| | 71 | (M_SCWP_AB, M_SCDP_AB): Likewise. |
| | 72 | |
| | 73 | 2019-04-25 Maciej W. Rozycki <macro@linux-mips.org> |
| | 74 | |
| | 75 | * opcode/mips.h: Update comment for MIPS32 CODE20 operand. |
| | 76 | |
| | 77 | 2019-04-15 Sudakshina Das <sudi.das@arm.com> |
| | 78 | |
| | 79 | * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12. |
| | 80 | |
| | 81 | 2019-04-15 Sudakshina Das <sudi.das@arm.com> |
| | 82 | |
| | 83 | * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18. |
| | 84 | |
| | 85 | 2019-04-15 Sudakshina Das <sudi.das@arm.com> |
| | 86 | |
| | 87 | * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16. |
| | 88 | |
| | 89 | 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> |
| | 90 | |
| | 91 | * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro. |
| | 92 | (MAX_TAG_CPU_ARCH): Set value to above macro. |
| | 93 | * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro. |
| | 94 | (ARM_AEXT_V8_1M_MAIN): Likewise. |
| | 95 | (ARM_AEXT2_V8_1M_MAIN): Likewise. |
| | 96 | (ARM_ARCH_V8_1M_MAIN): Likewise. |
| | 97 | |
| | 98 | 2019-04-11 Sudakshina Das <sudi.das@arm.com> |
| | 99 | |
| | 100 | * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP. |
| | 101 | |
| | 102 | 2019-04-08 H.J. Lu <hongjiu.lu@intel.com> |
| | 103 | |
| | 104 | * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New. |
| | 105 | |
| | 106 | 2019-04-07 Alan Modra <amodra@gmail.com> |
| | 107 | |
| | 108 | Merge from gcc. |
| | 109 | 2019-04-03 Vineet Gupta <vgupta@synopsys.com> |
| | 110 | PR89877 |
| | 111 | * longlong.h [__arc__] (add_ssaaaa): Add cc clobber. |
| | 112 | (sub_ddmmss): Likewise. |
| | 113 | |
| | 114 | 2019-04-06 H.J. Lu <hongjiu.lu@intel.com> |
| | 115 | |
| | 116 | * bfdlink.h (bfd_link_info): Remove x86-specific linker options. |
| | 117 | |
| | 118 | 2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| | 119 | |
| | 120 | * opcode/arm.h (FPU_NEON_ARMV8_1): New. |
| | 121 | (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1. |
| | 122 | (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise. |
| | 123 | (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise. |
| | 124 | (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New. |
| | 125 | (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New. |
| | 126 | (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New. |
| | 127 | (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New. |
| | 128 | |
| | 129 | 2019-03-28 Alan Modra <amodra@gmail.com> |
| | 130 | |
| | 131 | PR 24390 |
| | 132 | * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment. |
| | 133 | |
| | 134 | 2019-03-25 Tamar Christina <tamar.christina@arm.com> |
| | 135 | |
| | 136 | * dis-asm.h (struct disassemble_info): Add stop_offset. |
| | 137 | |
| | 138 | 2019-03-13 Sudakshina Das <sudi.das@arm.com> |
| | 139 | |
| | 140 | * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. |
| | 141 | |
| | 142 | 2019-03-13 Sudakshina Das <sudi.das@arm.com> |
| | 143 | Szabolcs Nagy <szabolcs.nagy@arm.com> |
| | 144 | |
| | 145 | * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. |
| | 146 | |
| | 147 | 2019-03-13 Sudakshina Das <sudi.das@arm.com> |
| | 148 | |
| | 149 | * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. |
| | 150 | (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. |
| | 151 | (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. |
| | 152 | |
| | 153 | 2019-02-20 Alan Hayward <alan.hayward@arm.com> |
| | 154 | |
| | 155 | * elf/common.h (NT_ARM_PAC_MASK): Add define. |
| | 156 | |
| | 157 | 2019-02-15 Saagar Jha <saagar@saagarjha.com> |
| | 158 | |
| | 159 | * mach-o/loader.h: Use new OS names in comments. |
| | 160 | |
| | 161 | 2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be> |
| | 162 | |
| | 163 | * splay-tree.h (splay_tree_delete_key_fn): Update comment. |
| | 164 | (splay_tree_delete_value_fn): Likewise. |
| | 165 | |
| | 166 | 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com> |
| | 167 | |
| | 168 | * opcode/s390.h (enum s390_opcode_cpu_val): Add |
| | 169 | S390_OPCODE_ARCH13. |
| | 170 | |
| | 171 | 2019-01-25 Sudakshina Das <sudi.das@arm.com> |
| | 172 | Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> |
| | 173 | |
| | 174 | * opcode/aarch64.h (enum aarch64_opnd): Remove |
| | 175 | AARCH64_OPND_ADDR_SIMPLE_2. |
| | 176 | (enum aarch64_insn_class): Remove ldstgv_indexed. |
| | 177 | |
| | 178 | 2019-01-22 Tom Tromey <tom@tromey.com> |
| | 179 | |
| | 180 | * coff/ecoff.h: Include coff/sym.h. |
| | 181 | |
| | 182 | 2018-06-24 Nick Clifton <nickc@redhat.com> |
| | 183 | |
| | 184 | 2.32 branch created. |
| | 185 | |
| | 186 | 2019-01-16 Kito Cheng <kito@andestech.com> |
| | 187 | |
| | 188 | * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define. |
| | 189 | (Tag_RISCV_arch): Likewise. |
| | 190 | (Tag_RISCV_priv_spec): Likewise. |
| | 191 | (Tag_RISCV_priv_spec_minor): Likewise. |
| | 192 | (Tag_RISCV_priv_spec_revision): Likewise. |
| | 193 | (Tag_RISCV_unaligned_access): Likewise. |
| | 194 | (Tag_RISCV_stack_align): Likewise. |
| | 195 | |
| | 196 | 2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru> |
| | 197 | |
| | 198 | * dis-asm.h: include <string.h> |
| | 199 | |
| | 200 | 2019-01-10 Nick Clifton <nickc@redhat.com> |
| | 201 | |
| | 202 | * Merge from GCC: |
| | 203 | 2018-12-22 Jason Merrill <jason@redhat.com> |
| | 204 | |
| | 205 | * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid, |
| | 206 | ARM, HP, and EDG demangling styles. |
| | 207 | |
| | 208 | 2019-01-09 Sandra Loosemore <sandra@codesourcery.com> |
| | 209 | |
| | 210 | Merge from GCC: |
| | 211 | PR other/16615 |
| | 212 | |
| | 213 | * libiberty.h: Mechanically replace "can not" with "cannot". |
| | 214 | * plugin-api.h: Likewise. |
| | 215 | |
| | 216 | 2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp> |
| | 217 | |
| | 218 | * elf/rx.h (EF_RX_CPU_MASK): Update new bits. |
| | 219 | (E_FLAG_RX_V3): New RXv3 type. |
| | 220 | * opcode/rx.h (RX_Size): Add double size. |
| | 221 | (RX_Operand_Type): Add double FPU registers. |
| | 222 | (RX_Opcode_ID): Add new instuctions. |
| | 223 | |
| | 224 | 2019-01-01 Alan Modra <amodra@gmail.com> |
| | 225 | |
| | 226 | Update year range in copyright notice of all files. |
| | 227 | |
| | 228 | For older changes see ChangeLog-2018 |
| | 229 | \f |
| | 230 | Copyright (C) 2019 Free Software Foundation, Inc. |
| | 231 | |
| | 232 | Copying and distribution of this file, with or without modification, |
| | 233 | are permitted in any medium without royalty provided the copyright |
| | 234 | notice and this notice are preserved. |
| | 235 | |
| | 236 | Local Variables: |
| | 237 | mode: change-log |
| | 238 | left-margin: 8 |
| | 239 | fill-column: 74 |
| | 240 | version-control: never |
| | 241 | End: |
projects / deliverable / binutils-gdb.git / blame_incremental