| 1 | /* |
| 2 | * Definitions for the NVM Express interface |
| 3 | * Copyright (c) 2011-2014, Intel Corporation. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _LINUX_NVME_H |
| 16 | #define _LINUX_NVME_H |
| 17 | |
| 18 | #include <uapi/linux/nvme.h> |
| 19 | #include <linux/pci.h> |
| 20 | #include <linux/miscdevice.h> |
| 21 | #include <linux/kref.h> |
| 22 | #include <linux/blk-mq.h> |
| 23 | |
| 24 | struct nvme_bar { |
| 25 | __u64 cap; /* Controller Capabilities */ |
| 26 | __u32 vs; /* Version */ |
| 27 | __u32 intms; /* Interrupt Mask Set */ |
| 28 | __u32 intmc; /* Interrupt Mask Clear */ |
| 29 | __u32 cc; /* Controller Configuration */ |
| 30 | __u32 rsvd1; /* Reserved */ |
| 31 | __u32 csts; /* Controller Status */ |
| 32 | __u32 rsvd2; /* Reserved */ |
| 33 | __u32 aqa; /* Admin Queue Attributes */ |
| 34 | __u64 asq; /* Admin SQ Base Address */ |
| 35 | __u64 acq; /* Admin CQ Base Address */ |
| 36 | }; |
| 37 | |
| 38 | #define NVME_CAP_MQES(cap) ((cap) & 0xffff) |
| 39 | #define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff) |
| 40 | #define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf) |
| 41 | #define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf) |
| 42 | #define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf) |
| 43 | |
| 44 | enum { |
| 45 | NVME_CC_ENABLE = 1 << 0, |
| 46 | NVME_CC_CSS_NVM = 0 << 4, |
| 47 | NVME_CC_MPS_SHIFT = 7, |
| 48 | NVME_CC_ARB_RR = 0 << 11, |
| 49 | NVME_CC_ARB_WRRU = 1 << 11, |
| 50 | NVME_CC_ARB_VS = 7 << 11, |
| 51 | NVME_CC_SHN_NONE = 0 << 14, |
| 52 | NVME_CC_SHN_NORMAL = 1 << 14, |
| 53 | NVME_CC_SHN_ABRUPT = 2 << 14, |
| 54 | NVME_CC_SHN_MASK = 3 << 14, |
| 55 | NVME_CC_IOSQES = 6 << 16, |
| 56 | NVME_CC_IOCQES = 4 << 20, |
| 57 | NVME_CSTS_RDY = 1 << 0, |
| 58 | NVME_CSTS_CFS = 1 << 1, |
| 59 | NVME_CSTS_SHST_NORMAL = 0 << 2, |
| 60 | NVME_CSTS_SHST_OCCUR = 1 << 2, |
| 61 | NVME_CSTS_SHST_CMPLT = 2 << 2, |
| 62 | NVME_CSTS_SHST_MASK = 3 << 2, |
| 63 | }; |
| 64 | |
| 65 | #define NVME_VS(major, minor) (major << 16 | minor) |
| 66 | |
| 67 | extern unsigned char nvme_io_timeout; |
| 68 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) |
| 69 | |
| 70 | /* |
| 71 | * Represents an NVM Express device. Each nvme_dev is a PCI function. |
| 72 | */ |
| 73 | struct nvme_dev { |
| 74 | struct list_head node; |
| 75 | struct nvme_queue **queues; |
| 76 | struct request_queue *admin_q; |
| 77 | struct blk_mq_tag_set tagset; |
| 78 | struct blk_mq_tag_set admin_tagset; |
| 79 | u32 __iomem *dbs; |
| 80 | struct pci_dev *pci_dev; |
| 81 | struct dma_pool *prp_page_pool; |
| 82 | struct dma_pool *prp_small_pool; |
| 83 | int instance; |
| 84 | unsigned queue_count; |
| 85 | unsigned online_queues; |
| 86 | unsigned max_qid; |
| 87 | int q_depth; |
| 88 | u32 db_stride; |
| 89 | u32 ctrl_config; |
| 90 | struct msix_entry *entry; |
| 91 | struct nvme_bar __iomem *bar; |
| 92 | struct list_head namespaces; |
| 93 | struct kref kref; |
| 94 | struct miscdevice miscdev; |
| 95 | work_func_t reset_workfn; |
| 96 | struct work_struct reset_work; |
| 97 | char name[12]; |
| 98 | char serial[20]; |
| 99 | char model[40]; |
| 100 | char firmware_rev[8]; |
| 101 | u32 max_hw_sectors; |
| 102 | u32 stripe_size; |
| 103 | u32 page_size; |
| 104 | u16 oncs; |
| 105 | u16 abort_limit; |
| 106 | u8 event_limit; |
| 107 | u8 vwc; |
| 108 | u8 initialized; |
| 109 | }; |
| 110 | |
| 111 | /* |
| 112 | * An NVM Express namespace is equivalent to a SCSI LUN |
| 113 | */ |
| 114 | struct nvme_ns { |
| 115 | struct list_head list; |
| 116 | |
| 117 | struct nvme_dev *dev; |
| 118 | struct request_queue *queue; |
| 119 | struct gendisk *disk; |
| 120 | |
| 121 | unsigned ns_id; |
| 122 | int lba_shift; |
| 123 | int ms; |
| 124 | u64 mode_select_num_blocks; |
| 125 | u32 mode_select_block_len; |
| 126 | }; |
| 127 | |
| 128 | /* |
| 129 | * The nvme_iod describes the data in an I/O, including the list of PRP |
| 130 | * entries. You can't see it in this data structure because C doesn't let |
| 131 | * me express that. Use nvme_alloc_iod to ensure there's enough space |
| 132 | * allocated to store the PRP list. |
| 133 | */ |
| 134 | struct nvme_iod { |
| 135 | void *private; /* For the use of the submitter of the I/O */ |
| 136 | int npages; /* In the PRP list. 0 means small pool in use */ |
| 137 | int offset; /* Of PRP list */ |
| 138 | int nents; /* Used in scatterlist */ |
| 139 | int length; /* Of data, in bytes */ |
| 140 | dma_addr_t first_dma; |
| 141 | struct list_head node; |
| 142 | struct scatterlist sg[0]; |
| 143 | }; |
| 144 | |
| 145 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
| 146 | { |
| 147 | return (sector >> (ns->lba_shift - 9)); |
| 148 | } |
| 149 | |
| 150 | /** |
| 151 | * nvme_free_iod - frees an nvme_iod |
| 152 | * @dev: The device that the I/O was submitted to |
| 153 | * @iod: The memory to free |
| 154 | */ |
| 155 | void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod); |
| 156 | |
| 157 | int nvme_setup_prps(struct nvme_dev *, struct nvme_iod *, int, gfp_t); |
| 158 | struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write, |
| 159 | unsigned long addr, unsigned length); |
| 160 | void nvme_unmap_user_pages(struct nvme_dev *dev, int write, |
| 161 | struct nvme_iod *iod); |
| 162 | int nvme_submit_io_cmd(struct nvme_dev *, struct nvme_ns *, |
| 163 | struct nvme_command *, u32 *); |
| 164 | int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns); |
| 165 | int nvme_submit_admin_cmd(struct nvme_dev *, struct nvme_command *, |
| 166 | u32 *result); |
| 167 | int nvme_identify(struct nvme_dev *, unsigned nsid, unsigned cns, |
| 168 | dma_addr_t dma_addr); |
| 169 | int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid, |
| 170 | dma_addr_t dma_addr, u32 *result); |
| 171 | int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11, |
| 172 | dma_addr_t dma_addr, u32 *result); |
| 173 | |
| 174 | struct sg_io_hdr; |
| 175 | |
| 176 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); |
| 177 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); |
| 178 | int nvme_sg_get_version_num(int __user *ip); |
| 179 | |
| 180 | #endif /* _LINUX_NVME_H */ |