| 1 | #source: pic.s |
| 2 | #source: picdef.s |
| 3 | #ld: --emit-relocs |
| 4 | #objdump: -D -r |
| 5 | |
| 6 | .*elf32-spu |
| 7 | |
| 8 | |
| 9 | Disassembly of section \.text: |
| 10 | |
| 11 | 00000000 <before>: |
| 12 | \.\.\. |
| 13 | |
| 14 | 00000008 <_start>: |
| 15 | 8: 42 00 08 02 ila \$2,10 <_start\+0x8> |
| 16 | 8: SPU_ADDR18 \.text\+0x10 |
| 17 | c: 33 00 00 fe brsl \$126,10 <_start\+0x8> |
| 18 | c: SPU_REL16 \.text\+0x10 |
| 19 | 10: 08 1f 81 7e sf \$126,\$2,\$126 |
| 20 | 14: 42 00 02 04 ila \$4,4 <before\+0x4> |
| 21 | 14: SPU_ADDR18 \.text\+0x4 |
| 22 | 18: 42 00 42 05 ila \$5,84 <end> |
| 23 | 18: SPU_ADDR18 \.text\+0x84 |
| 24 | 1c: 42 00 04 06 ila \$6,8 <_start> |
| 25 | 1c: SPU_ADDR18 _start |
| 26 | 20: 42 00 42 07 ila \$7,84 <end> |
| 27 | 20: SPU_ADDR18 \.text\+0x84 |
| 28 | 24: 18 1f 82 04 a \$4,\$4,\$126 |
| 29 | 24: SPU_ADD_PIC before\+0x4 |
| 30 | 28: 18 1f 82 85 a \$5,\$5,\$126 |
| 31 | 28: SPU_ADD_PIC after-0x4 |
| 32 | 2c: 18 1f 83 06 a \$6,\$6,\$126 |
| 33 | 2c: SPU_ADD_PIC _start |
| 34 | 30: 18 1f 83 87 a \$7,\$7,\$126 |
| 35 | 30: SPU_ADD_PIC end |
| 36 | 34: 42 00 00 0e ila \$14,0 |
| 37 | 34: SPU_ADDR18 \.text |
| 38 | 38: 18 1f 87 0e a \$14,\$14,\$126 |
| 39 | 38: SPU_ADD_PIC before |
| 40 | 3c: 42 00 00 03 ila \$3,0 |
| 41 | 3c: SPU_ADDR18 undef |
| 42 | 40: 1c 00 01 83 ai \$3,\$3,0 |
| 43 | 40: SPU_ADD_PIC undef |
| 44 | 44: 41 00 00 07 ilhu \$7,0 |
| 45 | 44: SPU_ADDR16_HI ext |
| 46 | 48: 60 ab 3c 07 iohl \$7,22136 # 5678 |
| 47 | 48: SPU_ADDR16_LO ext |
| 48 | 4c: 18 1f 83 84 a \$4,\$7,\$126 |
| 49 | 4c: SPU_ADD_PIC ext |
| 50 | 50: 42 00 80 09 ila \$9,100 <loc> |
| 51 | 50: SPU_ADDR18 \.data |
| 52 | 54: 18 1f 84 85 a \$5,\$9,\$126 |
| 53 | 54: SPU_ADD_PIC loc |
| 54 | 58: 42 00 88 08 ila \$8,110 <glob> |
| 55 | 58: SPU_ADDR18 glob |
| 56 | 5c: 18 1f 84 06 a \$6,\$8,\$126 |
| 57 | 5c: SPU_ADD_PIC glob |
| 58 | 60: 42 00 90 09 ila \$9,120 .* |
| 59 | 60: SPU_ADDR18 _end |
| 60 | 64: 18 1f 84 89 a \$9,\$9,\$126 |
| 61 | 64: SPU_ADD_PIC _end |
| 62 | 68: 12 02 39 85 hbrr 7c <acall>,1234 <abscall> # 1234 |
| 63 | 68: SPU_REL16 abscall |
| 64 | 6c: 33 ff f2 82 lqr \$2,0 <before> |
| 65 | 6c: SPU_REL16 undef |
| 66 | 70: 23 ff f2 02 stqr \$2,0 <before> |
| 67 | 70: SPU_REL16 undef |
| 68 | 74: 33 8a c0 83 lqr \$3,5678 <ext> # 5678 |
| 69 | 74: SPU_REL16 ext |
| 70 | 78: 33 8a c2 04 lqr \$4,5688 <ext\+0x10> # 5688 |
| 71 | 78: SPU_REL16 ext\+0x10 |
| 72 | |
| 73 | 0000007c <acall>: |
| 74 | 7c: 33 02 37 00 brsl \$0,1234 <abscall> # 1234 |
| 75 | 7c: SPU_REL16 abscall |
| 76 | 80: 32 02 36 80 br 1234 <abscall> # 1234 |
| 77 | 80: SPU_REL16 abscall |
| 78 | |
| 79 | 00000084 <end>: |
| 80 | 84: 00 00 00 00 stop |
| 81 | |
| 82 | 00000088 <after>: |
| 83 | 88: 00 00 00 00 stop |
| 84 | |
| 85 | Disassembly of section \.data: |
| 86 | |
| 87 | 00000100 <loc>: |
| 88 | 100: 00 00 00 01 stop |
| 89 | \.\.\. |
| 90 | |
| 91 | 00000110 <glob>: |
| 92 | 110: 00 00 00 02 stop |
| 93 | \.\.\. |
| 94 | |
| 95 | Disassembly of section \.note\.spu_name: |
| 96 | |
| 97 | 00000000 <\.note\.spu_name>: |
| 98 | .* |
| 99 | .* |
| 100 | .* |
| 101 | .* |
| 102 | .* |
| 103 | .* |
| 104 | .* |
| 105 | #pass |