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[binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12019-04-15 Sudakshina Das <sudi.das@arm.com>
2
3 * arm-dis.c (thumb32_opcodes): New instructions for bf.
4
52019-04-15 Sudakshina Das <sudi.das@arm.com>
6
7 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
8
92019-04-15 Sudakshina Das <sudi.das@arm.com>
10
11 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
12
132019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
14
15 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
16
172019-04-12 John Darrington <john@darrington.wattle.id.au>
18
19 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
20 "optr". ("operator" is a reserved word in c++).
21
222019-04-11 Sudakshina Das <sudi.das@arm.com>
23
24 * aarch64-opc.c (aarch64_print_operand): Add case for
25 AARCH64_OPND_Rt_SP.
26 (verify_constraints): Likewise.
27 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
28 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
29 to accept Rt|SP as first operand.
30 (AARCH64_OPERANDS): Add new Rt_SP.
31 * aarch64-asm-2.c: Regenerated.
32 * aarch64-dis-2.c: Regenerated.
33 * aarch64-opc-2.c: Regenerated.
34
352019-04-11 Sudakshina Das <sudi.das@arm.com>
36
37 * aarch64-asm-2.c: Regenerated.
38 * aarch64-dis-2.c: Likewise.
39 * aarch64-opc-2.c: Likewise.
40 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
41
422019-04-09 Robert Suchanek <robert.suchanek@mips.com>
43
44 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
45
462019-04-08 H.J. Lu <hongjiu.lu@intel.com>
47
48 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
49 * i386-init.h: Regenerated.
50
512019-04-07 Alan Modra <amodra@gmail.com>
52
53 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
54 op_separator to control printing of spaces, comma and parens
55 rather than need_comma, need_paren and spaces vars.
56
572019-04-07 Alan Modra <amodra@gmail.com>
58
59 PR 24421
60 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
61 (print_insn_neon, print_insn_arm): Likewise.
62
632019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
64
65 * i386-dis-evex.h (evex_table): Updated to support BF16
66 instructions.
67 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
68 and EVEX_W_0F3872_P_3.
69 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
70 (cpu_flags): Add bitfield for CpuAVX512_BF16.
71 * i386-opc.h (enum): Add CpuAVX512_BF16.
72 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
73 * i386-opc.tbl: Add AVX512 BF16 instructions.
74 * i386-init.h: Regenerated.
75 * i386-tbl.h: Likewise.
76
772019-04-05 Alan Modra <amodra@gmail.com>
78
79 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
80 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
81 to favour printing of "-" branch hint when using the "y" bit.
82 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
83
842019-04-05 Alan Modra <amodra@gmail.com>
85
86 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
87 opcode until first operand is output.
88
892019-04-04 Peter Bergner <bergner@linux.ibm.com>
90
91 PR gas/24349
92 * ppc-opc.c (valid_bo_pre_v2): Add comments.
93 (valid_bo_post_v2): Add support for 'at' branch hints.
94 (insert_bo): Only error on branch on ctr.
95 (get_bo_hint_mask): New function.
96 (insert_boe): Add new 'branch_taken' formal argument. Add support
97 for inserting 'at' branch hints.
98 (extract_boe): Add new 'branch_taken' formal argument. Add support
99 for extracting 'at' branch hints.
100 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
101 (BOE): Delete operand.
102 (BOM, BOP): New operands.
103 (RM): Update value.
104 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
105 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
106 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
107 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
108 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
109 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
110 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
111 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
112 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
113 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
114 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
115 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
116 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
117 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
118 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
119 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
120 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
121 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
122 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
123 bttarl+>: New extended mnemonics.
124
1252019-03-28 Alan Modra <amodra@gmail.com>
126
127 PR 24390
128 * ppc-opc.c (BTF): Define.
129 (powerpc_opcodes): Use for mtfsb*.
130 * ppc-dis.c (print_insn_powerpc): Print fields with both
131 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
132
1332019-03-25 Tamar Christina <tamar.christina@arm.com>
134
135 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
136 (mapping_symbol_for_insn): Implement new algorithm.
137 (print_insn): Remove duplicate code.
138
1392019-03-25 Tamar Christina <tamar.christina@arm.com>
140
141 * aarch64-dis.c (print_insn_aarch64):
142 Implement override.
143
1442019-03-25 Tamar Christina <tamar.christina@arm.com>
145
146 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
147 order.
148
1492019-03-25 Tamar Christina <tamar.christina@arm.com>
150
151 * aarch64-dis.c (last_stop_offset): New.
152 (print_insn_aarch64): Use stop_offset.
153
1542019-03-19 H.J. Lu <hongjiu.lu@intel.com>
155
156 PR gas/24359
157 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
158 CPU_ANY_AVX2_FLAGS.
159 * i386-init.h: Regenerated.
160
1612019-03-18 H.J. Lu <hongjiu.lu@intel.com>
162
163 PR gas/24348
164 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
165 vmovdqu16, vmovdqu32 and vmovdqu64.
166 * i386-tbl.h: Regenerated.
167
1682019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
169
170 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
171 from vstrszb, vstrszh, and vstrszf.
172
1732019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
174
175 * s390-opc.txt: Add instruction descriptions.
176
1772019-02-08 Jim Wilson <jimw@sifive.com>
178
179 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
180 <bne>: Likewise.
181
1822019-02-07 Tamar Christina <tamar.christina@arm.com>
183
184 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
185
1862019-02-07 Tamar Christina <tamar.christina@arm.com>
187
188 PR binutils/23212
189 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
190 * aarch64-opc.c (verify_elem_sd): New.
191 (fields): Add FLD_sz entr.
192 * aarch64-tbl.h (_SIMD_INSN): New.
193 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
194 fmulx scalar and vector by element isns.
195
1962019-02-07 Nick Clifton <nickc@redhat.com>
197
198 * po/sv.po: Updated Swedish translation.
199
2002019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
201
202 * s390-mkopc.c (main): Accept arch13 as cpu string.
203 * s390-opc.c: Add new instruction formats and instruction opcode
204 masks.
205 * s390-opc.txt: Add new arch13 instructions.
206
2072019-01-25 Sudakshina Das <sudi.das@arm.com>
208
209 * aarch64-tbl.h (QL_LDST_AT): Update macro.
210 (aarch64_opcode): Change encoding for stg, stzg
211 st2g and st2zg.
212 * aarch64-asm-2.c: Regenerated.
213 * aarch64-dis-2.c: Regenerated.
214 * aarch64-opc-2.c: Regenerated.
215
2162019-01-25 Sudakshina Das <sudi.das@arm.com>
217
218 * aarch64-asm-2.c: Regenerated.
219 * aarch64-dis-2.c: Likewise.
220 * aarch64-opc-2.c: Likewise.
221 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
222
2232019-01-25 Sudakshina Das <sudi.das@arm.com>
224 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
225
226 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
227 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
228 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
229 * aarch64-dis.h (ext_addr_simple_2): Likewise.
230 * aarch64-opc.c (operand_general_constraint_met_p): Remove
231 case for ldstgv_indexed.
232 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
233 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
234 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
235 * aarch64-asm-2.c: Regenerated.
236 * aarch64-dis-2.c: Regenerated.
237 * aarch64-opc-2.c: Regenerated.
238
2392019-01-23 Nick Clifton <nickc@redhat.com>
240
241 * po/pt_BR.po: Updated Brazilian Portuguese translation.
242
2432019-01-21 Nick Clifton <nickc@redhat.com>
244
245 * po/de.po: Updated German translation.
246 * po/uk.po: Updated Ukranian translation.
247
2482019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
249 * mips-dis.c (mips_arch_choices): Fix typo in
250 gs464, gs464e and gs264e descriptors.
251
2522019-01-19 Nick Clifton <nickc@redhat.com>
253
254 * configure: Regenerate.
255 * po/opcodes.pot: Regenerate.
256
2572018-06-24 Nick Clifton <nickc@redhat.com>
258
259 2.32 branch created.
260
2612019-01-09 John Darrington <john@darrington.wattle.id.au>
262
263 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
264 if it is null.
265 -dis.c (opr_emit_disassembly): Do not omit an index if it is
266 zero.
267
2682019-01-09 Andrew Paprocki <andrew@ishiboo.com>
269
270 * configure: Regenerate.
271
2722019-01-07 Alan Modra <amodra@gmail.com>
273
274 * configure: Regenerate.
275 * po/POTFILES.in: Regenerate.
276
2772019-01-03 John Darrington <john@darrington.wattle.id.au>
278
279 * s12z-opc.c: New file.
280 * s12z-opc.h: New file.
281 * s12z-dis.c: Removed all code not directly related to display
282 of instructions. Used the interface provided by the new files
283 instead.
284 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
285 * Makefile.in: Regenerate.
286 * configure.ac (bfd_s12z_arch): Correct the dependencies.
287 * configure: Regenerate.
288
2892019-01-01 Alan Modra <amodra@gmail.com>
290
291 Update year range in copyright notice of all files.
292
293For older changes see ChangeLog-2018
294\f
295Copyright (C) 2019 Free Software Foundation, Inc.
296
297Copying and distribution of this file, with or without modification,
298are permitted in any medium without royalty provided the copyright
299notice and this notice are preserved.
300
301Local Variables:
302mode: change-log
303left-margin: 8
304fill-column: 74
305version-control: never
306End:
GDB Binutils - Deliverables
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