GAS: tc-s12z.c: int -> bfd_boolean
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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CommitLineData
12019-04-11 Sudakshina Das <sudi.das@arm.com>
2
3 * aarch64-opc.c (aarch64_print_operand): Add case for
4 AARCH64_OPND_Rt_SP.
5 (verify_constraints): Likewise.
6 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
7 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
8 to accept Rt|SP as first operand.
9 (AARCH64_OPERANDS): Add new Rt_SP.
10 * aarch64-asm-2.c: Regenerated.
11 * aarch64-dis-2.c: Regenerated.
12 * aarch64-opc-2.c: Regenerated.
13
142019-04-11 Sudakshina Das <sudi.das@arm.com>
15
16 * aarch64-asm-2.c: Regenerated.
17 * aarch64-dis-2.c: Likewise.
18 * aarch64-opc-2.c: Likewise.
19 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
20
212019-04-09 Robert Suchanek <robert.suchanek@mips.com>
22
23 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
24
252019-04-08 H.J. Lu <hongjiu.lu@intel.com>
26
27 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
28 * i386-init.h: Regenerated.
29
302019-04-07 Alan Modra <amodra@gmail.com>
31
32 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
33 op_separator to control printing of spaces, comma and parens
34 rather than need_comma, need_paren and spaces vars.
35
362019-04-07 Alan Modra <amodra@gmail.com>
37
38 PR 24421
39 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
40 (print_insn_neon, print_insn_arm): Likewise.
41
422019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
43
44 * i386-dis-evex.h (evex_table): Updated to support BF16
45 instructions.
46 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
47 and EVEX_W_0F3872_P_3.
48 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
49 (cpu_flags): Add bitfield for CpuAVX512_BF16.
50 * i386-opc.h (enum): Add CpuAVX512_BF16.
51 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
52 * i386-opc.tbl: Add AVX512 BF16 instructions.
53 * i386-init.h: Regenerated.
54 * i386-tbl.h: Likewise.
55
562019-04-05 Alan Modra <amodra@gmail.com>
57
58 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
59 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
60 to favour printing of "-" branch hint when using the "y" bit.
61 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
62
632019-04-05 Alan Modra <amodra@gmail.com>
64
65 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
66 opcode until first operand is output.
67
682019-04-04 Peter Bergner <bergner@linux.ibm.com>
69
70 PR gas/24349
71 * ppc-opc.c (valid_bo_pre_v2): Add comments.
72 (valid_bo_post_v2): Add support for 'at' branch hints.
73 (insert_bo): Only error on branch on ctr.
74 (get_bo_hint_mask): New function.
75 (insert_boe): Add new 'branch_taken' formal argument. Add support
76 for inserting 'at' branch hints.
77 (extract_boe): Add new 'branch_taken' formal argument. Add support
78 for extracting 'at' branch hints.
79 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
80 (BOE): Delete operand.
81 (BOM, BOP): New operands.
82 (RM): Update value.
83 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
84 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
85 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
86 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
87 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
88 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
89 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
90 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
91 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
92 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
93 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
94 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
95 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
96 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
97 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
98 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
99 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
100 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
101 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
102 bttarl+>: New extended mnemonics.
103
1042019-03-28 Alan Modra <amodra@gmail.com>
105
106 PR 24390
107 * ppc-opc.c (BTF): Define.
108 (powerpc_opcodes): Use for mtfsb*.
109 * ppc-dis.c (print_insn_powerpc): Print fields with both
110 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
111
1122019-03-25 Tamar Christina <tamar.christina@arm.com>
113
114 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
115 (mapping_symbol_for_insn): Implement new algorithm.
116 (print_insn): Remove duplicate code.
117
1182019-03-25 Tamar Christina <tamar.christina@arm.com>
119
120 * aarch64-dis.c (print_insn_aarch64):
121 Implement override.
122
1232019-03-25 Tamar Christina <tamar.christina@arm.com>
124
125 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
126 order.
127
1282019-03-25 Tamar Christina <tamar.christina@arm.com>
129
130 * aarch64-dis.c (last_stop_offset): New.
131 (print_insn_aarch64): Use stop_offset.
132
1332019-03-19 H.J. Lu <hongjiu.lu@intel.com>
134
135 PR gas/24359
136 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
137 CPU_ANY_AVX2_FLAGS.
138 * i386-init.h: Regenerated.
139
1402019-03-18 H.J. Lu <hongjiu.lu@intel.com>
141
142 PR gas/24348
143 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
144 vmovdqu16, vmovdqu32 and vmovdqu64.
145 * i386-tbl.h: Regenerated.
146
1472019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
148
149 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
150 from vstrszb, vstrszh, and vstrszf.
151
1522019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
153
154 * s390-opc.txt: Add instruction descriptions.
155
1562019-02-08 Jim Wilson <jimw@sifive.com>
157
158 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
159 <bne>: Likewise.
160
1612019-02-07 Tamar Christina <tamar.christina@arm.com>
162
163 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
164
1652019-02-07 Tamar Christina <tamar.christina@arm.com>
166
167 PR binutils/23212
168 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
169 * aarch64-opc.c (verify_elem_sd): New.
170 (fields): Add FLD_sz entr.
171 * aarch64-tbl.h (_SIMD_INSN): New.
172 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
173 fmulx scalar and vector by element isns.
174
1752019-02-07 Nick Clifton <nickc@redhat.com>
176
177 * po/sv.po: Updated Swedish translation.
178
1792019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
180
181 * s390-mkopc.c (main): Accept arch13 as cpu string.
182 * s390-opc.c: Add new instruction formats and instruction opcode
183 masks.
184 * s390-opc.txt: Add new arch13 instructions.
185
1862019-01-25 Sudakshina Das <sudi.das@arm.com>
187
188 * aarch64-tbl.h (QL_LDST_AT): Update macro.
189 (aarch64_opcode): Change encoding for stg, stzg
190 st2g and st2zg.
191 * aarch64-asm-2.c: Regenerated.
192 * aarch64-dis-2.c: Regenerated.
193 * aarch64-opc-2.c: Regenerated.
194
1952019-01-25 Sudakshina Das <sudi.das@arm.com>
196
197 * aarch64-asm-2.c: Regenerated.
198 * aarch64-dis-2.c: Likewise.
199 * aarch64-opc-2.c: Likewise.
200 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
201
2022019-01-25 Sudakshina Das <sudi.das@arm.com>
203 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
204
205 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
206 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
207 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
208 * aarch64-dis.h (ext_addr_simple_2): Likewise.
209 * aarch64-opc.c (operand_general_constraint_met_p): Remove
210 case for ldstgv_indexed.
211 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
212 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
213 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
214 * aarch64-asm-2.c: Regenerated.
215 * aarch64-dis-2.c: Regenerated.
216 * aarch64-opc-2.c: Regenerated.
217
2182019-01-23 Nick Clifton <nickc@redhat.com>
219
220 * po/pt_BR.po: Updated Brazilian Portuguese translation.
221
2222019-01-21 Nick Clifton <nickc@redhat.com>
223
224 * po/de.po: Updated German translation.
225 * po/uk.po: Updated Ukranian translation.
226
2272019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
228 * mips-dis.c (mips_arch_choices): Fix typo in
229 gs464, gs464e and gs264e descriptors.
230
2312019-01-19 Nick Clifton <nickc@redhat.com>
232
233 * configure: Regenerate.
234 * po/opcodes.pot: Regenerate.
235
2362018-06-24 Nick Clifton <nickc@redhat.com>
237
238 2.32 branch created.
239
2402019-01-09 John Darrington <john@darrington.wattle.id.au>
241
242 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
243 if it is null.
244 -dis.c (opr_emit_disassembly): Do not omit an index if it is
245 zero.
246
2472019-01-09 Andrew Paprocki <andrew@ishiboo.com>
248
249 * configure: Regenerate.
250
2512019-01-07 Alan Modra <amodra@gmail.com>
252
253 * configure: Regenerate.
254 * po/POTFILES.in: Regenerate.
255
2562019-01-03 John Darrington <john@darrington.wattle.id.au>
257
258 * s12z-opc.c: New file.
259 * s12z-opc.h: New file.
260 * s12z-dis.c: Removed all code not directly related to display
261 of instructions. Used the interface provided by the new files
262 instead.
263 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
264 * Makefile.in: Regenerate.
265 * configure.ac (bfd_s12z_arch): Correct the dependencies.
266 * configure: Regenerate.
267
2682019-01-01 Alan Modra <amodra@gmail.com>
269
270 Update year range in copyright notice of all files.
271
272For older changes see ChangeLog-2018
273\f
274Copyright (C) 2019 Free Software Foundation, Inc.
275
276Copying and distribution of this file, with or without modification,
277are permitted in any medium without royalty provided the copyright
278notice and this notice are preserved.
279
280Local Variables:
281mode: change-log
282left-margin: 8
283fill-column: 74
284version-control: never
285End:
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