PR gprof/13325
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
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CommitLineData
1/* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22#include "sysdep.h"
23#include "dis-asm.h"
24
25#ifdef ARCH_all
26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
29#define ARCH_avr
30#define ARCH_bfin
31#define ARCH_cr16
32#define ARCH_cris
33#define ARCH_crx
34#define ARCH_d10v
35#define ARCH_d30v
36#define ARCH_dlx
37#define ARCH_fr30
38#define ARCH_frv
39#define ARCH_h8300
40#define ARCH_h8500
41#define ARCH_hppa
42#define ARCH_i370
43#define ARCH_i386
44#define ARCH_i860
45#define ARCH_i960
46#define ARCH_ia64
47#define ARCH_ip2k
48#define ARCH_iq2000
49#define ARCH_lm32
50#define ARCH_m32c
51#define ARCH_m32r
52#define ARCH_m68hc11
53#define ARCH_m68hc12
54#define ARCH_m68k
55#define ARCH_m88k
56#define ARCH_mcore
57#define ARCH_mep
58#define ARCH_microblaze
59#define ARCH_mips
60#define ARCH_mmix
61#define ARCH_mn10200
62#define ARCH_mn10300
63#define ARCH_moxie
64#define ARCH_mt
65#define ARCH_msp430
66#define ARCH_ns32k
67#define ARCH_openrisc
68#define ARCH_or32
69#define ARCH_pdp11
70#define ARCH_pj
71#define ARCH_powerpc
72#define ARCH_rs6000
73#define ARCH_rx
74#define ARCH_s390
75#define ARCH_score
76#define ARCH_sh
77#define ARCH_sparc
78#define ARCH_spu
79#define ARCH_tic30
80#define ARCH_tic4x
81#define ARCH_tic54x
82#define ARCH_tic6x
83#define ARCH_tic80
84#define ARCH_tilegx
85#define ARCH_tilepro
86#define ARCH_v850
87#define ARCH_vax
88#define ARCH_w65
89#define ARCH_xstormy16
90#define ARCH_xc16x
91#define ARCH_xtensa
92#define ARCH_z80
93#define ARCH_z8k
94#define INCLUDE_SHMEDIA
95#endif
96
97#ifdef ARCH_m32c
98#include "m32c-desc.h"
99#endif
100
101disassembler_ftype
102disassembler (abfd)
103 bfd *abfd;
104{
105 enum bfd_architecture a = bfd_get_arch (abfd);
106 disassembler_ftype disassemble;
107
108 switch (a)
109 {
110 /* If you add a case to this table, also add it to the
111 ARCH_all definition right above this function. */
112#ifdef ARCH_alpha
113 case bfd_arch_alpha:
114 disassemble = print_insn_alpha;
115 break;
116#endif
117#ifdef ARCH_arc
118 case bfd_arch_arc:
119 disassemble = arc_get_disassembler (abfd);
120 break;
121#endif
122#ifdef ARCH_arm
123 case bfd_arch_arm:
124 if (bfd_big_endian (abfd))
125 disassemble = print_insn_big_arm;
126 else
127 disassemble = print_insn_little_arm;
128 break;
129#endif
130#ifdef ARCH_avr
131 case bfd_arch_avr:
132 disassemble = print_insn_avr;
133 break;
134#endif
135#ifdef ARCH_bfin
136 case bfd_arch_bfin:
137 disassemble = print_insn_bfin;
138 break;
139#endif
140#ifdef ARCH_cr16
141 case bfd_arch_cr16:
142 disassemble = print_insn_cr16;
143 break;
144#endif
145#ifdef ARCH_cris
146 case bfd_arch_cris:
147 disassemble = cris_get_disassembler (abfd);
148 break;
149#endif
150#ifdef ARCH_crx
151 case bfd_arch_crx:
152 disassemble = print_insn_crx;
153 break;
154#endif
155#ifdef ARCH_d10v
156 case bfd_arch_d10v:
157 disassemble = print_insn_d10v;
158 break;
159#endif
160#ifdef ARCH_d30v
161 case bfd_arch_d30v:
162 disassemble = print_insn_d30v;
163 break;
164#endif
165#ifdef ARCH_dlx
166 case bfd_arch_dlx:
167 /* As far as I know we only handle big-endian DLX objects. */
168 disassemble = print_insn_dlx;
169 break;
170#endif
171#ifdef ARCH_h8300
172 case bfd_arch_h8300:
173 if (bfd_get_mach (abfd) == bfd_mach_h8300h
174 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
175 disassemble = print_insn_h8300h;
176 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
177 || bfd_get_mach (abfd) == bfd_mach_h8300sn
178 || bfd_get_mach (abfd) == bfd_mach_h8300sx
179 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
180 disassemble = print_insn_h8300s;
181 else
182 disassemble = print_insn_h8300;
183 break;
184#endif
185#ifdef ARCH_h8500
186 case bfd_arch_h8500:
187 disassemble = print_insn_h8500;
188 break;
189#endif
190#ifdef ARCH_hppa
191 case bfd_arch_hppa:
192 disassemble = print_insn_hppa;
193 break;
194#endif
195#ifdef ARCH_i370
196 case bfd_arch_i370:
197 disassemble = print_insn_i370;
198 break;
199#endif
200#ifdef ARCH_i386
201 case bfd_arch_i386:
202 case bfd_arch_l1om:
203 case bfd_arch_k1om:
204 disassemble = print_insn_i386;
205 break;
206#endif
207#ifdef ARCH_i860
208 case bfd_arch_i860:
209 disassemble = print_insn_i860;
210 break;
211#endif
212#ifdef ARCH_i960
213 case bfd_arch_i960:
214 disassemble = print_insn_i960;
215 break;
216#endif
217#ifdef ARCH_ia64
218 case bfd_arch_ia64:
219 disassemble = print_insn_ia64;
220 break;
221#endif
222#ifdef ARCH_ip2k
223 case bfd_arch_ip2k:
224 disassemble = print_insn_ip2k;
225 break;
226#endif
227#ifdef ARCH_fr30
228 case bfd_arch_fr30:
229 disassemble = print_insn_fr30;
230 break;
231#endif
232#ifdef ARCH_lm32
233 case bfd_arch_lm32:
234 disassemble = print_insn_lm32;
235 break;
236#endif
237#ifdef ARCH_m32r
238 case bfd_arch_m32r:
239 disassemble = print_insn_m32r;
240 break;
241#endif
242#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
243 case bfd_arch_m68hc11:
244 disassemble = print_insn_m68hc11;
245 break;
246 case bfd_arch_m68hc12:
247 disassemble = print_insn_m68hc12;
248 break;
249#endif
250#ifdef ARCH_m68k
251 case bfd_arch_m68k:
252 disassemble = print_insn_m68k;
253 break;
254#endif
255#ifdef ARCH_m88k
256 case bfd_arch_m88k:
257 disassemble = print_insn_m88k;
258 break;
259#endif
260#ifdef ARCH_mt
261 case bfd_arch_mt:
262 disassemble = print_insn_mt;
263 break;
264#endif
265#ifdef ARCH_microblaze
266 case bfd_arch_microblaze:
267 disassemble = print_insn_microblaze;
268 break;
269#endif
270#ifdef ARCH_msp430
271 case bfd_arch_msp430:
272 disassemble = print_insn_msp430;
273 break;
274#endif
275#ifdef ARCH_ns32k
276 case bfd_arch_ns32k:
277 disassemble = print_insn_ns32k;
278 break;
279#endif
280#ifdef ARCH_mcore
281 case bfd_arch_mcore:
282 disassemble = print_insn_mcore;
283 break;
284#endif
285#ifdef ARCH_mep
286 case bfd_arch_mep:
287 disassemble = print_insn_mep;
288 break;
289#endif
290#ifdef ARCH_mips
291 case bfd_arch_mips:
292 if (bfd_big_endian (abfd))
293 disassemble = print_insn_big_mips;
294 else
295 disassemble = print_insn_little_mips;
296 break;
297#endif
298#ifdef ARCH_mmix
299 case bfd_arch_mmix:
300 disassemble = print_insn_mmix;
301 break;
302#endif
303#ifdef ARCH_mn10200
304 case bfd_arch_mn10200:
305 disassemble = print_insn_mn10200;
306 break;
307#endif
308#ifdef ARCH_mn10300
309 case bfd_arch_mn10300:
310 disassemble = print_insn_mn10300;
311 break;
312#endif
313#ifdef ARCH_openrisc
314 case bfd_arch_openrisc:
315 disassemble = print_insn_openrisc;
316 break;
317#endif
318#ifdef ARCH_or32
319 case bfd_arch_or32:
320 if (bfd_big_endian (abfd))
321 disassemble = print_insn_big_or32;
322 else
323 disassemble = print_insn_little_or32;
324 break;
325#endif
326#ifdef ARCH_pdp11
327 case bfd_arch_pdp11:
328 disassemble = print_insn_pdp11;
329 break;
330#endif
331#ifdef ARCH_pj
332 case bfd_arch_pj:
333 disassemble = print_insn_pj;
334 break;
335#endif
336#ifdef ARCH_powerpc
337 case bfd_arch_powerpc:
338 if (bfd_big_endian (abfd))
339 disassemble = print_insn_big_powerpc;
340 else
341 disassemble = print_insn_little_powerpc;
342 break;
343#endif
344#ifdef ARCH_rs6000
345 case bfd_arch_rs6000:
346 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
347 disassemble = print_insn_big_powerpc;
348 else
349 disassemble = print_insn_rs6000;
350 break;
351#endif
352#ifdef ARCH_rx
353 case bfd_arch_rx:
354 disassemble = print_insn_rx;
355 break;
356#endif
357#ifdef ARCH_s390
358 case bfd_arch_s390:
359 disassemble = print_insn_s390;
360 break;
361#endif
362#ifdef ARCH_score
363 case bfd_arch_score:
364 if (bfd_big_endian (abfd))
365 disassemble = print_insn_big_score;
366 else
367 disassemble = print_insn_little_score;
368 break;
369#endif
370#ifdef ARCH_sh
371 case bfd_arch_sh:
372 disassemble = print_insn_sh;
373 break;
374#endif
375#ifdef ARCH_sparc
376 case bfd_arch_sparc:
377 disassemble = print_insn_sparc;
378 break;
379#endif
380#ifdef ARCH_spu
381 case bfd_arch_spu:
382 disassemble = print_insn_spu;
383 break;
384#endif
385#ifdef ARCH_tic30
386 case bfd_arch_tic30:
387 disassemble = print_insn_tic30;
388 break;
389#endif
390#ifdef ARCH_tic4x
391 case bfd_arch_tic4x:
392 disassemble = print_insn_tic4x;
393 break;
394#endif
395#ifdef ARCH_tic54x
396 case bfd_arch_tic54x:
397 disassemble = print_insn_tic54x;
398 break;
399#endif
400#ifdef ARCH_tic6x
401 case bfd_arch_tic6x:
402 disassemble = print_insn_tic6x;
403 break;
404#endif
405#ifdef ARCH_tic80
406 case bfd_arch_tic80:
407 disassemble = print_insn_tic80;
408 break;
409#endif
410#ifdef ARCH_v850
411 case bfd_arch_v850:
412 disassemble = print_insn_v850;
413 break;
414#endif
415#ifdef ARCH_w65
416 case bfd_arch_w65:
417 disassemble = print_insn_w65;
418 break;
419#endif
420#ifdef ARCH_xstormy16
421 case bfd_arch_xstormy16:
422 disassemble = print_insn_xstormy16;
423 break;
424#endif
425#ifdef ARCH_xc16x
426 case bfd_arch_xc16x:
427 disassemble = print_insn_xc16x;
428 break;
429#endif
430#ifdef ARCH_xtensa
431 case bfd_arch_xtensa:
432 disassemble = print_insn_xtensa;
433 break;
434#endif
435#ifdef ARCH_z80
436 case bfd_arch_z80:
437 disassemble = print_insn_z80;
438 break;
439#endif
440#ifdef ARCH_z8k
441 case bfd_arch_z8k:
442 if (bfd_get_mach(abfd) == bfd_mach_z8001)
443 disassemble = print_insn_z8001;
444 else
445 disassemble = print_insn_z8002;
446 break;
447#endif
448#ifdef ARCH_vax
449 case bfd_arch_vax:
450 disassemble = print_insn_vax;
451 break;
452#endif
453#ifdef ARCH_frv
454 case bfd_arch_frv:
455 disassemble = print_insn_frv;
456 break;
457#endif
458#ifdef ARCH_moxie
459 case bfd_arch_moxie:
460 disassemble = print_insn_moxie;
461 break;
462#endif
463#ifdef ARCH_iq2000
464 case bfd_arch_iq2000:
465 disassemble = print_insn_iq2000;
466 break;
467#endif
468#ifdef ARCH_m32c
469 case bfd_arch_m32c:
470 disassemble = print_insn_m32c;
471 break;
472#endif
473#ifdef ARCH_tilegx
474 case bfd_arch_tilegx:
475 disassemble = print_insn_tilegx;
476 break;
477#endif
478#ifdef ARCH_tilepro
479 case bfd_arch_tilepro:
480 disassemble = print_insn_tilepro;
481 break;
482#endif
483 default:
484 return 0;
485 }
486 return disassemble;
487}
488
489void
490disassembler_usage (stream)
491 FILE * stream ATTRIBUTE_UNUSED;
492{
493#ifdef ARCH_arm
494 print_arm_disassembler_options (stream);
495#endif
496#ifdef ARCH_mips
497 print_mips_disassembler_options (stream);
498#endif
499#ifdef ARCH_powerpc
500 print_ppc_disassembler_options (stream);
501#endif
502#ifdef ARCH_i386
503 print_i386_disassembler_options (stream);
504#endif
505#ifdef ARCH_s390
506 print_s390_disassembler_options (stream);
507#endif
508
509 return;
510}
511
512void
513disassemble_init_for_target (struct disassemble_info * info)
514{
515 if (info == NULL)
516 return;
517
518 switch (info->arch)
519 {
520#ifdef ARCH_arm
521 case bfd_arch_arm:
522 info->symbol_is_valid = arm_symbol_is_valid;
523 info->disassembler_needs_relocs = TRUE;
524 break;
525#endif
526#ifdef ARCH_ia64
527 case bfd_arch_ia64:
528 info->skip_zeroes = 16;
529 break;
530#endif
531#ifdef ARCH_tic4x
532 case bfd_arch_tic4x:
533 info->skip_zeroes = 32;
534 break;
535#endif
536#ifdef ARCH_mep
537 case bfd_arch_mep:
538 info->skip_zeroes = 256;
539 info->skip_zeroes_at_end = 0;
540 break;
541#endif
542#ifdef ARCH_m32c
543 case bfd_arch_m32c:
544 /* This processor in fact is little endian. The value set here
545 reflects the way opcodes are written in the cgen description. */
546 info->endian = BFD_ENDIAN_BIG;
547 if (! info->insn_sets)
548 {
549 info->insn_sets = cgen_bitset_create (ISA_MAX);
550 if (info->mach == bfd_mach_m16c)
551 cgen_bitset_set (info->insn_sets, ISA_M16C);
552 else
553 cgen_bitset_set (info->insn_sets, ISA_M32C);
554 }
555 break;
556#endif
557 default:
558 break;
559 }
560}
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