Multi-target support
[deliverable/binutils-gdb.git] / sim / lm32 / sim-main.h
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1/* Lattice Mico32 simulator support code
2 Contributed by Jon Beniston <jon@beniston.com>
3
4 Copyright (C) 2009-2020 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21/* Main header for the LM32 simulator. */
22
23#ifndef SIM_MAIN_H
24#define SIM_MAIN_H
25
26#define WITH_SCACHE_PBB 1
27
28#include "symcat.h"
29#include "sim-basics.h"
30#include "cgen-types.h"
31#include "lm32-desc.h"
32#include "lm32-opc.h"
33#include "arch.h"
34#include "sim-base.h"
35#include "cgen-sim.h"
36#include "lm32-sim.h"
37#include "opcode/cgen.h"
38\f
39/* The _sim_cpu struct. */
40
41struct _sim_cpu
42{
43 /* sim/common cpu base. */
44 sim_cpu_base base;
45
46 /* Static parts of cgen. */
47 CGEN_CPU cgen_cpu;
48
49 /* CPU specific parts go here.
50 Note that in files that don't need to access these pieces WANT_CPU_FOO
51 won't be defined and thus these parts won't appear. This is ok in the
52 sense that things work. It is a source of bugs though.
53 One has to of course be careful to not take the size of this
54 struct and no structure members accessed in non-cpu specific files can
55 go after here. Oh for a better language. */
56#if defined (WANT_CPU_LM32BF)
57 LM32BF_CPU_DATA cpu_data;
58#endif
59
60};
61\f
62/* The sim_state struct. */
63
64struct sim_state
65{
66 sim_cpu *cpu[MAX_NR_PROCESSORS];
67
68 CGEN_STATE cgen_state;
69
70 sim_state_base base;
71};
72\f
73/* Misc. */
74
75/* Catch address exceptions. */
76extern SIM_CORE_SIGNAL_FN lm32_core_signal;
77#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
78lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
79 (TRANSFER), (ERROR))
80
81#endif /* SIM_MAIN_H */
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