Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt

   1 Marvell Armada 370 and Armada XP Interrupt Controller
   2 -----------------------------------------------------
   3
   4 Required properties:
   5 - compatible: Should be "marvell,mpic"
   6 - interrupt-controller: Identifies the node as an interrupt controller.
   7 - msi-controller: Identifies the node as an PCI Message Signaled
   8   Interrupt controller.
   9 - #interrupt-cells: The number of cells to define the interrupts. Should be 1.
  10   The cell is the IRQ number
  11
  12 - reg: Should contain PMIC registers location and length. First pair
  13   for the main interrupt registers, second pair for the per-CPU
  14   interrupt registers. For this last pair, to be compliant with SMP
  15   support, the "virtual" must be use (For the record, these registers
  16   automatically map to the interrupt controller registers of the
  17   current CPU)
  18
  19
  20
  21 Example:
  22
  23         mpic: interrupt-controller@d0020000 {
  24               compatible = "marvell,mpic";
  25               #interrupt-cells = <1>;
  26               #address-cells = <1>;
  27               #size-cells = <1>;
  28               interrupt-controller;
  29               msi-controller;
  30               reg = <0xd0020a00 0x1d0>,
  31                     <0xd0021070 0x58>;
  32         };