Documentation/devicetree/bindings/clock/alphascale,acc.txt

   1 Alphascale Clock Controller
   2
   3 The ACC (Alphascale Clock Controller) is responsible of choising proper
   4 clock source, setting deviders and clock gates.
   5
   6 Required properties for the ACC node:
   7  - compatible: must be "alphascale,asm9260-clock-controller"
   8  - reg: must contain the ACC register base and size
   9  - #clock-cells : shall be set to 1.
  10
  11 Simple one-cell clock specifier format is used, where the only cell is used
  12 as an index of the clock inside the provider.
  13 It is encouraged to use dt-binding for clock index definitions. SoC specific
  14 dt-binding should be included to the device tree descriptor. For example
  15 Alphascale ASM9260:
  16 #include <dt-bindings/clock/alphascale,asm9260.h>
  17
  18 This binding contains two types of clock providers:
  19  _AHB_ - AHB gate;
  20  _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
  21 All clock specific details can be found in the SoC documentation.
  22 CLKID_AHB_ROM           0
  23 CLKID_AHB_RAM           1
  24 CLKID_AHB_GPIO          2
  25 CLKID_AHB_MAC           3
  26 CLKID_AHB_EMI           4
  27 CLKID_AHB_USB0          5
  28 CLKID_AHB_USB1          6
  29 CLKID_AHB_DMA0          7
  30 CLKID_AHB_DMA1          8
  31 CLKID_AHB_UART0         9
  32 CLKID_AHB_UART1         10
  33 CLKID_AHB_UART2         11
  34 CLKID_AHB_UART3         12
  35 CLKID_AHB_UART4         13
  36 CLKID_AHB_UART5         14
  37 CLKID_AHB_UART6         15
  38 CLKID_AHB_UART7         16
  39 CLKID_AHB_UART8         17
  40 CLKID_AHB_UART9         18
  41 CLKID_AHB_I2S0          19
  42 CLKID_AHB_I2C0          20
  43 CLKID_AHB_I2C1          21
  44 CLKID_AHB_SSP0          22
  45 CLKID_AHB_IOCONFIG      23
  46 CLKID_AHB_WDT           24
  47 CLKID_AHB_CAN0          25
  48 CLKID_AHB_CAN1          26
  49 CLKID_AHB_MPWM          27
  50 CLKID_AHB_SPI0          28
  51 CLKID_AHB_SPI1          29
  52 CLKID_AHB_QEI           30
  53 CLKID_AHB_QUADSPI0      31
  54 CLKID_AHB_CAMIF         32
  55 CLKID_AHB_LCDIF         33
  56 CLKID_AHB_TIMER0        34
  57 CLKID_AHB_TIMER1        35
  58 CLKID_AHB_TIMER2        36
  59 CLKID_AHB_TIMER3        37
  60 CLKID_AHB_IRQ           38
  61 CLKID_AHB_RTC           39
  62 CLKID_AHB_NAND          40
  63 CLKID_AHB_ADC0          41
  64 CLKID_AHB_LED           42
  65 CLKID_AHB_DAC0          43
  66 CLKID_AHB_LCD           44
  67 CLKID_AHB_I2S1          45
  68 CLKID_AHB_MAC1          46
  69
  70 CLKID_SYS_CPU           47
  71 CLKID_SYS_AHB           48
  72 CLKID_SYS_I2S0M         49
  73 CLKID_SYS_I2S0S         50
  74 CLKID_SYS_I2S1M         51
  75 CLKID_SYS_I2S1S         52
  76 CLKID_SYS_UART0         53
  77 CLKID_SYS_UART1         54
  78 CLKID_SYS_UART2         55
  79 CLKID_SYS_UART3         56
  80 CLKID_SYS_UART4         56
  81 CLKID_SYS_UART5         57
  82 CLKID_SYS_UART6         58
  83 CLKID_SYS_UART7         59
  84 CLKID_SYS_UART8         60
  85 CLKID_SYS_UART9         61
  86 CLKID_SYS_SPI0          62
  87 CLKID_SYS_SPI1          63
  88 CLKID_SYS_QUADSPI       64
  89 CLKID_SYS_SSP0          65
  90 CLKID_SYS_NAND          66
  91 CLKID_SYS_TRACE         67
  92 CLKID_SYS_CAMM          68
  93 CLKID_SYS_WDT           69
  94 CLKID_SYS_CLKOUT        70
  95 CLKID_SYS_MAC           71
  96 CLKID_SYS_LCD           72
  97 CLKID_SYS_ADCANA        73
  98
  99 Example of clock consumer with _SYS_ and _AHB_ sinks.
 100 uart4: serial@80010000 {
 101         compatible = "alphascale,asm9260-uart";
 102         reg = <0x80010000 0x4000>;
 103         clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>;
 104         interrupts = <19>;
 105         status = "disabled";
 106 };
 107
 108 Clock consumer with only one, _AHB_ sink.
 109 timer0: timer@80088000 {
 110         compatible = "alphascale,asm9260-timer";
 111         reg = <0x80088000 0x4000>;
 112         clocks = <&acc CLKID_AHB_TIMER0>;
 113         interrupts = <29>;
 114 };
 115