Documentation/devicetree/bindings/clock/at91-clock.txt

   1 Device Tree Clock bindings for arch-at91
   2
   3 This binding uses the common clock binding[1].
   4
   5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
   6
   7 Required properties:
   8 - compatible : shall be one of the following:
   9         "atmel,at91rm9200-pmc" or
  10         "atmel,at91sam9g45-pmc" or
  11         "atmel,at91sam9n12-pmc" or
  12         "atmel,at91sam9x5-pmc" or
  13         "atmel,sama5d3-pmc":
  14                 at91 PMC (Power Management Controller)
  15                 All at91 specific clocks (clocks defined below) must be child
  16                 node of the PMC node.
  17
  18         "atmel,at91rm9200-clk-main":
  19                 at91 main oscillator
  20
  21         "atmel,at91rm9200-clk-master" or
  22         "atmel,at91sam9x5-clk-master":
  23                 at91 master clock
  24
  25         "atmel,at91sam9x5-clk-peripheral" or
  26         "atmel,at91rm9200-clk-peripheral":
  27                 at91 peripheral clocks
  28
  29         "atmel,at91rm9200-clk-pll" or
  30         "atmel,at91sam9g45-clk-pll" or
  31         "atmel,at91sam9g20-clk-pllb" or
  32         "atmel,sama5d3-clk-pll":
  33                 at91 pll clocks
  34
  35         "atmel,at91sam9x5-clk-plldiv":
  36                 at91 plla divisor
  37
  38         "atmel,at91rm9200-clk-programmable" or
  39         "atmel,at91sam9g45-clk-programmable" or
  40         "atmel,at91sam9x5-clk-programmable":
  41                 at91 programmable clocks
  42
  43         "atmel,at91sam9x5-clk-smd":
  44                 at91 SMD (Soft Modem) clock
  45
  46         "atmel,at91rm9200-clk-system":
  47                 at91 system clocks
  48
  49         "atmel,at91rm9200-clk-usb" or
  50         "atmel,at91sam9x5-clk-usb" or
  51         "atmel,at91sam9n12-clk-usb":
  52                 at91 usb clock
  53
  54         "atmel,at91sam9x5-clk-utmi":
  55                 at91 utmi clock
  56
  57 Required properties for PMC node:
  58 - reg : defines the IO memory reserved for the PMC.
  59 - #size-cells : shall be 0 (reg is used to encode clk id).
  60 - #address-cells : shall be 1 (reg is used to encode clk id).
  61 - interrupts : shall be set to PMC interrupt line.
  62 - interrupt-controller : tell that the PMC is an interrupt controller.
  63 - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
  64         and reflect the bit position in the PMC_ER/DR/SR registers.
  65         You can use the dt macros defined in dt-bindings/clk/at91.h.
  66         0 (AT91_PMC_MOSCS) -> main oscillator ready
  67         1 (AT91_PMC_LOCKA) -> PLL A ready
  68         2 (AT91_PMC_LOCKB) -> PLL B ready
  69         3 (AT91_PMC_MCKRDY) -> master clock ready
  70         6 (AT91_PMC_LOCKU) -> UTMI PLL clock ready
  71         8 .. 15 (AT91_PMC_PCKRDY(id)) -> programmable clock ready
  72         16 (AT91_PMC_MOSCSELS) -> main oscillator selected
  73         17 (AT91_PMC_MOSCRCS) -> RC main oscillator stabilized
  74         18 (AT91_PMC_CFDEV) -> clock failure detected
  75
  76 For example:
  77         pmc: pmc@fffffc00 {
  78                 compatible = "atmel,sama5d3-pmc";
  79                 interrupts = <1 4 7>;
  80                 interrupt-controller;
  81                 #interrupt-cells = <2>;
  82                 #size-cells = <0>;
  83                 #address-cells = <1>;
  84
  85                 /* put at91 clocks here */
  86         };
  87
  88 Required properties for main clock:
  89 - interrupt-parent : must reference the PMC node.
  90 - interrupts : shall be set to "<0>".
  91 - #clock-cells : from common clock binding; shall be set to 0.
  92 - clocks (optional if clock-frequency is provided) : shall be the slow clock
  93         phandle. This clock is used to calculate the main clock rate if
  94         "clock-frequency" is not provided.
  95 - clock-frequency : the main oscillator frequency.Prefer the use of
  96         "clock-frequency" over automatic clock rate calculation.
  97
  98 For example:
  99         main: mainck {
 100                 compatible = "atmel,at91rm9200-clk-main";
 101                 interrupt-parent = <&pmc>;
 102                 interrupts = <0>;
 103                 #clock-cells = <0>;
 104                 clocks = <&ck32k>;
 105                 clock-frequency = <18432000>;
 106         };
 107
 108 Required properties for master clock:
 109 - interrupt-parent : must reference the PMC node.
 110 - interrupts : shall be set to "<3>".
 111 - #clock-cells : from common clock binding; shall be set to 0.
 112 - clocks : shall be the master clock sources (see atmel datasheet) phandles.
 113         e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>".
 114 - atmel,clk-output-range : minimum and maximum clock frequency (two u32
 115                            fields).
 116            e.g. output = <0 133000000>; <=> 0 to 133MHz.
 117 - atmel,clk-divisors : master clock divisors table (four u32 fields).
 118                 0 <=> reserved value.
 119                 e.g. divisors = <1 2 4 6>;
 120 - atmel,master-clk-have-div3-pres : some SoC use the reserved value 7 in the
 121                                     PRES field as CLOCK_DIV3 (e.g sam9x5).
 122
 123 For example:
 124         mck: mck {
 125                 compatible = "atmel,at91rm9200-clk-master";
 126                 interrupt-parent = <&pmc>;
 127                 interrupts = <3>;
 128                 #clock-cells = <0>;
 129                 atmel,clk-output-range = <0 133000000>;
 130                 atmel,clk-divisors = <1 2 4 0>;
 131         };
 132
 133 Required properties for peripheral clocks:
 134 - #size-cells : shall be 0 (reg is used to encode clk id).
 135 - #address-cells : shall be 1 (reg is used to encode clk id).
 136 - clocks : shall be the master clock phandle.
 137         e.g. clocks = <&mck>;
 138 - name: device tree node describing a specific system clock.
 139         * #clock-cells : from common clock binding; shall be set to 0.
 140         * reg: peripheral id. See Atmel's datasheets to get a full
 141           list of peripheral ids.
 142         * atmel,clk-output-range : minimum and maximum clock frequency
 143           (two u32 fields). Only valid on at91sam9x5-clk-peripheral
 144           compatible IPs.
 145
 146 For example:
 147         periph: periphck {
 148                 compatible = "atmel,at91sam9x5-clk-peripheral";
 149                 #size-cells = <0>;
 150                 #address-cells = <1>;
 151                 clocks = <&mck>;
 152
 153                 ssc0_clk {
 154                         #clock-cells = <0>;
 155                         reg = <2>;
 156                         atmel,clk-output-range = <0 133000000>;
 157                 };
 158
 159                 usart0_clk {
 160                         #clock-cells = <0>;
 161                         reg = <3>;
 162                         atmel,clk-output-range = <0 66000000>;
 163                 };
 164         };
 165
 166
 167 Required properties for pll clocks:
 168 - interrupt-parent : must reference the PMC node.
 169 - interrupts : shall be set to "<1>".
 170 - #clock-cells : from common clock binding; shall be set to 0.
 171 - clocks : shall be the main clock phandle.
 172 - reg : pll id.
 173         0 -> PLL A
 174         1 -> PLL B
 175 - atmel,clk-input-range : minimum and maximum source clock frequency (two u32
 176                           fields).
 177           e.g. input = <1 32000000>; <=> 1 to 32MHz.
 178 - #atmel,pll-clk-output-range-cells : number of cells reserved for pll output
 179                                       range description. Sould be set to 2, 3
 180                                       or 4.
 181         * 1st and 2nd cells represent the frequency range (min-max).
 182         * 3rd cell is optional and represents the OUT field value for the given
 183           range.
 184         * 4th cell is optional and represents the ICPLL field (PLLICPR
 185           register)
 186 - atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter
 187                                 depending on #atmel,pll-output-range-cells
 188                                 property value.
 189
 190 For example:
 191         plla: pllack {
 192                 compatible = "atmel,at91sam9g45-clk-pll";
 193                 interrupt-parent = <&pmc>;
 194                 interrupts = <1>;
 195                 #clock-cells = <0>;
 196                 clocks = <&main>;
 197                 reg = <0>;
 198                 atmel,clk-input-range = <2000000 32000000>;
 199                 #atmel,pll-clk-output-range-cells = <4>;
 200                 atmel,pll-clk-output-ranges = <74500000 800000000 0 0
 201                                                69500000 750000000 1 0
 202                                                64500000 700000000 2 0
 203                                                59500000 650000000 3 0
 204                                                54500000 600000000 0 1
 205                                                49500000 550000000 1 1
 206                                                44500000 500000000 2 1
 207                                                40000000 450000000 3 1>;
 208         };
 209
 210 Required properties for plldiv clocks (plldiv = pll / 2):
 211 - #clock-cells : from common clock binding; shall be set to 0.
 212 - clocks : shall be the plla clock phandle.
 213
 214 The pll divisor is equal to 2 and cannot be changed.
 215
 216 For example:
 217         plladiv: plladivck {
 218                 compatible = "atmel,at91sam9x5-clk-plldiv";
 219                 #clock-cells = <0>;
 220                 clocks = <&plla>;
 221         };
 222
 223 Required properties for programmable clocks:
 224 - interrupt-parent : must reference the PMC node.
 225 - #size-cells : shall be 0 (reg is used to encode clk id).
 226 - #address-cells : shall be 1 (reg is used to encode clk id).
 227 - clocks : shall be the programmable clock source phandles.
 228         e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
 229 - name: device tree node describing a specific prog clock.
 230         * #clock-cells : from common clock binding; shall be set to 0.
 231         * reg : programmable clock id (register offset from  PCKx
 232                          register).
 233         * interrupts : shall be set to "<(8 + id)>".
 234
 235 For example:
 236         prog: progck {
 237                 compatible = "atmel,at91sam9g45-clk-programmable";
 238                 #size-cells = <0>;
 239                 #address-cells = <1>;
 240                 interrupt-parent = <&pmc>;
 241                 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 242
 243                 prog0 {
 244                         #clock-cells = <0>;
 245                         reg = <0>;
 246                         interrupts = <8>;
 247                 };
 248
 249                 prog1 {
 250                         #clock-cells = <0>;
 251                         reg = <1>;
 252                         interrupts = <9>;
 253                 };
 254         };
 255
 256
 257 Required properties for smd clock:
 258 - #clock-cells : from common clock binding; shall be set to 0.
 259 - clocks : shall be the smd clock source phandles.
 260         e.g. clocks = <&plladiv>, <&utmi>;
 261
 262 For example:
 263         smd: smdck {
 264                 compatible = "atmel,at91sam9x5-clk-smd";
 265                 #clock-cells = <0>;
 266                 clocks = <&plladiv>, <&utmi>;
 267         };
 268
 269 Required properties for system clocks:
 270 - #size-cells : shall be 0 (reg is used to encode clk id).
 271 - #address-cells : shall be 1 (reg is used to encode clk id).
 272 - name: device tree node describing a specific system clock.
 273         * #clock-cells : from common clock binding; shall be set to 0.
 274         * reg: system clock id (bit position in SCER/SCDR/SCSR registers).
 275               See Atmel's datasheet to get a full list of system clock ids.
 276
 277 For example:
 278         system: systemck {
 279                 compatible = "atmel,at91rm9200-clk-system";
 280                 #address-cells = <1>;
 281                 #size-cells = <0>;
 282
 283                 ddrck {
 284                         #clock-cells = <0>;
 285                         reg = <2>;
 286                         clocks = <&mck>;
 287                 };
 288
 289                 uhpck {
 290                         #clock-cells = <0>;
 291                         reg = <6>;
 292                         clocks = <&usb>;
 293                 };
 294
 295                 udpck {
 296                         #clock-cells = <0>;
 297                         reg = <7>;
 298                         clocks = <&usb>;
 299                 };
 300         };
 301
 302
 303 Required properties for usb clock:
 304 - #clock-cells : from common clock binding; shall be set to 0.
 305 - clocks : shall be the smd clock source phandles.
 306         e.g. clocks = <&pllb>;
 307 - atmel,clk-divisors (only available for "atmel,at91rm9200-clk-usb"):
 308         usb clock divisor table.
 309         e.g. divisors = <1 2 4 0>;
 310
 311 For example:
 312         usb: usbck {
 313                 compatible = "atmel,at91sam9x5-clk-usb";
 314                 #clock-cells = <0>;
 315                 clocks = <&plladiv>, <&utmi>;
 316         };
 317
 318         usb: usbck {
 319                 compatible = "atmel,at91rm9200-clk-usb";
 320                 #clock-cells = <0>;
 321                 clocks = <&pllb>;
 322                 atmel,clk-divisors = <1 2 4 0>;
 323         };
 324
 325
 326 Required properties for utmi clock:
 327 - interrupt-parent : must reference the PMC node.
 328 - interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>".
 329 - #clock-cells : from common clock binding; shall be set to 0.
 330 - clocks : shall be the main clock source phandle.
 331
 332 For example:
 333         utmi: utmick {
 334                 compatible = "atmel,at91sam9x5-clk-utmi";
 335                 interrupt-parent = <&pmc>;
 336                 interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>;
 337                 #clock-cells = <0>;
 338                 clocks = <&main>;
 339         };