mmc: sdhci-esdhc-imx: add delay line setting support
[deliverable/linux.git] / Documentation / devicetree / bindings / mmc / fsl-imx-esdhc.txt
1 * Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
2
3 The Enhanced Secure Digital Host Controller on Freescale i.MX family
4 provides an interface for MMC, SD, and SDIO types of memory cards.
5
6 This file documents differences between the core properties described
7 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
8
9 Required properties:
10 - compatible : Should be "fsl,<chip>-esdhc"
11
12 Optional properties:
13 - fsl,cd-controller : Indicate to use controller internal card detection
14 - fsl,wp-controller : Indicate to use controller internal write protection
15 - fsl,delay-line : Specify the number of delay cells for override mode.
16 This is used to set the clock delay for DLL(Delay Line) on override mode
17 to select a proper data sampling window in case the clock quality is not good
18 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
19 chapter, DLL (Delay Line) section in RM for details.
20
21 Examples:
22
23 esdhc@70004000 {
24 compatible = "fsl,imx51-esdhc";
25 reg = <0x70004000 0x4000>;
26 interrupts = <1>;
27 fsl,cd-controller;
28 fsl,wp-controller;
29 };
30
31 esdhc@70008000 {
32 compatible = "fsl,imx51-esdhc";
33 reg = <0x70008000 0x4000>;
34 interrupts = <2>;
35 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
36 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
37 };
This page took 0.056858 seconds and 5 git commands to generate.