arch/arc/include/asm/smp.h

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #ifndef __ASM_ARC_SMP_H
  10 #define __ASM_ARC_SMP_H
  11
  12 #ifdef CONFIG_SMP
  13
  14 #include <linux/types.h>
  15 #include <linux/init.h>
  16 #include <linux/threads.h>
  17
  18 #define raw_smp_processor_id() (current_thread_info()->cpu)
  19
  20 /* including cpumask.h leads to cyclic deps hence this Forward declaration */
  21 struct cpumask;
  22
  23 /*
  24  * APIs provided by arch SMP code to generic code
  25  */
  26 extern void arch_send_call_function_single_ipi(int cpu);
  27 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
  28
  29 /*
  30  * APIs provided by arch SMP code to rest of arch code
  31  */
  32 extern void __init smp_init_cpus(void);
  33 extern void __init first_lines_of_secondary(void);
  34
  35 /*
  36  * API expected BY platform smp code (FROM arch smp code)
  37  *
  38  * smp_ipi_irq_setup:
  39  *      Takes @cpu and @irq to which the arch-common ISR is hooked up
  40  */
  41 extern int smp_ipi_irq_setup(int cpu, int irq);
  42
  43 /*
  44  * APIs expected FROM platform smp code
  45  *
  46  * arc_platform_smp_cpuinfo:
  47  *      returns a string containing info for /proc/cpuinfo
  48  *
  49  * arc_platform_smp_wait_to_boot:
  50  *      Called from early bootup code for non-Master CPUs to "park" them
  51  *
  52  * arc_platform_smp_wakeup_cpu:
  53  *      Called from __cpu_up (Master CPU) to kick start another one
  54  *
  55  * arc_platform_ipi_send:
  56  *      Takes @cpumask to which IPI(s) would be sent.
  57  *      The actual msg-id/buffer is manager in arch-common code
  58  *
  59  * arc_platform_ipi_clear:
  60  *      Takes @cpu which got IPI at @irq to do any IPI clearing
  61  */
  62 extern const char *arc_platform_smp_cpuinfo(void);
  63 extern void arc_platform_smp_wait_to_boot(int cpu);
  64 extern void arc_platform_smp_wakeup_cpu(int cpu, unsigned long pc);
  65 extern void arc_platform_ipi_send(const struct cpumask *callmap);
  66 extern void arc_platform_ipi_clear(int cpu, int irq);
  67
  68 #endif  /* CONFIG_SMP */
  69
  70 /*
  71  * ARC700 doesn't support atomic Read-Modify-Write ops.
  72  * Originally Interrupts had to be disabled around code to gaurantee atomicity.
  73  * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
  74  * based on retry-if-irq-in-atomic (with hardware assist).
  75  * However despite these, we provide the IRQ disabling variant
  76  *
  77  * (1) These insn were introduced only in 4.10 release. So for older released
  78  *      support needed.
  79  *
  80  * (2) In a SMP setup, the LLOCK/SCOND atomiticity across CPUs needs to be
  81  *      gaurantted by the platform (not something which core handles).
  82  *      Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
  83  *      disabling for atomicity.
  84  *
  85  *      However exported spinlock API is not usable due to cyclic hdr deps
  86  *      (even after system.h disintegration upstream)
  87  *      asm/bitops.h -> linux/spinlock.h -> linux/preempt.h
  88  *              -> linux/thread_info.h -> linux/bitops.h -> asm/bitops.h
  89  *
  90  *      So the workaround is to use the lowest level arch spinlock API.
  91  *      The exported spinlock API is smart enough to be NOP for !CONFIG_SMP,
  92  *      but same is not true for ARCH backend, hence the need for 2 variants
  93  */
  94 #ifndef CONFIG_ARC_HAS_LLSC
  95
  96 #include <linux/irqflags.h>
  97 #ifdef CONFIG_SMP
  98
  99 #include <asm/spinlock.h>
 100
 101 extern arch_spinlock_t smp_atomic_ops_lock;
 102 extern arch_spinlock_t smp_bitops_lock;
 103
 104 #define atomic_ops_lock(flags)  do {            \
 105         local_irq_save(flags);                  \
 106         arch_spin_lock(&smp_atomic_ops_lock);   \
 107 } while (0)
 108
 109 #define atomic_ops_unlock(flags) do {           \
 110         arch_spin_unlock(&smp_atomic_ops_lock); \
 111         local_irq_restore(flags);               \
 112 } while (0)
 113
 114 #define bitops_lock(flags)      do {            \
 115         local_irq_save(flags);                  \
 116         arch_spin_lock(&smp_bitops_lock);       \
 117 } while (0)
 118
 119 #define bitops_unlock(flags) do {               \
 120         arch_spin_unlock(&smp_bitops_lock);     \
 121         local_irq_restore(flags);               \
 122 } while (0)
 123
 124 #else /* !CONFIG_SMP */
 125
 126 #define atomic_ops_lock(flags)          local_irq_save(flags)
 127 #define atomic_ops_unlock(flags)        local_irq_restore(flags)
 128
 129 #define bitops_lock(flags)              local_irq_save(flags)
 130 #define bitops_unlock(flags)            local_irq_restore(flags)
 131
 132 #endif /* !CONFIG_SMP */
 133
 134 #endif  /* !CONFIG_ARC_HAS_LLSC */
 135
 136 #endif