ftrace, sched: Add TRACE_FLAG_PREEMPT_RESCHED
[deliverable/linux.git] / arch / arc / kernel / setup.c
1 /*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9 #include <linux/seq_file.h>
10 #include <linux/fs.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
17 #include <linux/cache.h>
18 #include <asm/sections.h>
19 #include <asm/arcregs.h>
20 #include <asm/tlb.h>
21 #include <asm/setup.h>
22 #include <asm/page.h>
23 #include <asm/irq.h>
24 #include <asm/prom.h>
25 #include <asm/unwind.h>
26 #include <asm/clk.h>
27 #include <asm/mach_desc.h>
28
29 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
30
31 int running_on_hw = 1; /* vs. on ISS */
32
33 char __initdata command_line[COMMAND_LINE_SIZE];
34 struct machine_desc *machine_desc;
35
36 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
37
38 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
39
40
41 void read_arc_build_cfg_regs(void)
42 {
43 struct bcr_perip uncached_space;
44 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
45 FIX_PTR(cpu);
46
47 READ_BCR(AUX_IDENTITY, cpu->core);
48
49 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
50 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
51
52 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
53 cpu->uncached_base = uncached_space.start << 24;
54
55 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
56 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
57 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
58 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
59 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
60 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
61
62 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
63 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
64
65 /* Note that we read the CCM BCRs independent of kernel config
66 * This is to catch the cases where user doesn't know that
67 * CCMs are present in hardware build
68 */
69 {
70 struct bcr_iccm iccm;
71 struct bcr_dccm dccm;
72 struct bcr_dccm_base dccm_base;
73 unsigned int bcr_32bit_val;
74
75 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
76 if (bcr_32bit_val) {
77 iccm = *((struct bcr_iccm *)&bcr_32bit_val);
78 cpu->iccm.base_addr = iccm.base << 16;
79 cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
80 }
81
82 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
83 if (bcr_32bit_val) {
84 dccm = *((struct bcr_dccm *)&bcr_32bit_val);
85 cpu->dccm.sz = 0x800 << (dccm.sz);
86
87 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
88 cpu->dccm.base_addr = dccm_base.addr << 8;
89 }
90 }
91
92 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
93
94 read_decode_mmu_bcr();
95 read_decode_cache_bcr();
96
97 READ_BCR(ARC_REG_FP_BCR, cpu->fp);
98 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
99 }
100
101 static const struct cpuinfo_data arc_cpu_tbl[] = {
102 { {0x10, "ARCTangent A5"}, 0x1F},
103 { {0x20, "ARC 600" }, 0x2F},
104 { {0x30, "ARC 700" }, 0x33},
105 { {0x34, "ARC 700 R4.10"}, 0x34},
106 { {0x00, NULL } }
107 };
108
109 char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
110 {
111 int n = 0;
112 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
113 struct bcr_identity *core = &cpu->core;
114 const struct cpuinfo_data *tbl;
115 int be = 0;
116 #ifdef CONFIG_CPU_BIG_ENDIAN
117 be = 1;
118 #endif
119 FIX_PTR(cpu);
120
121 n += scnprintf(buf + n, len - n,
122 "\nARC IDENTITY\t: Family [%#02x]"
123 " Cpu-id [%#02x] Chip-id [%#4x]\n",
124 core->family, core->cpu_id,
125 core->chip_id);
126
127 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
128 if ((core->family >= tbl->info.id) &&
129 (core->family <= tbl->up_range)) {
130 n += scnprintf(buf + n, len - n,
131 "processor\t: %s %s\n",
132 tbl->info.str,
133 be ? "[Big Endian]" : "");
134 break;
135 }
136 }
137
138 if (tbl->info.id == 0)
139 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
140
141 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
142 (unsigned int)(arc_get_core_freq() / 1000000),
143 (unsigned int)(arc_get_core_freq() / 10000) % 100);
144
145 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
146 (cpu->timers & 0x200) ? "TIMER1" : "",
147 (cpu->timers & 0x100) ? "TIMER0" : "");
148
149 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
150 cpu->vec_base);
151
152 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
153 cpu->uncached_base);
154
155 return buf;
156 }
157
158 static const struct id_to_str mul_type_nm[] = {
159 { 0x0, "N/A"},
160 { 0x1, "32x32 (spl Result Reg)" },
161 { 0x2, "32x32 (ANY Result Reg)" }
162 };
163
164 static const struct id_to_str mac_mul_nm[] = {
165 {0x0, "N/A"},
166 {0x1, "N/A"},
167 {0x2, "Dual 16 x 16"},
168 {0x3, "N/A"},
169 {0x4, "32x16"},
170 {0x5, "N/A"},
171 {0x6, "Dual 16x16 and 32x16"}
172 };
173
174 char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
175 {
176 int n = 0;
177 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
178
179 FIX_PTR(cpu);
180 #define IS_AVAIL1(var, str) ((var) ? str : "")
181 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
182 #define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)")
183
184 n += scnprintf(buf + n, len - n,
185 "Extn [700-Base]\t: %s %s %s %s %s %s\n",
186 IS_AVAIL2(cpu->extn.norm, "norm,"),
187 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
188 IS_AVAIL1(cpu->extn.swap, "swap,"),
189 IS_AVAIL2(cpu->extn.minmax, "minmax,"),
190 IS_AVAIL1(cpu->extn.crc, "crc,"),
191 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
192
193 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
194 mul_type_nm[cpu->extn.mul].str);
195
196 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
197 mac_mul_nm[cpu->extn_mac_mul.type].str);
198
199 if (cpu->core.family == 0x34) {
200 n += scnprintf(buf + n, len - n,
201 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
202 IS_USED(CONFIG_ARC_HAS_LLSC),
203 IS_USED(CONFIG_ARC_HAS_SWAPE),
204 IS_USED(CONFIG_ARC_HAS_RTSC));
205 }
206
207 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
208 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
209
210 if (cpu->dccm.sz)
211 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
212 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
213
214 if (cpu->iccm.sz)
215 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
216 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
217
218 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
219 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
220
221 if (cpu->fp.ver)
222 n += scnprintf(buf + n, len - n, "SP [v%d] %s",
223 cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
224
225 if (cpu->dpfp.ver)
226 n += scnprintf(buf + n, len - n, "DP [v%d] %s",
227 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
228
229 n += scnprintf(buf + n, len - n, "\n");
230
231 n += scnprintf(buf + n, len - n,
232 "OS ABI [v3]\t: no-legacy-syscalls\n");
233
234 return buf;
235 }
236
237 void arc_chk_ccms(void)
238 {
239 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
240 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
241
242 #ifdef CONFIG_ARC_HAS_DCCM
243 /*
244 * DCCM can be arbit placed in hardware.
245 * Make sure it's placement/sz matches what Linux is built with
246 */
247 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
248 panic("Linux built with incorrect DCCM Base address\n");
249
250 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
251 panic("Linux built with incorrect DCCM Size\n");
252 #endif
253
254 #ifdef CONFIG_ARC_HAS_ICCM
255 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
256 panic("Linux built with incorrect ICCM Size\n");
257 #endif
258 #endif
259 }
260
261 /*
262 * Ensure that FP hardware and kernel config match
263 * -If hardware contains DPFP, kernel needs to save/restore FPU state
264 * across context switches
265 * -If hardware lacks DPFP, but kernel configured to save FPU state then
266 * kernel trying to access non-existant DPFP regs will crash
267 *
268 * We only check for Dbl precision Floating Point, because only DPFP
269 * hardware has dedicated regs which need to be saved/restored on ctx-sw
270 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
271 */
272 void arc_chk_fpu(void)
273 {
274 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
275
276 if (cpu->dpfp.ver) {
277 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
278 pr_warn("DPFP support broken in this kernel...\n");
279 #endif
280 } else {
281 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
282 panic("H/w lacks DPFP support, apps won't work\n");
283 #endif
284 }
285 }
286
287 /*
288 * Initialize and setup the processor core
289 * This is called by all the CPUs thus should not do special case stuff
290 * such as only for boot CPU etc
291 */
292
293 void setup_processor(void)
294 {
295 char str[512];
296 int cpu_id = smp_processor_id();
297
298 read_arc_build_cfg_regs();
299 arc_init_IRQ();
300
301 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
302
303 arc_mmu_init();
304 arc_cache_init();
305 arc_chk_ccms();
306
307 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
308
309 #ifdef CONFIG_SMP
310 printk(arc_platform_smp_cpuinfo());
311 #endif
312
313 arc_chk_fpu();
314 }
315
316 void __init setup_arch(char **cmdline_p)
317 {
318 /* This also populates @boot_command_line from /bootargs */
319 machine_desc = setup_machine_fdt(__dtb_start);
320 if (!machine_desc)
321 panic("Embedded DT invalid\n");
322
323 /* Append any u-boot provided cmdline */
324 #ifdef CONFIG_CMDLINE_UBOOT
325 /* Add a whitespace seperator between the 2 cmdlines */
326 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
327 strlcat(boot_command_line, command_line, COMMAND_LINE_SIZE);
328 #endif
329
330 /* Save unparsed command line copy for /proc/cmdline */
331 *cmdline_p = boot_command_line;
332
333 /* To force early parsing of things like mem=xxx */
334 parse_early_param();
335
336 /* Platform/board specific: e.g. early console registration */
337 if (machine_desc->init_early)
338 machine_desc->init_early();
339
340 setup_processor();
341
342 #ifdef CONFIG_SMP
343 smp_init_cpus();
344 #endif
345
346 setup_arch_memory();
347
348 /* copy flat DT out of .init and then unflatten it */
349 copy_devtree();
350 unflatten_device_tree();
351
352 /* Can be issue if someone passes cmd line arg "ro"
353 * But that is unlikely so keeping it as it is
354 */
355 root_mountflags &= ~MS_RDONLY;
356
357 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
358 conswitchp = &dummy_con;
359 #endif
360
361 arc_unwind_init();
362 arc_unwind_setup();
363 }
364
365 static int __init customize_machine(void)
366 {
367 /* Add platform devices */
368 if (machine_desc->init_machine)
369 machine_desc->init_machine();
370
371 return 0;
372 }
373 arch_initcall(customize_machine);
374
375 static int __init init_late_machine(void)
376 {
377 if (machine_desc->init_late)
378 machine_desc->init_late();
379
380 return 0;
381 }
382 late_initcall(init_late_machine);
383 /*
384 * Get CPU information for use by the procfs.
385 */
386
387 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
388 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
389
390 static int show_cpuinfo(struct seq_file *m, void *v)
391 {
392 char *str;
393 int cpu_id = ptr_to_cpu(v);
394
395 str = (char *)__get_free_page(GFP_TEMPORARY);
396 if (!str)
397 goto done;
398
399 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
400
401 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
402 loops_per_jiffy / (500000 / HZ),
403 (loops_per_jiffy / (5000 / HZ)) % 100);
404
405 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
406
407 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
408
409 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
410
411 #ifdef CONFIG_SMP
412 seq_printf(m, arc_platform_smp_cpuinfo());
413 #endif
414
415 free_page((unsigned long)str);
416 done:
417 seq_printf(m, "\n\n");
418
419 return 0;
420 }
421
422 static void *c_start(struct seq_file *m, loff_t *pos)
423 {
424 /*
425 * Callback returns cpu-id to iterator for show routine, NULL to stop.
426 * However since NULL is also a valid cpu-id (0), we use a round-about
427 * way to pass it w/o having to kmalloc/free a 2 byte string.
428 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
429 */
430 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
431 }
432
433 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
434 {
435 ++*pos;
436 return c_start(m, pos);
437 }
438
439 static void c_stop(struct seq_file *m, void *v)
440 {
441 }
442
443 const struct seq_operations cpuinfo_op = {
444 .start = c_start,
445 .next = c_next,
446 .stop = c_stop,
447 .show = show_cpuinfo
448 };
449
450 static DEFINE_PER_CPU(struct cpu, cpu_topology);
451
452 static int __init topology_init(void)
453 {
454 int cpu;
455
456 for_each_present_cpu(cpu)
457 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
458
459 return 0;
460 }
461
462 subsys_initcall(topology_init);
This page took 0.05834 seconds and 5 git commands to generate.