arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  13         select HAVE_ARCH_KGDB
  14         select HAVE_KPROBES if !XIP_KERNEL
  15         select HAVE_KRETPROBES if (HAVE_KPROBES)
  16         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  17         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  18         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  19         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  20         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  21         select HAVE_GENERIC_DMA_COHERENT
  22         select HAVE_KERNEL_GZIP
  23         select HAVE_KERNEL_LZO
  24         select HAVE_KERNEL_LZMA
  25         select HAVE_KERNEL_XZ
  26         select HAVE_IRQ_WORK
  27         select HAVE_PERF_EVENTS
  28         select PERF_USE_VMALLOC
  29         select HAVE_REGS_AND_STACK_ACCESS_API
  30         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  31         select HAVE_C_RECORDMCOUNT
  32         select HAVE_GENERIC_HARDIRQS
  33         select GENERIC_IRQ_SHOW
  34         select CPU_PM if (SUSPEND || CPU_IDLE)
  35         select GENERIC_PCI_IOMAP
  36         select HAVE_BPF_JIT if NET
  37         help
  38           The ARM series is a line of low-power-consumption RISC chip designs
  39           licensed by ARM Ltd and targeted at embedded applications and
  40           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  41           manufactured, but legacy ARM-based PC hardware remains popular in
  42           Europe.  There is an ARM Linux project with a web page at
  43           <http://www.arm.linux.org.uk/>.
  44
  45 config ARM_HAS_SG_CHAIN
  46         bool
  47
  48 config HAVE_PWM
  49         bool
  50
  51 config MIGHT_HAVE_PCI
  52         bool
  53
  54 config SYS_SUPPORTS_APM_EMULATION
  55         bool
  56
  57 config GENERIC_GPIO
  58         bool
  59
  60 config ARCH_USES_GETTIMEOFFSET
  61         bool
  62         default n
  63
  64 config GENERIC_CLOCKEVENTS
  65         bool
  66
  67 config GENERIC_CLOCKEVENTS_BROADCAST
  68         bool
  69         depends on GENERIC_CLOCKEVENTS
  70         default y if SMP
  71
  72 config KTIME_SCALAR
  73         bool
  74         default y
  75
  76 config HAVE_TCM
  77         bool
  78         select GENERIC_ALLOCATOR
  79
  80 config HAVE_PROC_CPU
  81         bool
  82
  83 config NO_IOPORT
  84         bool
  85
  86 config EISA
  87         bool
  88         ---help---
  89           The Extended Industry Standard Architecture (EISA) bus was
  90           developed as an open alternative to the IBM MicroChannel bus.
  91
  92           The EISA bus provided some of the features of the IBM MicroChannel
  93           bus while maintaining backward compatibility with cards made for
  94           the older ISA bus.  The EISA bus saw limited use between 1988 and
  95           1995 when it was made obsolete by the PCI bus.
  96
  97           Say Y here if you are building a kernel for an EISA-based machine.
  98
  99           Otherwise, say N.
 100
 101 config SBUS
 102         bool
 103
 104 config MCA
 105         bool
 106         help
 107           MicroChannel Architecture is found in some IBM PS/2 machines and
 108           laptops.  It is a bus system similar to PCI or ISA. See
 109           <file:Documentation/mca.txt> (and especially the web page given
 110           there) before attempting to build an MCA bus kernel.
 111
 112 config STACKTRACE_SUPPORT
 113         bool
 114         default y
 115
 116 config HAVE_LATENCYTOP_SUPPORT
 117         bool
 118         depends on !SMP
 119         default y
 120
 121 config LOCKDEP_SUPPORT
 122         bool
 123         default y
 124
 125 config TRACE_IRQFLAGS_SUPPORT
 126         bool
 127         default y
 128
 129 config HARDIRQS_SW_RESEND
 130         bool
 131         default y
 132
 133 config GENERIC_IRQ_PROBE
 134         bool
 135         default y
 136
 137 config GENERIC_LOCKBREAK
 138         bool
 139         default y
 140         depends on SMP && PREEMPT
 141
 142 config RWSEM_GENERIC_SPINLOCK
 143         bool
 144         default y
 145
 146 config RWSEM_XCHGADD_ALGORITHM
 147         bool
 148
 149 config ARCH_HAS_ILOG2_U32
 150         bool
 151
 152 config ARCH_HAS_ILOG2_U64
 153         bool
 154
 155 config ARCH_HAS_CPUFREQ
 156         bool
 157         help
 158           Internal node to signify that the ARCH has CPUFREQ support
 159           and that the relevant menu configurations are displayed for
 160           it.
 161
 162 config ARCH_HAS_CPU_IDLE_WAIT
 163        def_bool y
 164
 165 config GENERIC_HWEIGHT
 166         bool
 167         default y
 168
 169 config GENERIC_CALIBRATE_DELAY
 170         bool
 171         default y
 172
 173 config ARCH_MAY_HAVE_PC_FDC
 174         bool
 175
 176 config ZONE_DMA
 177         bool
 178
 179 config NEED_DMA_MAP_STATE
 180        def_bool y
 181
 182 config ARCH_HAS_DMA_SET_COHERENT_MASK
 183         bool
 184
 185 config GENERIC_ISA_DMA
 186         bool
 187
 188 config FIQ
 189         bool
 190
 191 config NEED_RET_TO_USER
 192         bool
 193
 194 config ARCH_MTD_XIP
 195         bool
 196
 197 config VECTORS_BASE
 198         hex
 199         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 200         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 201         default 0x00000000
 202         help
 203           The base address of exception vectors.
 204
 205 config ARM_PATCH_PHYS_VIRT
 206         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 207         default y
 208         depends on !XIP_KERNEL && MMU
 209         depends on !ARCH_REALVIEW || !SPARSEMEM
 210         help
 211           Patch phys-to-virt and virt-to-phys translation functions at
 212           boot and module load time according to the position of the
 213           kernel in system memory.
 214
 215           This can only be used with non-XIP MMU kernels where the base
 216           of physical memory is at a 16MB boundary.
 217
 218           Only disable this option if you know that you do not require
 219           this feature (eg, building a kernel for a single machine) and
 220           you need to shrink the kernel to the minimal size.
 221
 222 config NEED_MACH_IO_H
 223         bool
 224         help
 225           Select this when mach/io.h is required to provide special
 226           definitions for this platform.  The need for mach/io.h should
 227           be avoided when possible.
 228
 229 config NEED_MACH_MEMORY_H
 230         bool
 231         help
 232           Select this when mach/memory.h is required to provide special
 233           definitions for this platform.  The need for mach/memory.h should
 234           be avoided when possible.
 235
 236 config PHYS_OFFSET
 237         hex "Physical address of main memory" if MMU
 238         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 239         default DRAM_BASE if !MMU
 240         help
 241           Please provide the physical address corresponding to the
 242           location of main memory in your system.
 243
 244 config GENERIC_BUG
 245         def_bool y
 246         depends on BUG
 247
 248 source "init/Kconfig"
 249
 250 source "kernel/Kconfig.freezer"
 251
 252 menu "System Type"
 253
 254 config MMU
 255         bool "MMU-based Paged Memory Management Support"
 256         default y
 257         help
 258           Select if you want MMU-based virtualised addressing space
 259           support by paged memory management. If unsure, say 'Y'.
 260
 261 #
 262 # The "ARM system type" choice list is ordered alphabetically by option
 263 # text.  Please add new entries in the option alphabetic order.
 264 #
 265 choice
 266         prompt "ARM system type"
 267         default ARCH_VERSATILE
 268
 269 config ARCH_INTEGRATOR
 270         bool "ARM Ltd. Integrator family"
 271         select ARM_AMBA
 272         select ARCH_HAS_CPUFREQ
 273         select CLKDEV_LOOKUP
 274         select HAVE_MACH_CLKDEV
 275         select HAVE_TCM
 276         select ICST
 277         select GENERIC_CLOCKEVENTS
 278         select PLAT_VERSATILE
 279         select PLAT_VERSATILE_FPGA_IRQ
 280         select NEED_MACH_IO_H
 281         select NEED_MACH_MEMORY_H
 282         select SPARSE_IRQ
 283         help
 284           Support for ARM's Integrator platform.
 285
 286 config ARCH_REALVIEW
 287         bool "ARM Ltd. RealView family"
 288         select ARM_AMBA
 289         select CLKDEV_LOOKUP
 290         select HAVE_MACH_CLKDEV
 291         select ICST
 292         select GENERIC_CLOCKEVENTS
 293         select ARCH_WANT_OPTIONAL_GPIOLIB
 294         select PLAT_VERSATILE
 295         select PLAT_VERSATILE_CLCD
 296         select ARM_TIMER_SP804
 297         select GPIO_PL061 if GPIOLIB
 298         select NEED_MACH_MEMORY_H
 299         help
 300           This enables support for ARM Ltd RealView boards.
 301
 302 config ARCH_VERSATILE
 303         bool "ARM Ltd. Versatile family"
 304         select ARM_AMBA
 305         select ARM_VIC
 306         select CLKDEV_LOOKUP
 307         select HAVE_MACH_CLKDEV
 308         select ICST
 309         select GENERIC_CLOCKEVENTS
 310         select ARCH_WANT_OPTIONAL_GPIOLIB
 311         select PLAT_VERSATILE
 312         select PLAT_VERSATILE_CLCD
 313         select PLAT_VERSATILE_FPGA_IRQ
 314         select ARM_TIMER_SP804
 315         help
 316           This enables support for ARM Ltd Versatile board.
 317
 318 config ARCH_VEXPRESS
 319         bool "ARM Ltd. Versatile Express family"
 320         select ARCH_WANT_OPTIONAL_GPIOLIB
 321         select ARM_AMBA
 322         select ARM_TIMER_SP804
 323         select CLKDEV_LOOKUP
 324         select HAVE_MACH_CLKDEV
 325         select GENERIC_CLOCKEVENTS
 326         select HAVE_CLK
 327         select HAVE_PATA_PLATFORM
 328         select ICST
 329         select NO_IOPORT
 330         select PLAT_VERSATILE
 331         select PLAT_VERSATILE_CLCD
 332         help
 333           This enables support for the ARM Ltd Versatile Express boards.
 334
 335 config ARCH_AT91
 336         bool "Atmel AT91"
 337         select ARCH_REQUIRE_GPIOLIB
 338         select HAVE_CLK
 339         select CLKDEV_LOOKUP
 340         select IRQ_DOMAIN
 341         select NEED_MACH_IO_H if PCCARD
 342         help
 343           This enables support for systems based on the Atmel AT91RM9200,
 344           AT91SAM9 processors.
 345
 346 config ARCH_BCMRING
 347         bool "Broadcom BCMRING"
 348         depends on MMU
 349         select CPU_V6
 350         select ARM_AMBA
 351         select ARM_TIMER_SP804
 352         select CLKDEV_LOOKUP
 353         select GENERIC_CLOCKEVENTS
 354         select ARCH_WANT_OPTIONAL_GPIOLIB
 355         help
 356           Support for Broadcom's BCMRing platform.
 357
 358 config ARCH_HIGHBANK
 359         bool "Calxeda Highbank-based"
 360         select ARCH_WANT_OPTIONAL_GPIOLIB
 361         select ARM_AMBA
 362         select ARM_GIC
 363         select ARM_TIMER_SP804
 364         select CACHE_L2X0
 365         select CLKDEV_LOOKUP
 366         select CPU_V7
 367         select GENERIC_CLOCKEVENTS
 368         select HAVE_ARM_SCU
 369         select HAVE_SMP
 370         select SPARSE_IRQ
 371         select USE_OF
 372         help
 373           Support for the Calxeda Highbank SoC based boards.
 374
 375 config ARCH_CLPS711X
 376         bool "Cirrus Logic CLPS711x/EP721x-based"
 377         select CPU_ARM720T
 378         select ARCH_USES_GETTIMEOFFSET
 379         select NEED_MACH_MEMORY_H
 380         help
 381           Support for Cirrus Logic 711x/721x based boards.
 382
 383 config ARCH_CNS3XXX
 384         bool "Cavium Networks CNS3XXX family"
 385         select CPU_V6K
 386         select GENERIC_CLOCKEVENTS
 387         select ARM_GIC
 388         select MIGHT_HAVE_CACHE_L2X0
 389         select MIGHT_HAVE_PCI
 390         select PCI_DOMAINS if PCI
 391         help
 392           Support for Cavium Networks CNS3XXX platform.
 393
 394 config ARCH_GEMINI
 395         bool "Cortina Systems Gemini"
 396         select CPU_FA526
 397         select ARCH_REQUIRE_GPIOLIB
 398         select ARCH_USES_GETTIMEOFFSET
 399         help
 400           Support for the Cortina Systems Gemini family SoCs
 401
 402 config ARCH_PRIMA2
 403         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 404         select CPU_V7
 405         select NO_IOPORT
 406         select GENERIC_CLOCKEVENTS
 407         select CLKDEV_LOOKUP
 408         select GENERIC_IRQ_CHIP
 409         select MIGHT_HAVE_CACHE_L2X0
 410         select USE_OF
 411         select ZONE_DMA
 412         help
 413           Support for CSR SiRFSoC ARM Cortex A9 Platform
 414
 415 config ARCH_EBSA110
 416         bool "EBSA-110"
 417         select CPU_SA110
 418         select ISA
 419         select NO_IOPORT
 420         select ARCH_USES_GETTIMEOFFSET
 421         select NEED_MACH_IO_H
 422         select NEED_MACH_MEMORY_H
 423         help
 424           This is an evaluation board for the StrongARM processor available
 425           from Digital. It has limited hardware on-board, including an
 426           Ethernet interface, two PCMCIA sockets, two serial ports and a
 427           parallel port.
 428
 429 config ARCH_EP93XX
 430         bool "EP93xx-based"
 431         select CPU_ARM920T
 432         select ARM_AMBA
 433         select ARM_VIC
 434         select CLKDEV_LOOKUP
 435         select ARCH_REQUIRE_GPIOLIB
 436         select ARCH_HAS_HOLES_MEMORYMODEL
 437         select ARCH_USES_GETTIMEOFFSET
 438         select NEED_MACH_MEMORY_H
 439         help
 440           This enables support for the Cirrus EP93xx series of CPUs.
 441
 442 config ARCH_FOOTBRIDGE
 443         bool "FootBridge"
 444         select CPU_SA110
 445         select FOOTBRIDGE
 446         select GENERIC_CLOCKEVENTS
 447         select HAVE_IDE
 448         select NEED_MACH_IO_H
 449         select NEED_MACH_MEMORY_H
 450         help
 451           Support for systems based on the DC21285 companion chip
 452           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 453
 454 config ARCH_MXC
 455         bool "Freescale MXC/iMX-based"
 456         select GENERIC_CLOCKEVENTS
 457         select ARCH_REQUIRE_GPIOLIB
 458         select CLKDEV_LOOKUP
 459         select CLKSRC_MMIO
 460         select GENERIC_IRQ_CHIP
 461         select MULTI_IRQ_HANDLER
 462         help
 463           Support for Freescale MXC/iMX-based family of processors
 464
 465 config ARCH_MXS
 466         bool "Freescale MXS-based"
 467         select GENERIC_CLOCKEVENTS
 468         select ARCH_REQUIRE_GPIOLIB
 469         select CLKDEV_LOOKUP
 470         select CLKSRC_MMIO
 471         select HAVE_CLK_PREPARE
 472         select PINCTRL
 473         help
 474           Support for Freescale MXS-based family of processors
 475
 476 config ARCH_NETX
 477         bool "Hilscher NetX based"
 478         select CLKSRC_MMIO
 479         select CPU_ARM926T
 480         select ARM_VIC
 481         select GENERIC_CLOCKEVENTS
 482         help
 483           This enables support for systems based on the Hilscher NetX Soc
 484
 485 config ARCH_H720X
 486         bool "Hynix HMS720x-based"
 487         select CPU_ARM720T
 488         select ISA_DMA_API
 489         select ARCH_USES_GETTIMEOFFSET
 490         help
 491           This enables support for systems based on the Hynix HMS720x
 492
 493 config ARCH_IOP13XX
 494         bool "IOP13xx-based"
 495         depends on MMU
 496         select CPU_XSC3
 497         select PLAT_IOP
 498         select PCI
 499         select ARCH_SUPPORTS_MSI
 500         select VMSPLIT_1G
 501         select NEED_MACH_IO_H
 502         select NEED_MACH_MEMORY_H
 503         select NEED_RET_TO_USER
 504         help
 505           Support for Intel's IOP13XX (XScale) family of processors.
 506
 507 config ARCH_IOP32X
 508         bool "IOP32x-based"
 509         depends on MMU
 510         select CPU_XSCALE
 511         select NEED_MACH_IO_H
 512         select NEED_RET_TO_USER
 513         select PLAT_IOP
 514         select PCI
 515         select ARCH_REQUIRE_GPIOLIB
 516         help
 517           Support for Intel's 80219 and IOP32X (XScale) family of
 518           processors.
 519
 520 config ARCH_IOP33X
 521         bool "IOP33x-based"
 522         depends on MMU
 523         select CPU_XSCALE
 524         select NEED_MACH_IO_H
 525         select NEED_RET_TO_USER
 526         select PLAT_IOP
 527         select PCI
 528         select ARCH_REQUIRE_GPIOLIB
 529         help
 530           Support for Intel's IOP33X (XScale) family of processors.
 531
 532 config ARCH_IXP23XX
 533         bool "IXP23XX-based"
 534         depends on MMU
 535         select CPU_XSC3
 536         select PCI
 537         select ARCH_USES_GETTIMEOFFSET
 538         select NEED_MACH_IO_H
 539         select NEED_MACH_MEMORY_H
 540         help
 541           Support for Intel's IXP23xx (XScale) family of processors.
 542
 543 config ARCH_IXP2000
 544         bool "IXP2400/2800-based"
 545         depends on MMU
 546         select CPU_XSCALE
 547         select PCI
 548         select ARCH_USES_GETTIMEOFFSET
 549         select NEED_MACH_IO_H
 550         select NEED_MACH_MEMORY_H
 551         help
 552           Support for Intel's IXP2400/2800 (XScale) family of processors.
 553
 554 config ARCH_IXP4XX
 555         bool "IXP4xx-based"
 556         depends on MMU
 557         select ARCH_HAS_DMA_SET_COHERENT_MASK
 558         select CLKSRC_MMIO
 559         select CPU_XSCALE
 560         select GENERIC_GPIO
 561         select GENERIC_CLOCKEVENTS
 562         select MIGHT_HAVE_PCI
 563         select NEED_MACH_IO_H
 564         select DMABOUNCE if PCI
 565         help
 566           Support for Intel's IXP4XX (XScale) family of processors.
 567
 568 config ARCH_DOVE
 569         bool "Marvell Dove"
 570         select CPU_V7
 571         select PCI
 572         select ARCH_REQUIRE_GPIOLIB
 573         select GENERIC_CLOCKEVENTS
 574         select NEED_MACH_IO_H
 575         select PLAT_ORION
 576         help
 577           Support for the Marvell Dove SoC 88AP510
 578
 579 config ARCH_KIRKWOOD
 580         bool "Marvell Kirkwood"
 581         select CPU_FEROCEON
 582         select PCI
 583         select ARCH_REQUIRE_GPIOLIB
 584         select GENERIC_CLOCKEVENTS
 585         select NEED_MACH_IO_H
 586         select PLAT_ORION
 587         help
 588           Support for the following Marvell Kirkwood series SoCs:
 589           88F6180, 88F6192 and 88F6281.
 590
 591 config ARCH_LPC32XX
 592         bool "NXP LPC32XX"
 593         select CLKSRC_MMIO
 594         select CPU_ARM926T
 595         select ARCH_REQUIRE_GPIOLIB
 596         select HAVE_IDE
 597         select ARM_AMBA
 598         select USB_ARCH_HAS_OHCI
 599         select CLKDEV_LOOKUP
 600         select GENERIC_CLOCKEVENTS
 601         help
 602           Support for the NXP LPC32XX family of processors
 603
 604 config ARCH_MV78XX0
 605         bool "Marvell MV78xx0"
 606         select CPU_FEROCEON
 607         select PCI
 608         select ARCH_REQUIRE_GPIOLIB
 609         select GENERIC_CLOCKEVENTS
 610         select NEED_MACH_IO_H
 611         select PLAT_ORION
 612         help
 613           Support for the following Marvell MV78xx0 series SoCs:
 614           MV781x0, MV782x0.
 615
 616 config ARCH_ORION5X
 617         bool "Marvell Orion"
 618         depends on MMU
 619         select CPU_FEROCEON
 620         select PCI
 621         select ARCH_REQUIRE_GPIOLIB
 622         select GENERIC_CLOCKEVENTS
 623         select PLAT_ORION
 624         help
 625           Support for the following Marvell Orion 5x series SoCs:
 626           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 627           Orion-2 (5281), Orion-1-90 (6183).
 628
 629 config ARCH_MMP
 630         bool "Marvell PXA168/910/MMP2"
 631         depends on MMU
 632         select ARCH_REQUIRE_GPIOLIB
 633         select CLKDEV_LOOKUP
 634         select GENERIC_CLOCKEVENTS
 635         select GPIO_PXA
 636         select TICK_ONESHOT
 637         select PLAT_PXA
 638         select SPARSE_IRQ
 639         select GENERIC_ALLOCATOR
 640         help
 641           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 642
 643 config ARCH_KS8695
 644         bool "Micrel/Kendin KS8695"
 645         select CPU_ARM922T
 646         select ARCH_REQUIRE_GPIOLIB
 647         select ARCH_USES_GETTIMEOFFSET
 648         select NEED_MACH_MEMORY_H
 649         help
 650           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 651           System-on-Chip devices.
 652
 653 config ARCH_W90X900
 654         bool "Nuvoton W90X900 CPU"
 655         select CPU_ARM926T
 656         select ARCH_REQUIRE_GPIOLIB
 657         select CLKDEV_LOOKUP
 658         select CLKSRC_MMIO
 659         select GENERIC_CLOCKEVENTS
 660         help
 661           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 662           At present, the w90x900 has been renamed nuc900, regarding
 663           the ARM series product line, you can login the following
 664           link address to know more.
 665
 666           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 667                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 668
 669 config ARCH_TEGRA
 670         bool "NVIDIA Tegra"
 671         select CLKDEV_LOOKUP
 672         select CLKSRC_MMIO
 673         select GENERIC_CLOCKEVENTS
 674         select GENERIC_GPIO
 675         select HAVE_CLK
 676         select HAVE_SMP
 677         select MIGHT_HAVE_CACHE_L2X0
 678         select NEED_MACH_IO_H if PCI
 679         select ARCH_HAS_CPUFREQ
 680         help
 681           This enables support for NVIDIA Tegra based systems (Tegra APX,
 682           Tegra 6xx and Tegra 2 series).
 683
 684 config ARCH_PICOXCELL
 685         bool "Picochip picoXcell"
 686         select ARCH_REQUIRE_GPIOLIB
 687         select ARM_PATCH_PHYS_VIRT
 688         select ARM_VIC
 689         select CPU_V6K
 690         select DW_APB_TIMER
 691         select GENERIC_CLOCKEVENTS
 692         select GENERIC_GPIO
 693         select HAVE_TCM
 694         select NO_IOPORT
 695         select SPARSE_IRQ
 696         select USE_OF
 697         help
 698           This enables support for systems based on the Picochip picoXcell
 699           family of Femtocell devices.  The picoxcell support requires device tree
 700           for all boards.
 701
 702 config ARCH_PNX4008
 703         bool "Philips Nexperia PNX4008 Mobile"
 704         select CPU_ARM926T
 705         select CLKDEV_LOOKUP
 706         select ARCH_USES_GETTIMEOFFSET
 707         help
 708           This enables support for Philips PNX4008 mobile platform.
 709
 710 config ARCH_PXA
 711         bool "PXA2xx/PXA3xx-based"
 712         depends on MMU
 713         select ARCH_MTD_XIP
 714         select ARCH_HAS_CPUFREQ
 715         select CLKDEV_LOOKUP
 716         select CLKSRC_MMIO
 717         select ARCH_REQUIRE_GPIOLIB
 718         select GENERIC_CLOCKEVENTS
 719         select GPIO_PXA
 720         select TICK_ONESHOT
 721         select PLAT_PXA
 722         select SPARSE_IRQ
 723         select AUTO_ZRELADDR
 724         select MULTI_IRQ_HANDLER
 725         select ARM_CPU_SUSPEND if PM
 726         select HAVE_IDE
 727         help
 728           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 729
 730 config ARCH_MSM
 731         bool "Qualcomm MSM"
 732         select HAVE_CLK
 733         select GENERIC_CLOCKEVENTS
 734         select ARCH_REQUIRE_GPIOLIB
 735         select CLKDEV_LOOKUP
 736         help
 737           Support for Qualcomm MSM/QSD based systems.  This runs on the
 738           apps processor of the MSM/QSD and depends on a shared memory
 739           interface to the modem processor which runs the baseband
 740           stack and controls some vital subsystems
 741           (clock and power control, etc).
 742
 743 config ARCH_SHMOBILE
 744         bool "Renesas SH-Mobile / R-Mobile"
 745         select HAVE_CLK
 746         select CLKDEV_LOOKUP
 747         select HAVE_MACH_CLKDEV
 748         select HAVE_SMP
 749         select GENERIC_CLOCKEVENTS
 750         select MIGHT_HAVE_CACHE_L2X0
 751         select NO_IOPORT
 752         select SPARSE_IRQ
 753         select MULTI_IRQ_HANDLER
 754         select PM_GENERIC_DOMAINS if PM
 755         select NEED_MACH_MEMORY_H
 756         help
 757           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 758
 759 config ARCH_RPC
 760         bool "RiscPC"
 761         select ARCH_ACORN
 762         select FIQ
 763         select ARCH_MAY_HAVE_PC_FDC
 764         select HAVE_PATA_PLATFORM
 765         select ISA_DMA_API
 766         select NO_IOPORT
 767         select ARCH_SPARSEMEM_ENABLE
 768         select ARCH_USES_GETTIMEOFFSET
 769         select HAVE_IDE
 770         select NEED_MACH_IO_H
 771         select NEED_MACH_MEMORY_H
 772         help
 773           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 774           CD-ROM interface, serial and parallel port, and the floppy drive.
 775
 776 config ARCH_SA1100
 777         bool "SA1100-based"
 778         select CLKSRC_MMIO
 779         select CPU_SA1100
 780         select ISA
 781         select ARCH_SPARSEMEM_ENABLE
 782         select ARCH_MTD_XIP
 783         select ARCH_HAS_CPUFREQ
 784         select CPU_FREQ
 785         select GENERIC_CLOCKEVENTS
 786         select CLKDEV_LOOKUP
 787         select TICK_ONESHOT
 788         select ARCH_REQUIRE_GPIOLIB
 789         select HAVE_IDE
 790         select NEED_MACH_MEMORY_H
 791         select SPARSE_IRQ
 792         help
 793           Support for StrongARM 11x0 based boards.
 794
 795 config ARCH_S3C24XX
 796         bool "Samsung S3C24XX SoCs"
 797         select GENERIC_GPIO
 798         select ARCH_HAS_CPUFREQ
 799         select HAVE_CLK
 800         select CLKDEV_LOOKUP
 801         select ARCH_USES_GETTIMEOFFSET
 802         select HAVE_S3C2410_I2C if I2C
 803         select HAVE_S3C_RTC if RTC_CLASS
 804         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 805         select NEED_MACH_IO_H
 806         help
 807           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 808           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 809           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 810           Samsung SMDK2410 development board (and derivatives).
 811
 812 config ARCH_S3C64XX
 813         bool "Samsung S3C64XX"
 814         select PLAT_SAMSUNG
 815         select CPU_V6
 816         select ARM_VIC
 817         select HAVE_CLK
 818         select HAVE_TCM
 819         select CLKDEV_LOOKUP
 820         select NO_IOPORT
 821         select ARCH_USES_GETTIMEOFFSET
 822         select ARCH_HAS_CPUFREQ
 823         select ARCH_REQUIRE_GPIOLIB
 824         select SAMSUNG_CLKSRC
 825         select SAMSUNG_IRQ_VIC_TIMER
 826         select S3C_GPIO_TRACK
 827         select S3C_DEV_NAND
 828         select USB_ARCH_HAS_OHCI
 829         select SAMSUNG_GPIOLIB_4BIT
 830         select HAVE_S3C2410_I2C if I2C
 831         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 832         help
 833           Samsung S3C64XX series based systems
 834
 835 config ARCH_S5P64X0
 836         bool "Samsung S5P6440 S5P6450"
 837         select CPU_V6
 838         select GENERIC_GPIO
 839         select HAVE_CLK
 840         select CLKDEV_LOOKUP
 841         select CLKSRC_MMIO
 842         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 843         select GENERIC_CLOCKEVENTS
 844         select HAVE_S3C2410_I2C if I2C
 845         select HAVE_S3C_RTC if RTC_CLASS
 846         help
 847           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 848           SMDK6450.
 849
 850 config ARCH_S5PC100
 851         bool "Samsung S5PC100"
 852         select GENERIC_GPIO
 853         select HAVE_CLK
 854         select CLKDEV_LOOKUP
 855         select CPU_V7
 856         select ARCH_USES_GETTIMEOFFSET
 857         select HAVE_S3C2410_I2C if I2C
 858         select HAVE_S3C_RTC if RTC_CLASS
 859         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 860         help
 861           Samsung S5PC100 series based systems
 862
 863 config ARCH_S5PV210
 864         bool "Samsung S5PV210/S5PC110"
 865         select CPU_V7
 866         select ARCH_SPARSEMEM_ENABLE
 867         select ARCH_HAS_HOLES_MEMORYMODEL
 868         select GENERIC_GPIO
 869         select HAVE_CLK
 870         select CLKDEV_LOOKUP
 871         select CLKSRC_MMIO
 872         select ARCH_HAS_CPUFREQ
 873         select GENERIC_CLOCKEVENTS
 874         select HAVE_S3C2410_I2C if I2C
 875         select HAVE_S3C_RTC if RTC_CLASS
 876         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 877         select NEED_MACH_MEMORY_H
 878         help
 879           Samsung S5PV210/S5PC110 series based systems
 880
 881 config ARCH_EXYNOS
 882         bool "SAMSUNG EXYNOS"
 883         select CPU_V7
 884         select ARCH_SPARSEMEM_ENABLE
 885         select ARCH_HAS_HOLES_MEMORYMODEL
 886         select GENERIC_GPIO
 887         select HAVE_CLK
 888         select CLKDEV_LOOKUP
 889         select ARCH_HAS_CPUFREQ
 890         select GENERIC_CLOCKEVENTS
 891         select HAVE_S3C_RTC if RTC_CLASS
 892         select HAVE_S3C2410_I2C if I2C
 893         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 894         select NEED_MACH_MEMORY_H
 895         help
 896           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 897
 898 config ARCH_SHARK
 899         bool "Shark"
 900         select CPU_SA110
 901         select ISA
 902         select ISA_DMA
 903         select ZONE_DMA
 904         select PCI
 905         select ARCH_USES_GETTIMEOFFSET
 906         select NEED_MACH_MEMORY_H
 907         select NEED_MACH_IO_H
 908         help
 909           Support for the StrongARM based Digital DNARD machine, also known
 910           as "Shark" (<http://www.shark-linux.de/shark.html>).
 911
 912 config ARCH_U300
 913         bool "ST-Ericsson U300 Series"
 914         depends on MMU
 915         select CLKSRC_MMIO
 916         select CPU_ARM926T
 917         select HAVE_TCM
 918         select ARM_AMBA
 919         select ARM_PATCH_PHYS_VIRT
 920         select ARM_VIC
 921         select GENERIC_CLOCKEVENTS
 922         select CLKDEV_LOOKUP
 923         select HAVE_MACH_CLKDEV
 924         select GENERIC_GPIO
 925         select ARCH_REQUIRE_GPIOLIB
 926         help
 927           Support for ST-Ericsson U300 series mobile platforms.
 928
 929 config ARCH_U8500
 930         bool "ST-Ericsson U8500 Series"
 931         depends on MMU
 932         select CPU_V7
 933         select ARM_AMBA
 934         select GENERIC_CLOCKEVENTS
 935         select CLKDEV_LOOKUP
 936         select ARCH_REQUIRE_GPIOLIB
 937         select ARCH_HAS_CPUFREQ
 938         select HAVE_SMP
 939         select MIGHT_HAVE_CACHE_L2X0
 940         help
 941           Support for ST-Ericsson's Ux500 architecture
 942
 943 config ARCH_NOMADIK
 944         bool "STMicroelectronics Nomadik"
 945         select ARM_AMBA
 946         select ARM_VIC
 947         select CPU_ARM926T
 948         select CLKDEV_LOOKUP
 949         select GENERIC_CLOCKEVENTS
 950         select PINCTRL
 951         select MIGHT_HAVE_CACHE_L2X0
 952         select ARCH_REQUIRE_GPIOLIB
 953         help
 954           Support for the Nomadik platform by ST-Ericsson
 955
 956 config ARCH_DAVINCI
 957         bool "TI DaVinci"
 958         select GENERIC_CLOCKEVENTS
 959         select ARCH_REQUIRE_GPIOLIB
 960         select ZONE_DMA
 961         select HAVE_IDE
 962         select CLKDEV_LOOKUP
 963         select GENERIC_ALLOCATOR
 964         select GENERIC_IRQ_CHIP
 965         select ARCH_HAS_HOLES_MEMORYMODEL
 966         help
 967           Support for TI's DaVinci platform.
 968
 969 config ARCH_OMAP
 970         bool "TI OMAP"
 971         select HAVE_CLK
 972         select ARCH_REQUIRE_GPIOLIB
 973         select ARCH_HAS_CPUFREQ
 974         select CLKSRC_MMIO
 975         select GENERIC_CLOCKEVENTS
 976         select ARCH_HAS_HOLES_MEMORYMODEL
 977         help
 978           Support for TI's OMAP platform (OMAP1/2/3/4).
 979
 980 config PLAT_SPEAR
 981         bool "ST SPEAr"
 982         select ARM_AMBA
 983         select ARCH_REQUIRE_GPIOLIB
 984         select CLKDEV_LOOKUP
 985         select CLKSRC_MMIO
 986         select GENERIC_CLOCKEVENTS
 987         select HAVE_CLK
 988         help
 989           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 990
 991 config ARCH_VT8500
 992         bool "VIA/WonderMedia 85xx"
 993         select CPU_ARM926T
 994         select GENERIC_GPIO
 995         select ARCH_HAS_CPUFREQ
 996         select GENERIC_CLOCKEVENTS
 997         select ARCH_REQUIRE_GPIOLIB
 998         select HAVE_PWM
 999         help
1000           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
1001
1002 config ARCH_ZYNQ
1003         bool "Xilinx Zynq ARM Cortex A9 Platform"
1004         select CPU_V7
1005         select GENERIC_CLOCKEVENTS
1006         select CLKDEV_LOOKUP
1007         select ARM_GIC
1008         select ARM_AMBA
1009         select ICST
1010         select MIGHT_HAVE_CACHE_L2X0
1011         select USE_OF
1012         help
1013           Support for Xilinx Zynq ARM Cortex A9 Platform
1014 endchoice
1015
1016 #
1017 # This is sorted alphabetically by mach-* pathname.  However, plat-*
1018 # Kconfigs may be included either alphabetically (according to the
1019 # plat- suffix) or along side the corresponding mach-* source.
1020 #
1021 source "arch/arm/mach-at91/Kconfig"
1022
1023 source "arch/arm/mach-bcmring/Kconfig"
1024
1025 source "arch/arm/mach-clps711x/Kconfig"
1026
1027 source "arch/arm/mach-cns3xxx/Kconfig"
1028
1029 source "arch/arm/mach-davinci/Kconfig"
1030
1031 source "arch/arm/mach-dove/Kconfig"
1032
1033 source "arch/arm/mach-ep93xx/Kconfig"
1034
1035 source "arch/arm/mach-footbridge/Kconfig"
1036
1037 source "arch/arm/mach-gemini/Kconfig"
1038
1039 source "arch/arm/mach-h720x/Kconfig"
1040
1041 source "arch/arm/mach-integrator/Kconfig"
1042
1043 source "arch/arm/mach-iop32x/Kconfig"
1044
1045 source "arch/arm/mach-iop33x/Kconfig"
1046
1047 source "arch/arm/mach-iop13xx/Kconfig"
1048
1049 source "arch/arm/mach-ixp4xx/Kconfig"
1050
1051 source "arch/arm/mach-ixp2000/Kconfig"
1052
1053 source "arch/arm/mach-ixp23xx/Kconfig"
1054
1055 source "arch/arm/mach-kirkwood/Kconfig"
1056
1057 source "arch/arm/mach-ks8695/Kconfig"
1058
1059 source "arch/arm/mach-lpc32xx/Kconfig"
1060
1061 source "arch/arm/mach-msm/Kconfig"
1062
1063 source "arch/arm/mach-mv78xx0/Kconfig"
1064
1065 source "arch/arm/plat-mxc/Kconfig"
1066
1067 source "arch/arm/mach-mxs/Kconfig"
1068
1069 source "arch/arm/mach-netx/Kconfig"
1070
1071 source "arch/arm/mach-nomadik/Kconfig"
1072 source "arch/arm/plat-nomadik/Kconfig"
1073
1074 source "arch/arm/plat-omap/Kconfig"
1075
1076 source "arch/arm/mach-omap1/Kconfig"
1077
1078 source "arch/arm/mach-omap2/Kconfig"
1079
1080 source "arch/arm/mach-orion5x/Kconfig"
1081
1082 source "arch/arm/mach-pxa/Kconfig"
1083 source "arch/arm/plat-pxa/Kconfig"
1084
1085 source "arch/arm/mach-mmp/Kconfig"
1086
1087 source "arch/arm/mach-realview/Kconfig"
1088
1089 source "arch/arm/mach-sa1100/Kconfig"
1090
1091 source "arch/arm/plat-samsung/Kconfig"
1092 source "arch/arm/plat-s3c24xx/Kconfig"
1093 source "arch/arm/plat-s5p/Kconfig"
1094
1095 source "arch/arm/plat-spear/Kconfig"
1096
1097 source "arch/arm/mach-s3c24xx/Kconfig"
1098 if ARCH_S3C24XX
1099 source "arch/arm/mach-s3c2412/Kconfig"
1100 source "arch/arm/mach-s3c2440/Kconfig"
1101 endif
1102
1103 if ARCH_S3C64XX
1104 source "arch/arm/mach-s3c64xx/Kconfig"
1105 endif
1106
1107 source "arch/arm/mach-s5p64x0/Kconfig"
1108
1109 source "arch/arm/mach-s5pc100/Kconfig"
1110
1111 source "arch/arm/mach-s5pv210/Kconfig"
1112
1113 source "arch/arm/mach-exynos/Kconfig"
1114
1115 source "arch/arm/mach-shmobile/Kconfig"
1116
1117 source "arch/arm/mach-tegra/Kconfig"
1118
1119 source "arch/arm/mach-u300/Kconfig"
1120
1121 source "arch/arm/mach-ux500/Kconfig"
1122
1123 source "arch/arm/mach-versatile/Kconfig"
1124
1125 source "arch/arm/mach-vexpress/Kconfig"
1126 source "arch/arm/plat-versatile/Kconfig"
1127
1128 source "arch/arm/mach-vt8500/Kconfig"
1129
1130 source "arch/arm/mach-w90x900/Kconfig"
1131
1132 # Definitions to make life easier
1133 config ARCH_ACORN
1134         bool
1135
1136 config PLAT_IOP
1137         bool
1138         select GENERIC_CLOCKEVENTS
1139
1140 config PLAT_ORION
1141         bool
1142         select CLKSRC_MMIO
1143         select GENERIC_IRQ_CHIP
1144
1145 config PLAT_PXA
1146         bool
1147
1148 config PLAT_VERSATILE
1149         bool
1150
1151 config ARM_TIMER_SP804
1152         bool
1153         select CLKSRC_MMIO
1154         select HAVE_SCHED_CLOCK
1155
1156 source arch/arm/mm/Kconfig
1157
1158 config ARM_NR_BANKS
1159         int
1160         default 16 if ARCH_EP93XX
1161         default 8
1162
1163 config IWMMXT
1164         bool "Enable iWMMXt support"
1165         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1166         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1167         help
1168           Enable support for iWMMXt context switching at run time if
1169           running on a CPU that supports it.
1170
1171 config XSCALE_PMU
1172         bool
1173         depends on CPU_XSCALE
1174         default y
1175
1176 config CPU_HAS_PMU
1177         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1178                    (!ARCH_OMAP3 || OMAP3_EMU)
1179         default y
1180         bool
1181
1182 config MULTI_IRQ_HANDLER
1183         bool
1184         help
1185           Allow each machine to specify it's own IRQ handler at run time.
1186
1187 if !MMU
1188 source "arch/arm/Kconfig-nommu"
1189 endif
1190
1191 config ARM_ERRATA_411920
1192         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1193         depends on CPU_V6 || CPU_V6K
1194         help
1195           Invalidation of the Instruction Cache operation can
1196           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1197           It does not affect the MPCore. This option enables the ARM Ltd.
1198           recommended workaround.
1199
1200 config ARM_ERRATA_430973
1201         bool "ARM errata: Stale prediction on replaced interworking branch"
1202         depends on CPU_V7
1203         help
1204           This option enables the workaround for the 430973 Cortex-A8
1205           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1206           interworking branch is replaced with another code sequence at the
1207           same virtual address, whether due to self-modifying code or virtual
1208           to physical address re-mapping, Cortex-A8 does not recover from the
1209           stale interworking branch prediction. This results in Cortex-A8
1210           executing the new code sequence in the incorrect ARM or Thumb state.
1211           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1212           and also flushes the branch target cache at every context switch.
1213           Note that setting specific bits in the ACTLR register may not be
1214           available in non-secure mode.
1215
1216 config ARM_ERRATA_458693
1217         bool "ARM errata: Processor deadlock when a false hazard is created"
1218         depends on CPU_V7
1219         help
1220           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1221           erratum. For very specific sequences of memory operations, it is
1222           possible for a hazard condition intended for a cache line to instead
1223           be incorrectly associated with a different cache line. This false
1224           hazard might then cause a processor deadlock. The workaround enables
1225           the L1 caching of the NEON accesses and disables the PLD instruction
1226           in the ACTLR register. Note that setting specific bits in the ACTLR
1227           register may not be available in non-secure mode.
1228
1229 config ARM_ERRATA_460075
1230         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1231         depends on CPU_V7
1232         help
1233           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1234           erratum. Any asynchronous access to the L2 cache may encounter a
1235           situation in which recent store transactions to the L2 cache are lost
1236           and overwritten with stale memory contents from external memory. The
1237           workaround disables the write-allocate mode for the L2 cache via the
1238           ACTLR register. Note that setting specific bits in the ACTLR register
1239           may not be available in non-secure mode.
1240
1241 config ARM_ERRATA_742230
1242         bool "ARM errata: DMB operation may be faulty"
1243         depends on CPU_V7 && SMP
1244         help
1245           This option enables the workaround for the 742230 Cortex-A9
1246           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1247           between two write operations may not ensure the correct visibility
1248           ordering of the two writes. This workaround sets a specific bit in
1249           the diagnostic register of the Cortex-A9 which causes the DMB
1250           instruction to behave as a DSB, ensuring the correct behaviour of
1251           the two writes.
1252
1253 config ARM_ERRATA_742231
1254         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1255         depends on CPU_V7 && SMP
1256         help
1257           This option enables the workaround for the 742231 Cortex-A9
1258           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1259           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1260           accessing some data located in the same cache line, may get corrupted
1261           data due to bad handling of the address hazard when the line gets
1262           replaced from one of the CPUs at the same time as another CPU is
1263           accessing it. This workaround sets specific bits in the diagnostic
1264           register of the Cortex-A9 which reduces the linefill issuing
1265           capabilities of the processor.
1266
1267 config PL310_ERRATA_588369
1268         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1269         depends on CACHE_L2X0
1270         help
1271            The PL310 L2 cache controller implements three types of Clean &
1272            Invalidate maintenance operations: by Physical Address
1273            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1274            They are architecturally defined to behave as the execution of a
1275            clean operation followed immediately by an invalidate operation,
1276            both performing to the same memory location. This functionality
1277            is not correctly implemented in PL310 as clean lines are not
1278            invalidated as a result of these operations.
1279
1280 config ARM_ERRATA_720789
1281         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1282         depends on CPU_V7
1283         help
1284           This option enables the workaround for the 720789 Cortex-A9 (prior to
1285           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1286           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1287           As a consequence of this erratum, some TLB entries which should be
1288           invalidated are not, resulting in an incoherency in the system page
1289           tables. The workaround changes the TLB flushing routines to invalidate
1290           entries regardless of the ASID.
1291
1292 config PL310_ERRATA_727915
1293         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1294         depends on CACHE_L2X0
1295         help
1296           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1297           operation (offset 0x7FC). This operation runs in background so that
1298           PL310 can handle normal accesses while it is in progress. Under very
1299           rare circumstances, due to this erratum, write data can be lost when
1300           PL310 treats a cacheable write transaction during a Clean &
1301           Invalidate by Way operation.
1302
1303 config ARM_ERRATA_743622
1304         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1305         depends on CPU_V7
1306         help
1307           This option enables the workaround for the 743622 Cortex-A9
1308           (r2p*) erratum. Under very rare conditions, a faulty
1309           optimisation in the Cortex-A9 Store Buffer may lead to data
1310           corruption. This workaround sets a specific bit in the diagnostic
1311           register of the Cortex-A9 which disables the Store Buffer
1312           optimisation, preventing the defect from occurring. This has no
1313           visible impact on the overall performance or power consumption of the
1314           processor.
1315
1316 config ARM_ERRATA_751472
1317         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1318         depends on CPU_V7
1319         help
1320           This option enables the workaround for the 751472 Cortex-A9 (prior
1321           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1322           completion of a following broadcasted operation if the second
1323           operation is received by a CPU before the ICIALLUIS has completed,
1324           potentially leading to corrupted entries in the cache or TLB.
1325
1326 config PL310_ERRATA_753970
1327         bool "PL310 errata: cache sync operation may be faulty"
1328         depends on CACHE_PL310
1329         help
1330           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1331
1332           Under some condition the effect of cache sync operation on
1333           the store buffer still remains when the operation completes.
1334           This means that the store buffer is always asked to drain and
1335           this prevents it from merging any further writes. The workaround
1336           is to replace the normal offset of cache sync operation (0x730)
1337           by another offset targeting an unmapped PL310 register 0x740.
1338           This has the same effect as the cache sync operation: store buffer
1339           drain and waiting for all buffers empty.
1340
1341 config ARM_ERRATA_754322
1342         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1343         depends on CPU_V7
1344         help
1345           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1346           r3p*) erratum. A speculative memory access may cause a page table walk
1347           which starts prior to an ASID switch but completes afterwards. This
1348           can populate the micro-TLB with a stale entry which may be hit with
1349           the new ASID. This workaround places two dsb instructions in the mm
1350           switching code so that no page table walks can cross the ASID switch.
1351
1352 config ARM_ERRATA_754327
1353         bool "ARM errata: no automatic Store Buffer drain"
1354         depends on CPU_V7 && SMP
1355         help
1356           This option enables the workaround for the 754327 Cortex-A9 (prior to
1357           r2p0) erratum. The Store Buffer does not have any automatic draining
1358           mechanism and therefore a livelock may occur if an external agent
1359           continuously polls a memory location waiting to observe an update.
1360           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1361           written polling loops from denying visibility of updates to memory.
1362
1363 config ARM_ERRATA_364296
1364         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1365         depends on CPU_V6 && !SMP
1366         help
1367           This options enables the workaround for the 364296 ARM1136
1368           r0p2 erratum (possible cache data corruption with
1369           hit-under-miss enabled). It sets the undocumented bit 31 in
1370           the auxiliary control register and the FI bit in the control
1371           register, thus disabling hit-under-miss without putting the
1372           processor into full low interrupt latency mode. ARM11MPCore
1373           is not affected.
1374
1375 config ARM_ERRATA_764369
1376         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1377         depends on CPU_V7 && SMP
1378         help
1379           This option enables the workaround for erratum 764369
1380           affecting Cortex-A9 MPCore with two or more processors (all
1381           current revisions). Under certain timing circumstances, a data
1382           cache line maintenance operation by MVA targeting an Inner
1383           Shareable memory region may fail to proceed up to either the
1384           Point of Coherency or to the Point of Unification of the
1385           system. This workaround adds a DSB instruction before the
1386           relevant cache maintenance functions and sets a specific bit
1387           in the diagnostic control register of the SCU.
1388
1389 config PL310_ERRATA_769419
1390         bool "PL310 errata: no automatic Store Buffer drain"
1391         depends on CACHE_L2X0
1392         help
1393           On revisions of the PL310 prior to r3p2, the Store Buffer does
1394           not automatically drain. This can cause normal, non-cacheable
1395           writes to be retained when the memory system is idle, leading
1396           to suboptimal I/O performance for drivers using coherent DMA.
1397           This option adds a write barrier to the cpu_idle loop so that,
1398           on systems with an outer cache, the store buffer is drained
1399           explicitly.
1400
1401 endmenu
1402
1403 source "arch/arm/common/Kconfig"
1404
1405 menu "Bus support"
1406
1407 config ARM_AMBA
1408         bool
1409
1410 config ISA
1411         bool
1412         help
1413           Find out whether you have ISA slots on your motherboard.  ISA is the
1414           name of a bus system, i.e. the way the CPU talks to the other stuff
1415           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1416           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1417           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1418
1419 # Select ISA DMA controller support
1420 config ISA_DMA
1421         bool
1422         select ISA_DMA_API
1423
1424 # Select ISA DMA interface
1425 config ISA_DMA_API
1426         bool
1427
1428 config PCI
1429         bool "PCI support" if MIGHT_HAVE_PCI
1430         help
1431           Find out whether you have a PCI motherboard. PCI is the name of a
1432           bus system, i.e. the way the CPU talks to the other stuff inside
1433           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1434           VESA. If you have PCI, say Y, otherwise N.
1435
1436 config PCI_DOMAINS
1437         bool
1438         depends on PCI
1439
1440 config PCI_NANOENGINE
1441         bool "BSE nanoEngine PCI support"
1442         depends on SA1100_NANOENGINE
1443         help
1444           Enable PCI on the BSE nanoEngine board.
1445
1446 config PCI_SYSCALL
1447         def_bool PCI
1448
1449 # Select the host bridge type
1450 config PCI_HOST_VIA82C505
1451         bool
1452         depends on PCI && ARCH_SHARK
1453         default y
1454
1455 config PCI_HOST_ITE8152
1456         bool
1457         depends on PCI && MACH_ARMCORE
1458         default y
1459         select DMABOUNCE
1460
1461 source "drivers/pci/Kconfig"
1462
1463 source "drivers/pcmcia/Kconfig"
1464
1465 endmenu
1466
1467 menu "Kernel Features"
1468
1469 source "kernel/time/Kconfig"
1470
1471 config HAVE_SMP
1472         bool
1473         help
1474           This option should be selected by machines which have an SMP-
1475           capable CPU.
1476
1477           The only effect of this option is to make the SMP-related
1478           options available to the user for configuration.
1479
1480 config SMP
1481         bool "Symmetric Multi-Processing"
1482         depends on CPU_V6K || CPU_V7
1483         depends on GENERIC_CLOCKEVENTS
1484         depends on HAVE_SMP
1485         depends on MMU
1486         select USE_GENERIC_SMP_HELPERS
1487         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1488         help
1489           This enables support for systems with more than one CPU. If you have
1490           a system with only one CPU, like most personal computers, say N. If
1491           you have a system with more than one CPU, say Y.
1492
1493           If you say N here, the kernel will run on single and multiprocessor
1494           machines, but will use only one CPU of a multiprocessor machine. If
1495           you say Y here, the kernel will run on many, but not all, single
1496           processor machines. On a single processor machine, the kernel will
1497           run faster if you say N here.
1498
1499           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1500           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1501           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1502
1503           If you don't know what to do here, say N.
1504
1505 config SMP_ON_UP
1506         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1507         depends on EXPERIMENTAL
1508         depends on SMP && !XIP_KERNEL
1509         default y
1510         help
1511           SMP kernels contain instructions which fail on non-SMP processors.
1512           Enabling this option allows the kernel to modify itself to make
1513           these instructions safe.  Disabling it allows about 1K of space
1514           savings.
1515
1516           If you don't know what to do here, say Y.
1517
1518 config ARM_CPU_TOPOLOGY
1519         bool "Support cpu topology definition"
1520         depends on SMP && CPU_V7
1521         default y
1522         help
1523           Support ARM cpu topology definition. The MPIDR register defines
1524           affinity between processors which is then used to describe the cpu
1525           topology of an ARM System.
1526
1527 config SCHED_MC
1528         bool "Multi-core scheduler support"
1529         depends on ARM_CPU_TOPOLOGY
1530         help
1531           Multi-core scheduler support improves the CPU scheduler's decision
1532           making when dealing with multi-core CPU chips at a cost of slightly
1533           increased overhead in some places. If unsure say N here.
1534
1535 config SCHED_SMT
1536         bool "SMT scheduler support"
1537         depends on ARM_CPU_TOPOLOGY
1538         help
1539           Improves the CPU scheduler's decision making when dealing with
1540           MultiThreading at a cost of slightly increased overhead in some
1541           places. If unsure say N here.
1542
1543 config HAVE_ARM_SCU
1544         bool
1545         help
1546           This option enables support for the ARM system coherency unit
1547
1548 config HAVE_ARM_TWD
1549         bool
1550         depends on SMP
1551         select TICK_ONESHOT
1552         help
1553           This options enables support for the ARM timer and watchdog unit
1554
1555 choice
1556         prompt "Memory split"
1557         default VMSPLIT_3G
1558         help
1559           Select the desired split between kernel and user memory.
1560
1561           If you are not absolutely sure what you are doing, leave this
1562           option alone!
1563
1564         config VMSPLIT_3G
1565                 bool "3G/1G user/kernel split"
1566         config VMSPLIT_2G
1567                 bool "2G/2G user/kernel split"
1568         config VMSPLIT_1G
1569                 bool "1G/3G user/kernel split"
1570 endchoice
1571
1572 config PAGE_OFFSET
1573         hex
1574         default 0x40000000 if VMSPLIT_1G
1575         default 0x80000000 if VMSPLIT_2G
1576         default 0xC0000000
1577
1578 config NR_CPUS
1579         int "Maximum number of CPUs (2-32)"
1580         range 2 32
1581         depends on SMP
1582         default "4"
1583
1584 config HOTPLUG_CPU
1585         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1586         depends on SMP && HOTPLUG && EXPERIMENTAL
1587         help
1588           Say Y here to experiment with turning CPUs off and on.  CPUs
1589           can be controlled through /sys/devices/system/cpu.
1590
1591 config LOCAL_TIMERS
1592         bool "Use local timer interrupts"
1593         depends on SMP
1594         default y
1595         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1596         help
1597           Enable support for local timers on SMP platforms, rather then the
1598           legacy IPI broadcast method.  Local timers allows the system
1599           accounting to be spread across the timer interval, preventing a
1600           "thundering herd" at every timer tick.
1601
1602 config ARCH_NR_GPIO
1603         int
1604         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1605         default 355 if ARCH_U8500
1606         default 264 if MACH_H4700
1607         default 0
1608         help
1609           Maximum number of GPIOs in the system.
1610
1611           If unsure, leave the default value.
1612
1613 source kernel/Kconfig.preempt
1614
1615 config HZ
1616         int
1617         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1618                 ARCH_S5PV210 || ARCH_EXYNOS4
1619         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1620         default AT91_TIMER_HZ if ARCH_AT91
1621         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1622         default 100
1623
1624 config THUMB2_KERNEL
1625         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1626         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1627         select AEABI
1628         select ARM_ASM_UNIFIED
1629         select ARM_UNWIND
1630         help
1631           By enabling this option, the kernel will be compiled in
1632           Thumb-2 mode. A compiler/assembler that understand the unified
1633           ARM-Thumb syntax is needed.
1634
1635           If unsure, say N.
1636
1637 config THUMB2_AVOID_R_ARM_THM_JUMP11
1638         bool "Work around buggy Thumb-2 short branch relocations in gas"
1639         depends on THUMB2_KERNEL && MODULES
1640         default y
1641         help
1642           Various binutils versions can resolve Thumb-2 branches to
1643           locally-defined, preemptible global symbols as short-range "b.n"
1644           branch instructions.
1645
1646           This is a problem, because there's no guarantee the final
1647           destination of the symbol, or any candidate locations for a
1648           trampoline, are within range of the branch.  For this reason, the
1649           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1650           relocation in modules at all, and it makes little sense to add
1651           support.
1652
1653           The symptom is that the kernel fails with an "unsupported
1654           relocation" error when loading some modules.
1655
1656           Until fixed tools are available, passing
1657           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1658           code which hits this problem, at the cost of a bit of extra runtime
1659           stack usage in some cases.
1660
1661           The problem is described in more detail at:
1662               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1663
1664           Only Thumb-2 kernels are affected.
1665
1666           Unless you are sure your tools don't have this problem, say Y.
1667
1668 config ARM_ASM_UNIFIED
1669         bool
1670
1671 config AEABI
1672         bool "Use the ARM EABI to compile the kernel"
1673         help
1674           This option allows for the kernel to be compiled using the latest
1675           ARM ABI (aka EABI).  This is only useful if you are using a user
1676           space environment that is also compiled with EABI.
1677
1678           Since there are major incompatibilities between the legacy ABI and
1679           EABI, especially with regard to structure member alignment, this
1680           option also changes the kernel syscall calling convention to
1681           disambiguate both ABIs and allow for backward compatibility support
1682           (selected with CONFIG_OABI_COMPAT).
1683
1684           To use this you need GCC version 4.0.0 or later.
1685
1686 config OABI_COMPAT
1687         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1688         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1689         default y
1690         help
1691           This option preserves the old syscall interface along with the
1692           new (ARM EABI) one. It also provides a compatibility layer to
1693           intercept syscalls that have structure arguments which layout
1694           in memory differs between the legacy ABI and the new ARM EABI
1695           (only for non "thumb" binaries). This option adds a tiny
1696           overhead to all syscalls and produces a slightly larger kernel.
1697           If you know you'll be using only pure EABI user space then you
1698           can say N here. If this option is not selected and you attempt
1699           to execute a legacy ABI binary then the result will be
1700           UNPREDICTABLE (in fact it can be predicted that it won't work
1701           at all). If in doubt say Y.
1702
1703 config ARCH_HAS_HOLES_MEMORYMODEL
1704         bool
1705
1706 config ARCH_SPARSEMEM_ENABLE
1707         bool
1708
1709 config ARCH_SPARSEMEM_DEFAULT
1710         def_bool ARCH_SPARSEMEM_ENABLE
1711
1712 config ARCH_SELECT_MEMORY_MODEL
1713         def_bool ARCH_SPARSEMEM_ENABLE
1714
1715 config HAVE_ARCH_PFN_VALID
1716         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1717
1718 config HIGHMEM
1719         bool "High Memory Support"
1720         depends on MMU
1721         help
1722           The address space of ARM processors is only 4 Gigabytes large
1723           and it has to accommodate user address space, kernel address
1724           space as well as some memory mapped IO. That means that, if you
1725           have a large amount of physical memory and/or IO, not all of the
1726           memory can be "permanently mapped" by the kernel. The physical
1727           memory that is not permanently mapped is called "high memory".
1728
1729           Depending on the selected kernel/user memory split, minimum
1730           vmalloc space and actual amount of RAM, you may not need this
1731           option which should result in a slightly faster kernel.
1732
1733           If unsure, say n.
1734
1735 config HIGHPTE
1736         bool "Allocate 2nd-level pagetables from highmem"
1737         depends on HIGHMEM
1738
1739 config HW_PERF_EVENTS
1740         bool "Enable hardware performance counter support for perf events"
1741         depends on PERF_EVENTS && CPU_HAS_PMU
1742         default y
1743         help
1744           Enable hardware performance counter support for perf events. If
1745           disabled, perf events will use software events only.
1746
1747 source "mm/Kconfig"
1748
1749 config FORCE_MAX_ZONEORDER
1750         int "Maximum zone order" if ARCH_SHMOBILE
1751         range 11 64 if ARCH_SHMOBILE
1752         default "9" if SA1111
1753         default "11"
1754         help
1755           The kernel memory allocator divides physically contiguous memory
1756           blocks into "zones", where each zone is a power of two number of
1757           pages.  This option selects the largest power of two that the kernel
1758           keeps in the memory allocator.  If you need to allocate very large
1759           blocks of physically contiguous memory, then you may need to
1760           increase this value.
1761
1762           This config option is actually maximum order plus one. For example,
1763           a value of 11 means that the largest free memory block is 2^10 pages.
1764
1765 config LEDS
1766         bool "Timer and CPU usage LEDs"
1767         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1768                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1769                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1770                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1771                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1772                    ARCH_AT91 || ARCH_DAVINCI || \
1773                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1774         help
1775           If you say Y here, the LEDs on your machine will be used
1776           to provide useful information about your current system status.
1777
1778           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1779           be able to select which LEDs are active using the options below. If
1780           you are compiling a kernel for the EBSA-110 or the LART however, the
1781           red LED will simply flash regularly to indicate that the system is
1782           still functional. It is safe to say Y here if you have a CATS
1783           system, but the driver will do nothing.
1784
1785 config LEDS_TIMER
1786         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1787                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1788                             || MACH_OMAP_PERSEUS2
1789         depends on LEDS
1790         depends on !GENERIC_CLOCKEVENTS
1791         default y if ARCH_EBSA110
1792         help
1793           If you say Y here, one of the system LEDs (the green one on the
1794           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1795           will flash regularly to indicate that the system is still
1796           operational. This is mainly useful to kernel hackers who are
1797           debugging unstable kernels.
1798
1799           The LART uses the same LED for both Timer LED and CPU usage LED
1800           functions. You may choose to use both, but the Timer LED function
1801           will overrule the CPU usage LED.
1802
1803 config LEDS_CPU
1804         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1805                         !ARCH_OMAP) \
1806                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1807                         || MACH_OMAP_PERSEUS2
1808         depends on LEDS
1809         help
1810           If you say Y here, the red LED will be used to give a good real
1811           time indication of CPU usage, by lighting whenever the idle task
1812           is not currently executing.
1813
1814           The LART uses the same LED for both Timer LED and CPU usage LED
1815           functions. You may choose to use both, but the Timer LED function
1816           will overrule the CPU usage LED.
1817
1818 config ALIGNMENT_TRAP
1819         bool
1820         depends on CPU_CP15_MMU
1821         default y if !ARCH_EBSA110
1822         select HAVE_PROC_CPU if PROC_FS
1823         help
1824           ARM processors cannot fetch/store information which is not
1825           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1826           address divisible by 4. On 32-bit ARM processors, these non-aligned
1827           fetch/store instructions will be emulated in software if you say
1828           here, which has a severe performance impact. This is necessary for
1829           correct operation of some network protocols. With an IP-only
1830           configuration it is safe to say N, otherwise say Y.
1831
1832 config UACCESS_WITH_MEMCPY
1833         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1834         depends on MMU && EXPERIMENTAL
1835         default y if CPU_FEROCEON
1836         help
1837           Implement faster copy_to_user and clear_user methods for CPU
1838           cores where a 8-word STM instruction give significantly higher
1839           memory write throughput than a sequence of individual 32bit stores.
1840
1841           A possible side effect is a slight increase in scheduling latency
1842           between threads sharing the same address space if they invoke
1843           such copy operations with large buffers.
1844
1845           However, if the CPU data cache is using a write-allocate mode,
1846           this option is unlikely to provide any performance gain.
1847
1848 config SECCOMP
1849         bool
1850         prompt "Enable seccomp to safely compute untrusted bytecode"
1851         ---help---
1852           This kernel feature is useful for number crunching applications
1853           that may need to compute untrusted bytecode during their
1854           execution. By using pipes or other transports made available to
1855           the process as file descriptors supporting the read/write
1856           syscalls, it's possible to isolate those applications in
1857           their own address space using seccomp. Once seccomp is
1858           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1859           and the task is only allowed to execute a few safe syscalls
1860           defined by each seccomp mode.
1861
1862 config CC_STACKPROTECTOR
1863         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1864         depends on EXPERIMENTAL
1865         help
1866           This option turns on the -fstack-protector GCC feature. This
1867           feature puts, at the beginning of functions, a canary value on
1868           the stack just before the return address, and validates
1869           the value just before actually returning.  Stack based buffer
1870           overflows (that need to overwrite this return address) now also
1871           overwrite the canary, which gets detected and the attack is then
1872           neutralized via a kernel panic.
1873           This feature requires gcc version 4.2 or above.
1874
1875 config DEPRECATED_PARAM_STRUCT
1876         bool "Provide old way to pass kernel parameters"
1877         help
1878           This was deprecated in 2001 and announced to live on for 5 years.
1879           Some old boot loaders still use this way.
1880
1881 endmenu
1882
1883 menu "Boot options"
1884
1885 config USE_OF
1886         bool "Flattened Device Tree support"
1887         select OF
1888         select OF_EARLY_FLATTREE
1889         select IRQ_DOMAIN
1890         help
1891           Include support for flattened device tree machine descriptions.
1892
1893 # Compressed boot loader in ROM.  Yes, we really want to ask about
1894 # TEXT and BSS so we preserve their values in the config files.
1895 config ZBOOT_ROM_TEXT
1896         hex "Compressed ROM boot loader base address"
1897         default "0"
1898         help
1899           The physical address at which the ROM-able zImage is to be
1900           placed in the target.  Platforms which normally make use of
1901           ROM-able zImage formats normally set this to a suitable
1902           value in their defconfig file.
1903
1904           If ZBOOT_ROM is not enabled, this has no effect.
1905
1906 config ZBOOT_ROM_BSS
1907         hex "Compressed ROM boot loader BSS address"
1908         default "0"
1909         help
1910           The base address of an area of read/write memory in the target
1911           for the ROM-able zImage which must be available while the
1912           decompressor is running. It must be large enough to hold the
1913           entire decompressed kernel plus an additional 128 KiB.
1914           Platforms which normally make use of ROM-able zImage formats
1915           normally set this to a suitable value in their defconfig file.
1916
1917           If ZBOOT_ROM is not enabled, this has no effect.
1918
1919 config ZBOOT_ROM
1920         bool "Compressed boot loader in ROM/flash"
1921         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1922         help
1923           Say Y here if you intend to execute your compressed kernel image
1924           (zImage) directly from ROM or flash.  If unsure, say N.
1925
1926 choice
1927         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1928         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1929         default ZBOOT_ROM_NONE
1930         help
1931           Include experimental SD/MMC loading code in the ROM-able zImage.
1932           With this enabled it is possible to write the the ROM-able zImage
1933           kernel image to an MMC or SD card and boot the kernel straight
1934           from the reset vector. At reset the processor Mask ROM will load
1935           the first part of the the ROM-able zImage which in turn loads the
1936           rest the kernel image to RAM.
1937
1938 config ZBOOT_ROM_NONE
1939         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1940         help
1941           Do not load image from SD or MMC
1942
1943 config ZBOOT_ROM_MMCIF
1944         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1945         help
1946           Load image from MMCIF hardware block.
1947
1948 config ZBOOT_ROM_SH_MOBILE_SDHI
1949         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1950         help
1951           Load image from SDHI hardware block
1952
1953 endchoice
1954
1955 config ARM_APPENDED_DTB
1956         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1957         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1958         help
1959           With this option, the boot code will look for a device tree binary
1960           (DTB) appended to zImage
1961           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1962
1963           This is meant as a backward compatibility convenience for those
1964           systems with a bootloader that can't be upgraded to accommodate
1965           the documented boot protocol using a device tree.
1966
1967           Beware that there is very little in terms of protection against
1968           this option being confused by leftover garbage in memory that might
1969           look like a DTB header after a reboot if no actual DTB is appended
1970           to zImage.  Do not leave this option active in a production kernel
1971           if you don't intend to always append a DTB.  Proper passing of the
1972           location into r2 of a bootloader provided DTB is always preferable
1973           to this option.
1974
1975 config ARM_ATAG_DTB_COMPAT
1976         bool "Supplement the appended DTB with traditional ATAG information"
1977         depends on ARM_APPENDED_DTB
1978         help
1979           Some old bootloaders can't be updated to a DTB capable one, yet
1980           they provide ATAGs with memory configuration, the ramdisk address,
1981           the kernel cmdline string, etc.  Such information is dynamically
1982           provided by the bootloader and can't always be stored in a static
1983           DTB.  To allow a device tree enabled kernel to be used with such
1984           bootloaders, this option allows zImage to extract the information
1985           from the ATAG list and store it at run time into the appended DTB.
1986
1987 config CMDLINE
1988         string "Default kernel command string"
1989         default ""
1990         help
1991           On some architectures (EBSA110 and CATS), there is currently no way
1992           for the boot loader to pass arguments to the kernel. For these
1993           architectures, you should supply some command-line options at build
1994           time by entering them here. As a minimum, you should specify the
1995           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1996
1997 choice
1998         prompt "Kernel command line type" if CMDLINE != ""
1999         default CMDLINE_FROM_BOOTLOADER
2000
2001 config CMDLINE_FROM_BOOTLOADER
2002         bool "Use bootloader kernel arguments if available"
2003         help
2004           Uses the command-line options passed by the boot loader. If
2005           the boot loader doesn't provide any, the default kernel command
2006           string provided in CMDLINE will be used.
2007
2008 config CMDLINE_EXTEND
2009         bool "Extend bootloader kernel arguments"
2010         help
2011           The command-line arguments provided by the boot loader will be
2012           appended to the default kernel command string.
2013
2014 config CMDLINE_FORCE
2015         bool "Always use the default kernel command string"
2016         help
2017           Always use the default kernel command string, even if the boot
2018           loader passes other arguments to the kernel.
2019           This is useful if you cannot or don't want to change the
2020           command-line options your boot loader passes to the kernel.
2021 endchoice
2022
2023 config XIP_KERNEL
2024         bool "Kernel Execute-In-Place from ROM"
2025         depends on !ZBOOT_ROM && !ARM_LPAE
2026         help
2027           Execute-In-Place allows the kernel to run from non-volatile storage
2028           directly addressable by the CPU, such as NOR flash. This saves RAM
2029           space since the text section of the kernel is not loaded from flash
2030           to RAM.  Read-write sections, such as the data section and stack,
2031           are still copied to RAM.  The XIP kernel is not compressed since
2032           it has to run directly from flash, so it will take more space to
2033           store it.  The flash address used to link the kernel object files,
2034           and for storing it, is configuration dependent. Therefore, if you
2035           say Y here, you must know the proper physical address where to
2036           store the kernel image depending on your own flash memory usage.
2037
2038           Also note that the make target becomes "make xipImage" rather than
2039           "make zImage" or "make Image".  The final kernel binary to put in
2040           ROM memory will be arch/arm/boot/xipImage.
2041
2042           If unsure, say N.
2043
2044 config XIP_PHYS_ADDR
2045         hex "XIP Kernel Physical Location"
2046         depends on XIP_KERNEL
2047         default "0x00080000"
2048         help
2049           This is the physical address in your flash memory the kernel will
2050           be linked for and stored to.  This address is dependent on your
2051           own flash usage.
2052
2053 config KEXEC
2054         bool "Kexec system call (EXPERIMENTAL)"
2055         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2056         help
2057           kexec is a system call that implements the ability to shutdown your
2058           current kernel, and to start another kernel.  It is like a reboot
2059           but it is independent of the system firmware.   And like a reboot
2060           you can start any kernel with it, not just Linux.
2061
2062           It is an ongoing process to be certain the hardware in a machine
2063           is properly shutdown, so do not be surprised if this code does not
2064           initially work for you.  It may help to enable device hotplugging
2065           support.
2066
2067 config ATAGS_PROC
2068         bool "Export atags in procfs"
2069         depends on KEXEC
2070         default y
2071         help
2072           Should the atags used to boot the kernel be exported in an "atags"
2073           file in procfs. Useful with kexec.
2074
2075 config CRASH_DUMP
2076         bool "Build kdump crash kernel (EXPERIMENTAL)"
2077         depends on EXPERIMENTAL
2078         help
2079           Generate crash dump after being started by kexec. This should
2080           be normally only set in special crash dump kernels which are
2081           loaded in the main kernel with kexec-tools into a specially
2082           reserved region and then later executed after a crash by
2083           kdump/kexec. The crash dump kernel must be compiled to a
2084           memory address not used by the main kernel
2085
2086           For more details see Documentation/kdump/kdump.txt
2087
2088 config AUTO_ZRELADDR
2089         bool "Auto calculation of the decompressed kernel image address"
2090         depends on !ZBOOT_ROM && !ARCH_U300
2091         help
2092           ZRELADDR is the physical address where the decompressed kernel
2093           image will be placed. If AUTO_ZRELADDR is selected, the address
2094           will be determined at run-time by masking the current IP with
2095           0xf8000000. This assumes the zImage being placed in the first 128MB
2096           from start of memory.
2097
2098 endmenu
2099
2100 menu "CPU Power Management"
2101
2102 if ARCH_HAS_CPUFREQ
2103
2104 source "drivers/cpufreq/Kconfig"
2105
2106 config CPU_FREQ_IMX
2107         tristate "CPUfreq driver for i.MX CPUs"
2108         depends on ARCH_MXC && CPU_FREQ
2109         help
2110           This enables the CPUfreq driver for i.MX CPUs.
2111
2112 config CPU_FREQ_SA1100
2113         bool
2114
2115 config CPU_FREQ_SA1110
2116         bool
2117
2118 config CPU_FREQ_INTEGRATOR
2119         tristate "CPUfreq driver for ARM Integrator CPUs"
2120         depends on ARCH_INTEGRATOR && CPU_FREQ
2121         default y
2122         help
2123           This enables the CPUfreq driver for ARM Integrator CPUs.
2124
2125           For details, take a look at <file:Documentation/cpu-freq>.
2126
2127           If in doubt, say Y.
2128
2129 config CPU_FREQ_PXA
2130         bool
2131         depends on CPU_FREQ && ARCH_PXA && PXA25x
2132         default y
2133         select CPU_FREQ_TABLE
2134         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2135
2136 config CPU_FREQ_S3C
2137         bool
2138         help
2139           Internal configuration node for common cpufreq on Samsung SoC
2140
2141 config CPU_FREQ_S3C24XX
2142         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2143         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2144         select CPU_FREQ_S3C
2145         help
2146           This enables the CPUfreq driver for the Samsung S3C24XX family
2147           of CPUs.
2148
2149           For details, take a look at <file:Documentation/cpu-freq>.
2150
2151           If in doubt, say N.
2152
2153 config CPU_FREQ_S3C24XX_PLL
2154         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2155         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2156         help
2157           Compile in support for changing the PLL frequency from the
2158           S3C24XX series CPUfreq driver. The PLL takes time to settle
2159           after a frequency change, so by default it is not enabled.
2160
2161           This also means that the PLL tables for the selected CPU(s) will
2162           be built which may increase the size of the kernel image.
2163
2164 config CPU_FREQ_S3C24XX_DEBUG
2165         bool "Debug CPUfreq Samsung driver core"
2166         depends on CPU_FREQ_S3C24XX
2167         help
2168           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2169
2170 config CPU_FREQ_S3C24XX_IODEBUG
2171         bool "Debug CPUfreq Samsung driver IO timing"
2172         depends on CPU_FREQ_S3C24XX
2173         help
2174           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2175
2176 config CPU_FREQ_S3C24XX_DEBUGFS
2177         bool "Export debugfs for CPUFreq"
2178         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2179         help
2180           Export status information via debugfs.
2181
2182 endif
2183
2184 source "drivers/cpuidle/Kconfig"
2185
2186 endmenu
2187
2188 menu "Floating point emulation"
2189
2190 comment "At least one emulation must be selected"
2191
2192 config FPE_NWFPE
2193         bool "NWFPE math emulation"
2194         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2195         ---help---
2196           Say Y to include the NWFPE floating point emulator in the kernel.
2197           This is necessary to run most binaries. Linux does not currently
2198           support floating point hardware so you need to say Y here even if
2199           your machine has an FPA or floating point co-processor podule.
2200
2201           You may say N here if you are going to load the Acorn FPEmulator
2202           early in the bootup.
2203
2204 config FPE_NWFPE_XP
2205         bool "Support extended precision"
2206         depends on FPE_NWFPE
2207         help
2208           Say Y to include 80-bit support in the kernel floating-point
2209           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2210           Note that gcc does not generate 80-bit operations by default,
2211           so in most cases this option only enlarges the size of the
2212           floating point emulator without any good reason.
2213
2214           You almost surely want to say N here.
2215
2216 config FPE_FASTFPE
2217         bool "FastFPE math emulation (EXPERIMENTAL)"
2218         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2219         ---help---
2220           Say Y here to include the FAST floating point emulator in the kernel.
2221           This is an experimental much faster emulator which now also has full
2222           precision for the mantissa.  It does not support any exceptions.
2223           It is very simple, and approximately 3-6 times faster than NWFPE.
2224
2225           It should be sufficient for most programs.  It may be not suitable
2226           for scientific calculations, but you have to check this for yourself.
2227           If you do not feel you need a faster FP emulation you should better
2228           choose NWFPE.
2229
2230 config VFP
2231         bool "VFP-format floating point maths"
2232         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2233         help
2234           Say Y to include VFP support code in the kernel. This is needed
2235           if your hardware includes a VFP unit.
2236
2237           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2238           release notes and additional status information.
2239
2240           Say N if your target does not have VFP hardware.
2241
2242 config VFPv3
2243         bool
2244         depends on VFP
2245         default y if CPU_V7
2246
2247 config NEON
2248         bool "Advanced SIMD (NEON) Extension support"
2249         depends on VFPv3 && CPU_V7
2250         help
2251           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2252           Extension.
2253
2254 endmenu
2255
2256 menu "Userspace binary formats"
2257
2258 source "fs/Kconfig.binfmt"
2259
2260 config ARTHUR
2261         tristate "RISC OS personality"
2262         depends on !AEABI
2263         help
2264           Say Y here to include the kernel code necessary if you want to run
2265           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2266           experimental; if this sounds frightening, say N and sleep in peace.
2267           You can also say M here to compile this support as a module (which
2268           will be called arthur).
2269
2270 endmenu
2271
2272 menu "Power management options"
2273
2274 source "kernel/power/Kconfig"
2275
2276 config ARCH_SUSPEND_POSSIBLE
2277         depends on !ARCH_S5PC100
2278         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2279                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2280         def_bool y
2281
2282 config ARM_CPU_SUSPEND
2283         def_bool PM_SLEEP
2284
2285 endmenu
2286
2287 source "net/Kconfig"
2288
2289 source "drivers/Kconfig"
2290
2291 source "fs/Kconfig"
2292
2293 source "arch/arm/Kconfig.debug"
2294
2295 source "security/Kconfig"
2296
2297 source "crypto/Kconfig"
2298
2299 source "lib/Kconfig"