arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_WANT_IPC_PARSE_VERSION
   8         select CPU_PM if (SUSPEND || CPU_IDLE)
   9         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  12         select GENERIC_IRQ_PROBE
  13         select GENERIC_IRQ_SHOW
  14         select GENERIC_KERNEL_THREAD
  15         select GENERIC_KERNEL_EXECVE
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_STRNCPY_FROM_USER
  19         select GENERIC_STRNLEN_USER
  20         select HARDIRQS_SW_RESEND
  21         select HAVE_AOUT
  22         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  23         select HAVE_ARCH_KGDB
  24         select HAVE_ARCH_TRACEHOOK
  25         select HAVE_BPF_JIT
  26         select HAVE_C_RECORDMCOUNT
  27         select HAVE_DEBUG_KMEMLEAK
  28         select HAVE_DMA_API_DEBUG
  29         select HAVE_DMA_ATTRS
  30         select HAVE_DMA_CONTIGUOUS if MMU
  31         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  32         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  33         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  34         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  35         select HAVE_GENERIC_DMA_COHERENT
  36         select HAVE_GENERIC_HARDIRQS
  37         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  38         select HAVE_IDE if PCI || ISA || PCMCIA
  39         select HAVE_IRQ_WORK
  40         select HAVE_KERNEL_GZIP
  41         select HAVE_KERNEL_LZMA
  42         select HAVE_KERNEL_LZO
  43         select HAVE_KERNEL_XZ
  44         select HAVE_KPROBES if !XIP_KERNEL
  45         select HAVE_KRETPROBES if (HAVE_KPROBES)
  46         select HAVE_MEMBLOCK
  47         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  48         select HAVE_PERF_EVENTS
  49         select HAVE_REGS_AND_STACK_ACCESS_API
  50         select HAVE_SYSCALL_TRACEPOINTS
  51         select HAVE_UID16
  52         select KTIME_SCALAR
  53         select PERF_USE_VMALLOC
  54         select RTC_LIB
  55         select SYS_SUPPORTS_APM_EMULATION
  56         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  57         select MODULES_USE_ELF_REL
  58         help
  59           The ARM series is a line of low-power-consumption RISC chip designs
  60           licensed by ARM Ltd and targeted at embedded applications and
  61           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  62           manufactured, but legacy ARM-based PC hardware remains popular in
  63           Europe.  There is an ARM Linux project with a web page at
  64           <http://www.arm.linux.org.uk/>.
  65
  66 config ARM_HAS_SG_CHAIN
  67         bool
  68
  69 config NEED_SG_DMA_LENGTH
  70         bool
  71
  72 config ARM_DMA_USE_IOMMU
  73         bool
  74         select ARM_HAS_SG_CHAIN
  75         select NEED_SG_DMA_LENGTH
  76
  77 config HAVE_PWM
  78         bool
  79
  80 config MIGHT_HAVE_PCI
  81         bool
  82
  83 config SYS_SUPPORTS_APM_EMULATION
  84         bool
  85
  86 config GENERIC_GPIO
  87         bool
  88
  89 config HAVE_TCM
  90         bool
  91         select GENERIC_ALLOCATOR
  92
  93 config HAVE_PROC_CPU
  94         bool
  95
  96 config NO_IOPORT
  97         bool
  98
  99 config EISA
 100         bool
 101         ---help---
 102           The Extended Industry Standard Architecture (EISA) bus was
 103           developed as an open alternative to the IBM MicroChannel bus.
 104
 105           The EISA bus provided some of the features of the IBM MicroChannel
 106           bus while maintaining backward compatibility with cards made for
 107           the older ISA bus.  The EISA bus saw limited use between 1988 and
 108           1995 when it was made obsolete by the PCI bus.
 109
 110           Say Y here if you are building a kernel for an EISA-based machine.
 111
 112           Otherwise, say N.
 113
 114 config SBUS
 115         bool
 116
 117 config STACKTRACE_SUPPORT
 118         bool
 119         default y
 120
 121 config HAVE_LATENCYTOP_SUPPORT
 122         bool
 123         depends on !SMP
 124         default y
 125
 126 config LOCKDEP_SUPPORT
 127         bool
 128         default y
 129
 130 config TRACE_IRQFLAGS_SUPPORT
 131         bool
 132         default y
 133
 134 config RWSEM_GENERIC_SPINLOCK
 135         bool
 136         default y
 137
 138 config RWSEM_XCHGADD_ALGORITHM
 139         bool
 140
 141 config ARCH_HAS_ILOG2_U32
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U64
 145         bool
 146
 147 config ARCH_HAS_CPUFREQ
 148         bool
 149         help
 150           Internal node to signify that the ARCH has CPUFREQ support
 151           and that the relevant menu configurations are displayed for
 152           it.
 153
 154 config GENERIC_HWEIGHT
 155         bool
 156         default y
 157
 158 config GENERIC_CALIBRATE_DELAY
 159         bool
 160         default y
 161
 162 config ARCH_MAY_HAVE_PC_FDC
 163         bool
 164
 165 config ZONE_DMA
 166         bool
 167
 168 config NEED_DMA_MAP_STATE
 169        def_bool y
 170
 171 config ARCH_HAS_DMA_SET_COHERENT_MASK
 172         bool
 173
 174 config GENERIC_ISA_DMA
 175         bool
 176
 177 config FIQ
 178         bool
 179
 180 config NEED_RET_TO_USER
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 196         default y
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary.
 206
 207           Only disable this option if you know that you do not require
 208           this feature (eg, building a kernel for a single machine) and
 209           you need to shrink the kernel to the minimal size.
 210
 211 config NEED_MACH_GPIO_H
 212         bool
 213         help
 214           Select this when mach/gpio.h is required to provide special
 215           definitions for this platform. The need for mach/gpio.h should
 216           be avoided when possible.
 217
 218 config NEED_MACH_IO_H
 219         bool
 220         help
 221           Select this when mach/io.h is required to provide special
 222           definitions for this platform.  The need for mach/io.h should
 223           be avoided when possible.
 224
 225 config NEED_MACH_MEMORY_H
 226         bool
 227         help
 228           Select this when mach/memory.h is required to provide special
 229           definitions for this platform.  The need for mach/memory.h should
 230           be avoided when possible.
 231
 232 config PHYS_OFFSET
 233         hex "Physical address of main memory" if MMU
 234         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 235         default DRAM_BASE if !MMU
 236         help
 237           Please provide the physical address corresponding to the
 238           location of main memory in your system.
 239
 240 config GENERIC_BUG
 241         def_bool y
 242         depends on BUG
 243
 244 source "init/Kconfig"
 245
 246 source "kernel/Kconfig.freezer"
 247
 248 menu "System Type"
 249
 250 config MMU
 251         bool "MMU-based Paged Memory Management Support"
 252         default y
 253         help
 254           Select if you want MMU-based virtualised addressing space
 255           support by paged memory management. If unsure, say 'Y'.
 256
 257 #
 258 # The "ARM system type" choice list is ordered alphabetically by option
 259 # text.  Please add new entries in the option alphabetic order.
 260 #
 261 choice
 262         prompt "ARM system type"
 263         default ARCH_MULTIPLATFORM
 264
 265 config ARCH_MULTIPLATFORM
 266         bool "Allow multiple platforms to be selected"
 267         depends on MMU
 268         select ARM_PATCH_PHYS_VIRT
 269         select AUTO_ZRELADDR
 270         select COMMON_CLK
 271         select MULTI_IRQ_HANDLER
 272         select SPARSE_IRQ
 273         select USE_OF
 274
 275 config ARCH_INTEGRATOR
 276         bool "ARM Ltd. Integrator family"
 277         select ARCH_HAS_CPUFREQ
 278         select ARM_AMBA
 279         select COMMON_CLK
 280         select COMMON_CLK_VERSATILE
 281         select GENERIC_CLOCKEVENTS
 282         select HAVE_TCM
 283         select ICST
 284         select MULTI_IRQ_HANDLER
 285         select NEED_MACH_MEMORY_H
 286         select PLAT_VERSATILE
 287         select PLAT_VERSATILE_FPGA_IRQ
 288         select SPARSE_IRQ
 289         help
 290           Support for ARM's Integrator platform.
 291
 292 config ARCH_REALVIEW
 293         bool "ARM Ltd. RealView family"
 294         select ARCH_WANT_OPTIONAL_GPIOLIB
 295         select ARM_AMBA
 296         select ARM_TIMER_SP804
 297         select COMMON_CLK
 298         select COMMON_CLK_VERSATILE
 299         select GENERIC_CLOCKEVENTS
 300         select GPIO_PL061 if GPIOLIB
 301         select ICST
 302         select NEED_MACH_MEMORY_H
 303         select PLAT_VERSATILE
 304         select PLAT_VERSATILE_CLCD
 305         help
 306           This enables support for ARM Ltd RealView boards.
 307
 308 config ARCH_VERSATILE
 309         bool "ARM Ltd. Versatile family"
 310         select ARCH_WANT_OPTIONAL_GPIOLIB
 311         select ARM_AMBA
 312         select ARM_TIMER_SP804
 313         select ARM_VIC
 314         select CLKDEV_LOOKUP
 315         select GENERIC_CLOCKEVENTS
 316         select HAVE_MACH_CLKDEV
 317         select ICST
 318         select PLAT_VERSATILE
 319         select PLAT_VERSATILE_CLCD
 320         select PLAT_VERSATILE_CLOCK
 321         select PLAT_VERSATILE_FPGA_IRQ
 322         help
 323           This enables support for ARM Ltd Versatile board.
 324
 325 config ARCH_AT91
 326         bool "Atmel AT91"
 327         select ARCH_REQUIRE_GPIOLIB
 328         select CLKDEV_LOOKUP
 329         select HAVE_CLK
 330         select IRQ_DOMAIN
 331         select NEED_MACH_GPIO_H
 332         select NEED_MACH_IO_H if PCCARD
 333         select PINCTRL
 334         select PINCTRL_AT91 if USE_OF
 335         help
 336           This enables support for systems based on Atmel
 337           AT91RM9200 and AT91SAM9* processors.
 338
 339 config ARCH_BCM2835
 340         bool "Broadcom BCM2835 family"
 341         select ARCH_WANT_OPTIONAL_GPIOLIB
 342         select ARM_AMBA
 343         select ARM_ERRATA_411920
 344         select ARM_TIMER_SP804
 345         select CLKDEV_LOOKUP
 346         select COMMON_CLK
 347         select CPU_V6
 348         select GENERIC_CLOCKEVENTS
 349         select MULTI_IRQ_HANDLER
 350         select SPARSE_IRQ
 351         select USE_OF
 352         help
 353           This enables support for the Broadcom BCM2835 SoC. This SoC is
 354           use in the Raspberry Pi, and Roku 2 devices.
 355
 356 config ARCH_CNS3XXX
 357         bool "Cavium Networks CNS3XXX family"
 358         select ARM_GIC
 359         select CPU_V6K
 360         select GENERIC_CLOCKEVENTS
 361         select MIGHT_HAVE_CACHE_L2X0
 362         select MIGHT_HAVE_PCI
 363         select PCI_DOMAINS if PCI
 364         help
 365           Support for Cavium Networks CNS3XXX platform.
 366
 367 config ARCH_CLPS711X
 368         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 369         select ARCH_REQUIRE_GPIOLIB
 370         select ARCH_USES_GETTIMEOFFSET
 371         select CLKDEV_LOOKUP
 372         select COMMON_CLK
 373         select CPU_ARM720T
 374         select NEED_MACH_MEMORY_H
 375         help
 376           Support for Cirrus Logic 711x/721x/731x based boards.
 377
 378 config ARCH_GEMINI
 379         bool "Cortina Systems Gemini"
 380         select ARCH_REQUIRE_GPIOLIB
 381         select ARCH_USES_GETTIMEOFFSET
 382         select CPU_FA526
 383         help
 384           Support for the Cortina Systems Gemini family SoCs
 385
 386 config ARCH_SIRF
 387         bool "CSR SiRF"
 388         select ARCH_REQUIRE_GPIOLIB
 389         select COMMON_CLK
 390         select GENERIC_CLOCKEVENTS
 391         select GENERIC_IRQ_CHIP
 392         select MIGHT_HAVE_CACHE_L2X0
 393         select NO_IOPORT
 394         select PINCTRL
 395         select PINCTRL_SIRF
 396         select USE_OF
 397         help
 398           Support for CSR SiRFprimaII/Marco/Polo platforms
 399
 400 config ARCH_EBSA110
 401         bool "EBSA-110"
 402         select ARCH_USES_GETTIMEOFFSET
 403         select CPU_SA110
 404         select ISA
 405         select NEED_MACH_IO_H
 406         select NEED_MACH_MEMORY_H
 407         select NO_IOPORT
 408         help
 409           This is an evaluation board for the StrongARM processor available
 410           from Digital. It has limited hardware on-board, including an
 411           Ethernet interface, two PCMCIA sockets, two serial ports and a
 412           parallel port.
 413
 414 config ARCH_EP93XX
 415         bool "EP93xx-based"
 416         select ARCH_HAS_HOLES_MEMORYMODEL
 417         select ARCH_REQUIRE_GPIOLIB
 418         select ARCH_USES_GETTIMEOFFSET
 419         select ARM_AMBA
 420         select ARM_VIC
 421         select CLKDEV_LOOKUP
 422         select CPU_ARM920T
 423         select NEED_MACH_MEMORY_H
 424         help
 425           This enables support for the Cirrus EP93xx series of CPUs.
 426
 427 config ARCH_FOOTBRIDGE
 428         bool "FootBridge"
 429         select CPU_SA110
 430         select FOOTBRIDGE
 431         select GENERIC_CLOCKEVENTS
 432         select HAVE_IDE
 433         select NEED_MACH_IO_H if !MMU
 434         select NEED_MACH_MEMORY_H
 435         help
 436           Support for systems based on the DC21285 companion chip
 437           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 438
 439 config ARCH_MXC
 440         bool "Freescale MXC/iMX-based"
 441         select ARCH_REQUIRE_GPIOLIB
 442         select CLKDEV_LOOKUP
 443         select CLKSRC_MMIO
 444         select GENERIC_CLOCKEVENTS
 445         select GENERIC_IRQ_CHIP
 446         select MULTI_IRQ_HANDLER
 447         select SPARSE_IRQ
 448         select USE_OF
 449         help
 450           Support for Freescale MXC/iMX-based family of processors
 451
 452 config ARCH_MXS
 453         bool "Freescale MXS-based"
 454         select ARCH_REQUIRE_GPIOLIB
 455         select CLKDEV_LOOKUP
 456         select CLKSRC_MMIO
 457         select COMMON_CLK
 458         select GENERIC_CLOCKEVENTS
 459         select HAVE_CLK_PREPARE
 460         select MULTI_IRQ_HANDLER
 461         select PINCTRL
 462         select SPARSE_IRQ
 463         select USE_OF
 464         help
 465           Support for Freescale MXS-based family of processors
 466
 467 config ARCH_NETX
 468         bool "Hilscher NetX based"
 469         select ARM_VIC
 470         select CLKSRC_MMIO
 471         select CPU_ARM926T
 472         select GENERIC_CLOCKEVENTS
 473         help
 474           This enables support for systems based on the Hilscher NetX Soc
 475
 476 config ARCH_H720X
 477         bool "Hynix HMS720x-based"
 478         select ARCH_USES_GETTIMEOFFSET
 479         select CPU_ARM720T
 480         select ISA_DMA_API
 481         help
 482           This enables support for systems based on the Hynix HMS720x
 483
 484 config ARCH_IOP13XX
 485         bool "IOP13xx-based"
 486         depends on MMU
 487         select ARCH_SUPPORTS_MSI
 488         select CPU_XSC3
 489         select NEED_MACH_MEMORY_H
 490         select NEED_RET_TO_USER
 491         select PCI
 492         select PLAT_IOP
 493         select VMSPLIT_1G
 494         help
 495           Support for Intel's IOP13XX (XScale) family of processors.
 496
 497 config ARCH_IOP32X
 498         bool "IOP32x-based"
 499         depends on MMU
 500         select ARCH_REQUIRE_GPIOLIB
 501         select CPU_XSCALE
 502         select NEED_MACH_GPIO_H
 503         select NEED_RET_TO_USER
 504         select PCI
 505         select PLAT_IOP
 506         help
 507           Support for Intel's 80219 and IOP32X (XScale) family of
 508           processors.
 509
 510 config ARCH_IOP33X
 511         bool "IOP33x-based"
 512         depends on MMU
 513         select ARCH_REQUIRE_GPIOLIB
 514         select CPU_XSCALE
 515         select NEED_MACH_GPIO_H
 516         select NEED_RET_TO_USER
 517         select PCI
 518         select PLAT_IOP
 519         help
 520           Support for Intel's IOP33X (XScale) family of processors.
 521
 522 config ARCH_IXP4XX
 523         bool "IXP4xx-based"
 524         depends on MMU
 525         select ARCH_HAS_DMA_SET_COHERENT_MASK
 526         select ARCH_REQUIRE_GPIOLIB
 527         select CLKSRC_MMIO
 528         select CPU_XSCALE
 529         select DMABOUNCE if PCI
 530         select GENERIC_CLOCKEVENTS
 531         select MIGHT_HAVE_PCI
 532         select NEED_MACH_IO_H
 533         help
 534           Support for Intel's IXP4XX (XScale) family of processors.
 535
 536 config ARCH_DOVE
 537         bool "Marvell Dove"
 538         select ARCH_REQUIRE_GPIOLIB
 539         select CPU_V7
 540         select GENERIC_CLOCKEVENTS
 541         select MIGHT_HAVE_PCI
 542         select PLAT_ORION_LEGACY
 543         select USB_ARCH_HAS_EHCI
 544         help
 545           Support for the Marvell Dove SoC 88AP510
 546
 547 config ARCH_KIRKWOOD
 548         bool "Marvell Kirkwood"
 549         select ARCH_REQUIRE_GPIOLIB
 550         select CPU_FEROCEON
 551         select GENERIC_CLOCKEVENTS
 552         select PCI
 553         select PCI_QUIRKS
 554         select PLAT_ORION_LEGACY
 555         help
 556           Support for the following Marvell Kirkwood series SoCs:
 557           88F6180, 88F6192 and 88F6281.
 558
 559 config ARCH_MV78XX0
 560         bool "Marvell MV78xx0"
 561         select ARCH_REQUIRE_GPIOLIB
 562         select CPU_FEROCEON
 563         select GENERIC_CLOCKEVENTS
 564         select PCI
 565         select PLAT_ORION_LEGACY
 566         help
 567           Support for the following Marvell MV78xx0 series SoCs:
 568           MV781x0, MV782x0.
 569
 570 config ARCH_ORION5X
 571         bool "Marvell Orion"
 572         depends on MMU
 573         select ARCH_REQUIRE_GPIOLIB
 574         select CPU_FEROCEON
 575         select GENERIC_CLOCKEVENTS
 576         select PCI
 577         select PLAT_ORION_LEGACY
 578         help
 579           Support for the following Marvell Orion 5x series SoCs:
 580           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 581           Orion-2 (5281), Orion-1-90 (6183).
 582
 583 config ARCH_MMP
 584         bool "Marvell PXA168/910/MMP2"
 585         depends on MMU
 586         select ARCH_REQUIRE_GPIOLIB
 587         select CLKDEV_LOOKUP
 588         select GENERIC_ALLOCATOR
 589         select GENERIC_CLOCKEVENTS
 590         select GPIO_PXA
 591         select IRQ_DOMAIN
 592         select NEED_MACH_GPIO_H
 593         select PINCTRL
 594         select PLAT_PXA
 595         select SPARSE_IRQ
 596         help
 597           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 598
 599 config ARCH_KS8695
 600         bool "Micrel/Kendin KS8695"
 601         select ARCH_REQUIRE_GPIOLIB
 602         select CLKSRC_MMIO
 603         select CPU_ARM922T
 604         select GENERIC_CLOCKEVENTS
 605         select NEED_MACH_MEMORY_H
 606         help
 607           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 608           System-on-Chip devices.
 609
 610 config ARCH_W90X900
 611         bool "Nuvoton W90X900 CPU"
 612         select ARCH_REQUIRE_GPIOLIB
 613         select CLKDEV_LOOKUP
 614         select CLKSRC_MMIO
 615         select CPU_ARM926T
 616         select GENERIC_CLOCKEVENTS
 617         help
 618           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 619           At present, the w90x900 has been renamed nuc900, regarding
 620           the ARM series product line, you can login the following
 621           link address to know more.
 622
 623           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 624                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 625
 626 config ARCH_LPC32XX
 627         bool "NXP LPC32XX"
 628         select ARCH_REQUIRE_GPIOLIB
 629         select ARM_AMBA
 630         select CLKDEV_LOOKUP
 631         select CLKSRC_MMIO
 632         select CPU_ARM926T
 633         select GENERIC_CLOCKEVENTS
 634         select HAVE_IDE
 635         select HAVE_PWM
 636         select USB_ARCH_HAS_OHCI
 637         select USE_OF
 638         help
 639           Support for the NXP LPC32XX family of processors
 640
 641 config ARCH_TEGRA
 642         bool "NVIDIA Tegra"
 643         select ARCH_HAS_CPUFREQ
 644         select CLKDEV_LOOKUP
 645         select CLKSRC_MMIO
 646         select COMMON_CLK
 647         select GENERIC_CLOCKEVENTS
 648         select GENERIC_GPIO
 649         select HAVE_CLK
 650         select HAVE_SMP
 651         select MIGHT_HAVE_CACHE_L2X0
 652         select USE_OF
 653         help
 654           This enables support for NVIDIA Tegra based systems (Tegra APX,
 655           Tegra 6xx and Tegra 2 series).
 656
 657 config ARCH_PXA
 658         bool "PXA2xx/PXA3xx-based"
 659         depends on MMU
 660         select ARCH_HAS_CPUFREQ
 661         select ARCH_MTD_XIP
 662         select ARCH_REQUIRE_GPIOLIB
 663         select ARM_CPU_SUSPEND if PM
 664         select AUTO_ZRELADDR
 665         select CLKDEV_LOOKUP
 666         select CLKSRC_MMIO
 667         select GENERIC_CLOCKEVENTS
 668         select GPIO_PXA
 669         select HAVE_IDE
 670         select MULTI_IRQ_HANDLER
 671         select NEED_MACH_GPIO_H
 672         select PLAT_PXA
 673         select SPARSE_IRQ
 674         help
 675           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 676
 677 config ARCH_MSM
 678         bool "Qualcomm MSM"
 679         select ARCH_REQUIRE_GPIOLIB
 680         select CLKDEV_LOOKUP
 681         select GENERIC_CLOCKEVENTS
 682         select HAVE_CLK
 683         help
 684           Support for Qualcomm MSM/QSD based systems.  This runs on the
 685           apps processor of the MSM/QSD and depends on a shared memory
 686           interface to the modem processor which runs the baseband
 687           stack and controls some vital subsystems
 688           (clock and power control, etc).
 689
 690 config ARCH_SHMOBILE
 691         bool "Renesas SH-Mobile / R-Mobile"
 692         select CLKDEV_LOOKUP
 693         select GENERIC_CLOCKEVENTS
 694         select HAVE_CLK
 695         select HAVE_MACH_CLKDEV
 696         select HAVE_SMP
 697         select MIGHT_HAVE_CACHE_L2X0
 698         select MULTI_IRQ_HANDLER
 699         select NEED_MACH_MEMORY_H
 700         select NO_IOPORT
 701         select PM_GENERIC_DOMAINS if PM
 702         select SPARSE_IRQ
 703         help
 704           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 705
 706 config ARCH_RPC
 707         bool "RiscPC"
 708         select ARCH_ACORN
 709         select ARCH_MAY_HAVE_PC_FDC
 710         select ARCH_SPARSEMEM_ENABLE
 711         select ARCH_USES_GETTIMEOFFSET
 712         select FIQ
 713         select HAVE_IDE
 714         select HAVE_PATA_PLATFORM
 715         select ISA_DMA_API
 716         select NEED_MACH_IO_H
 717         select NEED_MACH_MEMORY_H
 718         select NO_IOPORT
 719         help
 720           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 721           CD-ROM interface, serial and parallel port, and the floppy drive.
 722
 723 config ARCH_SA1100
 724         bool "SA1100-based"
 725         select ARCH_HAS_CPUFREQ
 726         select ARCH_MTD_XIP
 727         select ARCH_REQUIRE_GPIOLIB
 728         select ARCH_SPARSEMEM_ENABLE
 729         select CLKDEV_LOOKUP
 730         select CLKSRC_MMIO
 731         select CPU_FREQ
 732         select CPU_SA1100
 733         select GENERIC_CLOCKEVENTS
 734         select HAVE_IDE
 735         select ISA
 736         select NEED_MACH_GPIO_H
 737         select NEED_MACH_MEMORY_H
 738         select SPARSE_IRQ
 739         help
 740           Support for StrongARM 11x0 based boards.
 741
 742 config ARCH_S3C24XX
 743         bool "Samsung S3C24XX SoCs"
 744         select ARCH_HAS_CPUFREQ
 745         select ARCH_USES_GETTIMEOFFSET
 746         select CLKDEV_LOOKUP
 747         select GENERIC_GPIO
 748         select HAVE_CLK
 749         select HAVE_S3C2410_I2C if I2C
 750         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 751         select HAVE_S3C_RTC if RTC_CLASS
 752         select NEED_MACH_GPIO_H
 753         select NEED_MACH_IO_H
 754         help
 755           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 756           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 757           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 758           Samsung SMDK2410 development board (and derivatives).
 759
 760 config ARCH_S3C64XX
 761         bool "Samsung S3C64XX"
 762         select ARCH_HAS_CPUFREQ
 763         select ARCH_REQUIRE_GPIOLIB
 764         select ARCH_USES_GETTIMEOFFSET
 765         select ARM_VIC
 766         select CLKDEV_LOOKUP
 767         select CPU_V6
 768         select HAVE_CLK
 769         select HAVE_S3C2410_I2C if I2C
 770         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 771         select HAVE_TCM
 772         select NEED_MACH_GPIO_H
 773         select NO_IOPORT
 774         select PLAT_SAMSUNG
 775         select S3C_DEV_NAND
 776         select S3C_GPIO_TRACK
 777         select SAMSUNG_CLKSRC
 778         select SAMSUNG_GPIOLIB_4BIT
 779         select SAMSUNG_IRQ_VIC_TIMER
 780         select USB_ARCH_HAS_OHCI
 781         help
 782           Samsung S3C64XX series based systems
 783
 784 config ARCH_S5P64X0
 785         bool "Samsung S5P6440 S5P6450"
 786         select CLKDEV_LOOKUP
 787         select CLKSRC_MMIO
 788         select CPU_V6
 789         select GENERIC_CLOCKEVENTS
 790         select GENERIC_GPIO
 791         select HAVE_CLK
 792         select HAVE_S3C2410_I2C if I2C
 793         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 794         select HAVE_S3C_RTC if RTC_CLASS
 795         select NEED_MACH_GPIO_H
 796         help
 797           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 798           SMDK6450.
 799
 800 config ARCH_S5PC100
 801         bool "Samsung S5PC100"
 802         select ARCH_USES_GETTIMEOFFSET
 803         select CLKDEV_LOOKUP
 804         select CPU_V7
 805         select GENERIC_GPIO
 806         select HAVE_CLK
 807         select HAVE_S3C2410_I2C if I2C
 808         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 809         select HAVE_S3C_RTC if RTC_CLASS
 810         select NEED_MACH_GPIO_H
 811         help
 812           Samsung S5PC100 series based systems
 813
 814 config ARCH_S5PV210
 815         bool "Samsung S5PV210/S5PC110"
 816         select ARCH_HAS_CPUFREQ
 817         select ARCH_HAS_HOLES_MEMORYMODEL
 818         select ARCH_SPARSEMEM_ENABLE
 819         select CLKDEV_LOOKUP
 820         select CLKSRC_MMIO
 821         select CPU_V7
 822         select GENERIC_CLOCKEVENTS
 823         select GENERIC_GPIO
 824         select HAVE_CLK
 825         select HAVE_S3C2410_I2C if I2C
 826         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 827         select HAVE_S3C_RTC if RTC_CLASS
 828         select NEED_MACH_GPIO_H
 829         select NEED_MACH_MEMORY_H
 830         help
 831           Samsung S5PV210/S5PC110 series based systems
 832
 833 config ARCH_EXYNOS
 834         bool "Samsung EXYNOS"
 835         select ARCH_HAS_CPUFREQ
 836         select ARCH_HAS_HOLES_MEMORYMODEL
 837         select ARCH_SPARSEMEM_ENABLE
 838         select CLKDEV_LOOKUP
 839         select CPU_V7
 840         select GENERIC_CLOCKEVENTS
 841         select GENERIC_GPIO
 842         select HAVE_CLK
 843         select HAVE_S3C2410_I2C if I2C
 844         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 845         select HAVE_S3C_RTC if RTC_CLASS
 846         select NEED_MACH_GPIO_H
 847         select NEED_MACH_MEMORY_H
 848         help
 849           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 850
 851 config ARCH_SHARK
 852         bool "Shark"
 853         select ARCH_USES_GETTIMEOFFSET
 854         select CPU_SA110
 855         select ISA
 856         select ISA_DMA
 857         select NEED_MACH_MEMORY_H
 858         select PCI
 859         select ZONE_DMA
 860         help
 861           Support for the StrongARM based Digital DNARD machine, also known
 862           as "Shark" (<http://www.shark-linux.de/shark.html>).
 863
 864 config ARCH_U300
 865         bool "ST-Ericsson U300 Series"
 866         depends on MMU
 867         select ARCH_REQUIRE_GPIOLIB
 868         select ARM_AMBA
 869         select ARM_PATCH_PHYS_VIRT
 870         select ARM_VIC
 871         select CLKDEV_LOOKUP
 872         select CLKSRC_MMIO
 873         select COMMON_CLK
 874         select CPU_ARM926T
 875         select GENERIC_CLOCKEVENTS
 876         select GENERIC_GPIO
 877         select HAVE_TCM
 878         select SPARSE_IRQ
 879         help
 880           Support for ST-Ericsson U300 series mobile platforms.
 881
 882 config ARCH_U8500
 883         bool "ST-Ericsson U8500 Series"
 884         depends on MMU
 885         select ARCH_HAS_CPUFREQ
 886         select ARCH_REQUIRE_GPIOLIB
 887         select ARM_AMBA
 888         select CLKDEV_LOOKUP
 889         select CPU_V7
 890         select GENERIC_CLOCKEVENTS
 891         select HAVE_SMP
 892         select MIGHT_HAVE_CACHE_L2X0
 893         help
 894           Support for ST-Ericsson's Ux500 architecture
 895
 896 config ARCH_NOMADIK
 897         bool "STMicroelectronics Nomadik"
 898         select ARCH_REQUIRE_GPIOLIB
 899         select ARM_AMBA
 900         select ARM_VIC
 901         select COMMON_CLK
 902         select CPU_ARM926T
 903         select GENERIC_CLOCKEVENTS
 904         select MIGHT_HAVE_CACHE_L2X0
 905         select PINCTRL
 906         select PINCTRL_STN8815
 907         help
 908           Support for the Nomadik platform by ST-Ericsson
 909
 910 config PLAT_SPEAR
 911         bool "ST SPEAr"
 912         select ARCH_HAS_CPUFREQ
 913         select ARCH_REQUIRE_GPIOLIB
 914         select ARM_AMBA
 915         select CLKDEV_LOOKUP
 916         select CLKSRC_MMIO
 917         select COMMON_CLK
 918         select GENERIC_CLOCKEVENTS
 919         select HAVE_CLK
 920         help
 921           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 922
 923 config ARCH_DAVINCI
 924         bool "TI DaVinci"
 925         select ARCH_HAS_HOLES_MEMORYMODEL
 926         select ARCH_REQUIRE_GPIOLIB
 927         select CLKDEV_LOOKUP
 928         select GENERIC_ALLOCATOR
 929         select GENERIC_CLOCKEVENTS
 930         select GENERIC_IRQ_CHIP
 931         select HAVE_IDE
 932         select NEED_MACH_GPIO_H
 933         select ZONE_DMA
 934         help
 935           Support for TI's DaVinci platform.
 936
 937 config ARCH_OMAP
 938         bool "TI OMAP"
 939         depends on MMU
 940         select ARCH_HAS_CPUFREQ
 941         select ARCH_HAS_HOLES_MEMORYMODEL
 942         select ARCH_REQUIRE_GPIOLIB
 943         select CLKSRC_MMIO
 944         select GENERIC_CLOCKEVENTS
 945         select HAVE_CLK
 946         select NEED_MACH_GPIO_H
 947         help
 948           Support for TI's OMAP platform (OMAP1/2/3/4).
 949
 950 config ARCH_VT8500
 951         bool "VIA/WonderMedia 85xx"
 952         select ARCH_HAS_CPUFREQ
 953         select ARCH_REQUIRE_GPIOLIB
 954         select CLKDEV_LOOKUP
 955         select COMMON_CLK
 956         select CPU_ARM926T
 957         select GENERIC_CLOCKEVENTS
 958         select GENERIC_GPIO
 959         select HAVE_CLK
 960         select USE_OF
 961         help
 962           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 963
 964 config ARCH_ZYNQ
 965         bool "Xilinx Zynq ARM Cortex A9 Platform"
 966         select ARM_AMBA
 967         select ARM_GIC
 968         select CLKDEV_LOOKUP
 969         select CPU_V7
 970         select GENERIC_CLOCKEVENTS
 971         select ICST
 972         select MIGHT_HAVE_CACHE_L2X0
 973         select USE_OF
 974         help
 975           Support for Xilinx Zynq ARM Cortex A9 Platform
 976 endchoice
 977
 978 menu "Multiple platform selection"
 979         depends on ARCH_MULTIPLATFORM
 980
 981 comment "CPU Core family selection"
 982
 983 config ARCH_MULTI_V4
 984         bool "ARMv4 based platforms (FA526, StrongARM)"
 985         depends on !ARCH_MULTI_V6_V7
 986         select ARCH_MULTI_V4_V5
 987
 988 config ARCH_MULTI_V4T
 989         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 990         depends on !ARCH_MULTI_V6_V7
 991         select ARCH_MULTI_V4_V5
 992
 993 config ARCH_MULTI_V5
 994         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 995         depends on !ARCH_MULTI_V6_V7
 996         select ARCH_MULTI_V4_V5
 997
 998 config ARCH_MULTI_V4_V5
 999         bool
1000
1001 config ARCH_MULTI_V6
1002         bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
1003         select ARCH_MULTI_V6_V7
1004         select CPU_V6
1005
1006 config ARCH_MULTI_V7
1007         bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
1008         default y
1009         select ARCH_MULTI_V6_V7
1010         select ARCH_VEXPRESS
1011         select CPU_V7
1012
1013 config ARCH_MULTI_V6_V7
1014         bool
1015
1016 config ARCH_MULTI_CPU_AUTO
1017         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
1018         select ARCH_MULTI_V5
1019
1020 endmenu
1021
1022 #
1023 # This is sorted alphabetically by mach-* pathname.  However, plat-*
1024 # Kconfigs may be included either alphabetically (according to the
1025 # plat- suffix) or along side the corresponding mach-* source.
1026 #
1027 source "arch/arm/mach-mvebu/Kconfig"
1028
1029 source "arch/arm/mach-at91/Kconfig"
1030
1031 source "arch/arm/mach-clps711x/Kconfig"
1032
1033 source "arch/arm/mach-cns3xxx/Kconfig"
1034
1035 source "arch/arm/mach-davinci/Kconfig"
1036
1037 source "arch/arm/mach-dove/Kconfig"
1038
1039 source "arch/arm/mach-ep93xx/Kconfig"
1040
1041 source "arch/arm/mach-footbridge/Kconfig"
1042
1043 source "arch/arm/mach-gemini/Kconfig"
1044
1045 source "arch/arm/mach-h720x/Kconfig"
1046
1047 source "arch/arm/mach-highbank/Kconfig"
1048
1049 source "arch/arm/mach-integrator/Kconfig"
1050
1051 source "arch/arm/mach-iop32x/Kconfig"
1052
1053 source "arch/arm/mach-iop33x/Kconfig"
1054
1055 source "arch/arm/mach-iop13xx/Kconfig"
1056
1057 source "arch/arm/mach-ixp4xx/Kconfig"
1058
1059 source "arch/arm/mach-kirkwood/Kconfig"
1060
1061 source "arch/arm/mach-ks8695/Kconfig"
1062
1063 source "arch/arm/mach-msm/Kconfig"
1064
1065 source "arch/arm/mach-mv78xx0/Kconfig"
1066
1067 source "arch/arm/plat-mxc/Kconfig"
1068
1069 source "arch/arm/mach-mxs/Kconfig"
1070
1071 source "arch/arm/mach-netx/Kconfig"
1072
1073 source "arch/arm/mach-nomadik/Kconfig"
1074 source "arch/arm/plat-nomadik/Kconfig"
1075
1076 source "arch/arm/plat-omap/Kconfig"
1077
1078 source "arch/arm/mach-omap1/Kconfig"
1079
1080 source "arch/arm/mach-omap2/Kconfig"
1081
1082 source "arch/arm/mach-orion5x/Kconfig"
1083
1084 source "arch/arm/mach-picoxcell/Kconfig"
1085
1086 source "arch/arm/mach-pxa/Kconfig"
1087 source "arch/arm/plat-pxa/Kconfig"
1088
1089 source "arch/arm/mach-mmp/Kconfig"
1090
1091 source "arch/arm/mach-realview/Kconfig"
1092
1093 source "arch/arm/mach-sa1100/Kconfig"
1094
1095 source "arch/arm/plat-samsung/Kconfig"
1096 source "arch/arm/plat-s3c24xx/Kconfig"
1097
1098 source "arch/arm/mach-socfpga/Kconfig"
1099
1100 source "arch/arm/plat-spear/Kconfig"
1101
1102 source "arch/arm/mach-s3c24xx/Kconfig"
1103 if ARCH_S3C24XX
1104 source "arch/arm/mach-s3c2412/Kconfig"
1105 source "arch/arm/mach-s3c2440/Kconfig"
1106 endif
1107
1108 if ARCH_S3C64XX
1109 source "arch/arm/mach-s3c64xx/Kconfig"
1110 endif
1111
1112 source "arch/arm/mach-s5p64x0/Kconfig"
1113
1114 source "arch/arm/mach-s5pc100/Kconfig"
1115
1116 source "arch/arm/mach-s5pv210/Kconfig"
1117
1118 source "arch/arm/mach-exynos/Kconfig"
1119
1120 source "arch/arm/mach-shmobile/Kconfig"
1121
1122 source "arch/arm/mach-prima2/Kconfig"
1123
1124 source "arch/arm/mach-tegra/Kconfig"
1125
1126 source "arch/arm/mach-u300/Kconfig"
1127
1128 source "arch/arm/mach-ux500/Kconfig"
1129
1130 source "arch/arm/mach-versatile/Kconfig"
1131
1132 source "arch/arm/mach-vexpress/Kconfig"
1133 source "arch/arm/plat-versatile/Kconfig"
1134
1135 source "arch/arm/mach-w90x900/Kconfig"
1136
1137 # Definitions to make life easier
1138 config ARCH_ACORN
1139         bool
1140
1141 config PLAT_IOP
1142         bool
1143         select GENERIC_CLOCKEVENTS
1144
1145 config PLAT_ORION
1146         bool
1147         select CLKSRC_MMIO
1148         select COMMON_CLK
1149         select GENERIC_IRQ_CHIP
1150         select IRQ_DOMAIN
1151
1152 config PLAT_ORION_LEGACY
1153         bool
1154         select PLAT_ORION
1155
1156 config PLAT_PXA
1157         bool
1158
1159 config PLAT_VERSATILE
1160         bool
1161
1162 config ARM_TIMER_SP804
1163         bool
1164         select CLKSRC_MMIO
1165         select HAVE_SCHED_CLOCK
1166
1167 source arch/arm/mm/Kconfig
1168
1169 config ARM_NR_BANKS
1170         int
1171         default 16 if ARCH_EP93XX
1172         default 8
1173
1174 config IWMMXT
1175         bool "Enable iWMMXt support"
1176         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1177         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1178         help
1179           Enable support for iWMMXt context switching at run time if
1180           running on a CPU that supports it.
1181
1182 config XSCALE_PMU
1183         bool
1184         depends on CPU_XSCALE
1185         default y
1186
1187 config MULTI_IRQ_HANDLER
1188         bool
1189         help
1190           Allow each machine to specify it's own IRQ handler at run time.
1191
1192 if !MMU
1193 source "arch/arm/Kconfig-nommu"
1194 endif
1195
1196 config ARM_ERRATA_326103
1197         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1198         depends on CPU_V6
1199         help
1200           Executing a SWP instruction to read-only memory does not set bit 11
1201           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1202           treat the access as a read, preventing a COW from occurring and
1203           causing the faulting task to livelock.
1204
1205 config ARM_ERRATA_411920
1206         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1207         depends on CPU_V6 || CPU_V6K
1208         help
1209           Invalidation of the Instruction Cache operation can
1210           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1211           It does not affect the MPCore. This option enables the ARM Ltd.
1212           recommended workaround.
1213
1214 config ARM_ERRATA_430973
1215         bool "ARM errata: Stale prediction on replaced interworking branch"
1216         depends on CPU_V7
1217         help
1218           This option enables the workaround for the 430973 Cortex-A8
1219           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1220           interworking branch is replaced with another code sequence at the
1221           same virtual address, whether due to self-modifying code or virtual
1222           to physical address re-mapping, Cortex-A8 does not recover from the
1223           stale interworking branch prediction. This results in Cortex-A8
1224           executing the new code sequence in the incorrect ARM or Thumb state.
1225           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1226           and also flushes the branch target cache at every context switch.
1227           Note that setting specific bits in the ACTLR register may not be
1228           available in non-secure mode.
1229
1230 config ARM_ERRATA_458693
1231         bool "ARM errata: Processor deadlock when a false hazard is created"
1232         depends on CPU_V7
1233         help
1234           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1235           erratum. For very specific sequences of memory operations, it is
1236           possible for a hazard condition intended for a cache line to instead
1237           be incorrectly associated with a different cache line. This false
1238           hazard might then cause a processor deadlock. The workaround enables
1239           the L1 caching of the NEON accesses and disables the PLD instruction
1240           in the ACTLR register. Note that setting specific bits in the ACTLR
1241           register may not be available in non-secure mode.
1242
1243 config ARM_ERRATA_460075
1244         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1245         depends on CPU_V7
1246         help
1247           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1248           erratum. Any asynchronous access to the L2 cache may encounter a
1249           situation in which recent store transactions to the L2 cache are lost
1250           and overwritten with stale memory contents from external memory. The
1251           workaround disables the write-allocate mode for the L2 cache via the
1252           ACTLR register. Note that setting specific bits in the ACTLR register
1253           may not be available in non-secure mode.
1254
1255 config ARM_ERRATA_742230
1256         bool "ARM errata: DMB operation may be faulty"
1257         depends on CPU_V7 && SMP
1258         help
1259           This option enables the workaround for the 742230 Cortex-A9
1260           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1261           between two write operations may not ensure the correct visibility
1262           ordering of the two writes. This workaround sets a specific bit in
1263           the diagnostic register of the Cortex-A9 which causes the DMB
1264           instruction to behave as a DSB, ensuring the correct behaviour of
1265           the two writes.
1266
1267 config ARM_ERRATA_742231
1268         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1269         depends on CPU_V7 && SMP
1270         help
1271           This option enables the workaround for the 742231 Cortex-A9
1272           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1273           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1274           accessing some data located in the same cache line, may get corrupted
1275           data due to bad handling of the address hazard when the line gets
1276           replaced from one of the CPUs at the same time as another CPU is
1277           accessing it. This workaround sets specific bits in the diagnostic
1278           register of the Cortex-A9 which reduces the linefill issuing
1279           capabilities of the processor.
1280
1281 config PL310_ERRATA_588369
1282         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1283         depends on CACHE_L2X0
1284         help
1285            The PL310 L2 cache controller implements three types of Clean &
1286            Invalidate maintenance operations: by Physical Address
1287            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1288            They are architecturally defined to behave as the execution of a
1289            clean operation followed immediately by an invalidate operation,
1290            both performing to the same memory location. This functionality
1291            is not correctly implemented in PL310 as clean lines are not
1292            invalidated as a result of these operations.
1293
1294 config ARM_ERRATA_720789
1295         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1296         depends on CPU_V7
1297         help
1298           This option enables the workaround for the 720789 Cortex-A9 (prior to
1299           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1300           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1301           As a consequence of this erratum, some TLB entries which should be
1302           invalidated are not, resulting in an incoherency in the system page
1303           tables. The workaround changes the TLB flushing routines to invalidate
1304           entries regardless of the ASID.
1305
1306 config PL310_ERRATA_727915
1307         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1308         depends on CACHE_L2X0
1309         help
1310           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1311           operation (offset 0x7FC). This operation runs in background so that
1312           PL310 can handle normal accesses while it is in progress. Under very
1313           rare circumstances, due to this erratum, write data can be lost when
1314           PL310 treats a cacheable write transaction during a Clean &
1315           Invalidate by Way operation.
1316
1317 config ARM_ERRATA_743622
1318         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1319         depends on CPU_V7
1320         help
1321           This option enables the workaround for the 743622 Cortex-A9
1322           (r2p*) erratum. Under very rare conditions, a faulty
1323           optimisation in the Cortex-A9 Store Buffer may lead to data
1324           corruption. This workaround sets a specific bit in the diagnostic
1325           register of the Cortex-A9 which disables the Store Buffer
1326           optimisation, preventing the defect from occurring. This has no
1327           visible impact on the overall performance or power consumption of the
1328           processor.
1329
1330 config ARM_ERRATA_751472
1331         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1332         depends on CPU_V7
1333         help
1334           This option enables the workaround for the 751472 Cortex-A9 (prior
1335           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1336           completion of a following broadcasted operation if the second
1337           operation is received by a CPU before the ICIALLUIS has completed,
1338           potentially leading to corrupted entries in the cache or TLB.
1339
1340 config PL310_ERRATA_753970
1341         bool "PL310 errata: cache sync operation may be faulty"
1342         depends on CACHE_PL310
1343         help
1344           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1345
1346           Under some condition the effect of cache sync operation on
1347           the store buffer still remains when the operation completes.
1348           This means that the store buffer is always asked to drain and
1349           this prevents it from merging any further writes. The workaround
1350           is to replace the normal offset of cache sync operation (0x730)
1351           by another offset targeting an unmapped PL310 register 0x740.
1352           This has the same effect as the cache sync operation: store buffer
1353           drain and waiting for all buffers empty.
1354
1355 config ARM_ERRATA_754322
1356         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1357         depends on CPU_V7
1358         help
1359           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1360           r3p*) erratum. A speculative memory access may cause a page table walk
1361           which starts prior to an ASID switch but completes afterwards. This
1362           can populate the micro-TLB with a stale entry which may be hit with
1363           the new ASID. This workaround places two dsb instructions in the mm
1364           switching code so that no page table walks can cross the ASID switch.
1365
1366 config ARM_ERRATA_754327
1367         bool "ARM errata: no automatic Store Buffer drain"
1368         depends on CPU_V7 && SMP
1369         help
1370           This option enables the workaround for the 754327 Cortex-A9 (prior to
1371           r2p0) erratum. The Store Buffer does not have any automatic draining
1372           mechanism and therefore a livelock may occur if an external agent
1373           continuously polls a memory location waiting to observe an update.
1374           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1375           written polling loops from denying visibility of updates to memory.
1376
1377 config ARM_ERRATA_364296
1378         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1379         depends on CPU_V6 && !SMP
1380         help
1381           This options enables the workaround for the 364296 ARM1136
1382           r0p2 erratum (possible cache data corruption with
1383           hit-under-miss enabled). It sets the undocumented bit 31 in
1384           the auxiliary control register and the FI bit in the control
1385           register, thus disabling hit-under-miss without putting the
1386           processor into full low interrupt latency mode. ARM11MPCore
1387           is not affected.
1388
1389 config ARM_ERRATA_764369
1390         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1391         depends on CPU_V7 && SMP
1392         help
1393           This option enables the workaround for erratum 764369
1394           affecting Cortex-A9 MPCore with two or more processors (all
1395           current revisions). Under certain timing circumstances, a data
1396           cache line maintenance operation by MVA targeting an Inner
1397           Shareable memory region may fail to proceed up to either the
1398           Point of Coherency or to the Point of Unification of the
1399           system. This workaround adds a DSB instruction before the
1400           relevant cache maintenance functions and sets a specific bit
1401           in the diagnostic control register of the SCU.
1402
1403 config PL310_ERRATA_769419
1404         bool "PL310 errata: no automatic Store Buffer drain"
1405         depends on CACHE_L2X0
1406         help
1407           On revisions of the PL310 prior to r3p2, the Store Buffer does
1408           not automatically drain. This can cause normal, non-cacheable
1409           writes to be retained when the memory system is idle, leading
1410           to suboptimal I/O performance for drivers using coherent DMA.
1411           This option adds a write barrier to the cpu_idle loop so that,
1412           on systems with an outer cache, the store buffer is drained
1413           explicitly.
1414
1415 config ARM_ERRATA_775420
1416        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1417        depends on CPU_V7
1418        help
1419          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1420          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1421          operation aborts with MMU exception, it might cause the processor
1422          to deadlock. This workaround puts DSB before executing ISB if
1423          an abort may occur on cache maintenance.
1424
1425 endmenu
1426
1427 source "arch/arm/common/Kconfig"
1428
1429 menu "Bus support"
1430
1431 config ARM_AMBA
1432         bool
1433
1434 config ISA
1435         bool
1436         help
1437           Find out whether you have ISA slots on your motherboard.  ISA is the
1438           name of a bus system, i.e. the way the CPU talks to the other stuff
1439           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1440           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1441           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1442
1443 # Select ISA DMA controller support
1444 config ISA_DMA
1445         bool
1446         select ISA_DMA_API
1447
1448 # Select ISA DMA interface
1449 config ISA_DMA_API
1450         bool
1451
1452 config PCI
1453         bool "PCI support" if MIGHT_HAVE_PCI
1454         help
1455           Find out whether you have a PCI motherboard. PCI is the name of a
1456           bus system, i.e. the way the CPU talks to the other stuff inside
1457           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1458           VESA. If you have PCI, say Y, otherwise N.
1459
1460 config PCI_DOMAINS
1461         bool
1462         depends on PCI
1463
1464 config PCI_NANOENGINE
1465         bool "BSE nanoEngine PCI support"
1466         depends on SA1100_NANOENGINE
1467         help
1468           Enable PCI on the BSE nanoEngine board.
1469
1470 config PCI_SYSCALL
1471         def_bool PCI
1472
1473 # Select the host bridge type
1474 config PCI_HOST_VIA82C505
1475         bool
1476         depends on PCI && ARCH_SHARK
1477         default y
1478
1479 config PCI_HOST_ITE8152
1480         bool
1481         depends on PCI && MACH_ARMCORE
1482         default y
1483         select DMABOUNCE
1484
1485 source "drivers/pci/Kconfig"
1486
1487 source "drivers/pcmcia/Kconfig"
1488
1489 endmenu
1490
1491 menu "Kernel Features"
1492
1493 config HAVE_SMP
1494         bool
1495         help
1496           This option should be selected by machines which have an SMP-
1497           capable CPU.
1498
1499           The only effect of this option is to make the SMP-related
1500           options available to the user for configuration.
1501
1502 config SMP
1503         bool "Symmetric Multi-Processing"
1504         depends on CPU_V6K || CPU_V7
1505         depends on GENERIC_CLOCKEVENTS
1506         depends on HAVE_SMP
1507         depends on MMU
1508         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1509         select USE_GENERIC_SMP_HELPERS
1510         help
1511           This enables support for systems with more than one CPU. If you have
1512           a system with only one CPU, like most personal computers, say N. If
1513           you have a system with more than one CPU, say Y.
1514
1515           If you say N here, the kernel will run on single and multiprocessor
1516           machines, but will use only one CPU of a multiprocessor machine. If
1517           you say Y here, the kernel will run on many, but not all, single
1518           processor machines. On a single processor machine, the kernel will
1519           run faster if you say N here.
1520
1521           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1522           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1523           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1524
1525           If you don't know what to do here, say N.
1526
1527 config SMP_ON_UP
1528         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1529         depends on EXPERIMENTAL
1530         depends on SMP && !XIP_KERNEL
1531         default y
1532         help
1533           SMP kernels contain instructions which fail on non-SMP processors.
1534           Enabling this option allows the kernel to modify itself to make
1535           these instructions safe.  Disabling it allows about 1K of space
1536           savings.
1537
1538           If you don't know what to do here, say Y.
1539
1540 config ARM_CPU_TOPOLOGY
1541         bool "Support cpu topology definition"
1542         depends on SMP && CPU_V7
1543         default y
1544         help
1545           Support ARM cpu topology definition. The MPIDR register defines
1546           affinity between processors which is then used to describe the cpu
1547           topology of an ARM System.
1548
1549 config SCHED_MC
1550         bool "Multi-core scheduler support"
1551         depends on ARM_CPU_TOPOLOGY
1552         help
1553           Multi-core scheduler support improves the CPU scheduler's decision
1554           making when dealing with multi-core CPU chips at a cost of slightly
1555           increased overhead in some places. If unsure say N here.
1556
1557 config SCHED_SMT
1558         bool "SMT scheduler support"
1559         depends on ARM_CPU_TOPOLOGY
1560         help
1561           Improves the CPU scheduler's decision making when dealing with
1562           MultiThreading at a cost of slightly increased overhead in some
1563           places. If unsure say N here.
1564
1565 config HAVE_ARM_SCU
1566         bool
1567         help
1568           This option enables support for the ARM system coherency unit
1569
1570 config ARM_ARCH_TIMER
1571         bool "Architected timer support"
1572         depends on CPU_V7
1573         help
1574           This option enables support for the ARM architected timer
1575
1576 config HAVE_ARM_TWD
1577         bool
1578         depends on SMP
1579         help
1580           This options enables support for the ARM timer and watchdog unit
1581
1582 choice
1583         prompt "Memory split"
1584         default VMSPLIT_3G
1585         help
1586           Select the desired split between kernel and user memory.
1587
1588           If you are not absolutely sure what you are doing, leave this
1589           option alone!
1590
1591         config VMSPLIT_3G
1592                 bool "3G/1G user/kernel split"
1593         config VMSPLIT_2G
1594                 bool "2G/2G user/kernel split"
1595         config VMSPLIT_1G
1596                 bool "1G/3G user/kernel split"
1597 endchoice
1598
1599 config PAGE_OFFSET
1600         hex
1601         default 0x40000000 if VMSPLIT_1G
1602         default 0x80000000 if VMSPLIT_2G
1603         default 0xC0000000
1604
1605 config NR_CPUS
1606         int "Maximum number of CPUs (2-32)"
1607         range 2 32
1608         depends on SMP
1609         default "4"
1610
1611 config HOTPLUG_CPU
1612         bool "Support for hot-pluggable CPUs"
1613         depends on SMP && HOTPLUG
1614         help
1615           Say Y here to experiment with turning CPUs off and on.  CPUs
1616           can be controlled through /sys/devices/system/cpu.
1617
1618 config LOCAL_TIMERS
1619         bool "Use local timer interrupts"
1620         depends on SMP
1621         default y
1622         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1623         help
1624           Enable support for local timers on SMP platforms, rather then the
1625           legacy IPI broadcast method.  Local timers allows the system
1626           accounting to be spread across the timer interval, preventing a
1627           "thundering herd" at every timer tick.
1628
1629 config ARCH_NR_GPIO
1630         int
1631         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1632         default 355 if ARCH_U8500
1633         default 264 if MACH_H4700
1634         default 512 if SOC_OMAP5
1635         default 288 if ARCH_VT8500
1636         default 0
1637         help
1638           Maximum number of GPIOs in the system.
1639
1640           If unsure, leave the default value.
1641
1642 source kernel/Kconfig.preempt
1643
1644 config HZ
1645         int
1646         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1647                 ARCH_S5PV210 || ARCH_EXYNOS4
1648         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1649         default AT91_TIMER_HZ if ARCH_AT91
1650         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1651         default 100
1652
1653 config THUMB2_KERNEL
1654         bool "Compile the kernel in Thumb-2 mode"
1655         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1656         select AEABI
1657         select ARM_ASM_UNIFIED
1658         select ARM_UNWIND
1659         help
1660           By enabling this option, the kernel will be compiled in
1661           Thumb-2 mode. A compiler/assembler that understand the unified
1662           ARM-Thumb syntax is needed.
1663
1664           If unsure, say N.
1665
1666 config THUMB2_AVOID_R_ARM_THM_JUMP11
1667         bool "Work around buggy Thumb-2 short branch relocations in gas"
1668         depends on THUMB2_KERNEL && MODULES
1669         default y
1670         help
1671           Various binutils versions can resolve Thumb-2 branches to
1672           locally-defined, preemptible global symbols as short-range "b.n"
1673           branch instructions.
1674
1675           This is a problem, because there's no guarantee the final
1676           destination of the symbol, or any candidate locations for a
1677           trampoline, are within range of the branch.  For this reason, the
1678           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1679           relocation in modules at all, and it makes little sense to add
1680           support.
1681
1682           The symptom is that the kernel fails with an "unsupported
1683           relocation" error when loading some modules.
1684
1685           Until fixed tools are available, passing
1686           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1687           code which hits this problem, at the cost of a bit of extra runtime
1688           stack usage in some cases.
1689
1690           The problem is described in more detail at:
1691               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1692
1693           Only Thumb-2 kernels are affected.
1694
1695           Unless you are sure your tools don't have this problem, say Y.
1696
1697 config ARM_ASM_UNIFIED
1698         bool
1699
1700 config AEABI
1701         bool "Use the ARM EABI to compile the kernel"
1702         help
1703           This option allows for the kernel to be compiled using the latest
1704           ARM ABI (aka EABI).  This is only useful if you are using a user
1705           space environment that is also compiled with EABI.
1706
1707           Since there are major incompatibilities between the legacy ABI and
1708           EABI, especially with regard to structure member alignment, this
1709           option also changes the kernel syscall calling convention to
1710           disambiguate both ABIs and allow for backward compatibility support
1711           (selected with CONFIG_OABI_COMPAT).
1712
1713           To use this you need GCC version 4.0.0 or later.
1714
1715 config OABI_COMPAT
1716         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1717         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1718         default y
1719         help
1720           This option preserves the old syscall interface along with the
1721           new (ARM EABI) one. It also provides a compatibility layer to
1722           intercept syscalls that have structure arguments which layout
1723           in memory differs between the legacy ABI and the new ARM EABI
1724           (only for non "thumb" binaries). This option adds a tiny
1725           overhead to all syscalls and produces a slightly larger kernel.
1726           If you know you'll be using only pure EABI user space then you
1727           can say N here. If this option is not selected and you attempt
1728           to execute a legacy ABI binary then the result will be
1729           UNPREDICTABLE (in fact it can be predicted that it won't work
1730           at all). If in doubt say Y.
1731
1732 config ARCH_HAS_HOLES_MEMORYMODEL
1733         bool
1734
1735 config ARCH_SPARSEMEM_ENABLE
1736         bool
1737
1738 config ARCH_SPARSEMEM_DEFAULT
1739         def_bool ARCH_SPARSEMEM_ENABLE
1740
1741 config ARCH_SELECT_MEMORY_MODEL
1742         def_bool ARCH_SPARSEMEM_ENABLE
1743
1744 config HAVE_ARCH_PFN_VALID
1745         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1746
1747 config HIGHMEM
1748         bool "High Memory Support"
1749         depends on MMU
1750         help
1751           The address space of ARM processors is only 4 Gigabytes large
1752           and it has to accommodate user address space, kernel address
1753           space as well as some memory mapped IO. That means that, if you
1754           have a large amount of physical memory and/or IO, not all of the
1755           memory can be "permanently mapped" by the kernel. The physical
1756           memory that is not permanently mapped is called "high memory".
1757
1758           Depending on the selected kernel/user memory split, minimum
1759           vmalloc space and actual amount of RAM, you may not need this
1760           option which should result in a slightly faster kernel.
1761
1762           If unsure, say n.
1763
1764 config HIGHPTE
1765         bool "Allocate 2nd-level pagetables from highmem"
1766         depends on HIGHMEM
1767
1768 config HW_PERF_EVENTS
1769         bool "Enable hardware performance counter support for perf events"
1770         depends on PERF_EVENTS
1771         default y
1772         help
1773           Enable hardware performance counter support for perf events. If
1774           disabled, perf events will use software events only.
1775
1776 source "mm/Kconfig"
1777
1778 config FORCE_MAX_ZONEORDER
1779         int "Maximum zone order" if ARCH_SHMOBILE
1780         range 11 64 if ARCH_SHMOBILE
1781         default "12" if SOC_AM33XX
1782         default "9" if SA1111
1783         default "11"
1784         help
1785           The kernel memory allocator divides physically contiguous memory
1786           blocks into "zones", where each zone is a power of two number of
1787           pages.  This option selects the largest power of two that the kernel
1788           keeps in the memory allocator.  If you need to allocate very large
1789           blocks of physically contiguous memory, then you may need to
1790           increase this value.
1791
1792           This config option is actually maximum order plus one. For example,
1793           a value of 11 means that the largest free memory block is 2^10 pages.
1794
1795 config ALIGNMENT_TRAP
1796         bool
1797         depends on CPU_CP15_MMU
1798         default y if !ARCH_EBSA110
1799         select HAVE_PROC_CPU if PROC_FS
1800         help
1801           ARM processors cannot fetch/store information which is not
1802           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1803           address divisible by 4. On 32-bit ARM processors, these non-aligned
1804           fetch/store instructions will be emulated in software if you say
1805           here, which has a severe performance impact. This is necessary for
1806           correct operation of some network protocols. With an IP-only
1807           configuration it is safe to say N, otherwise say Y.
1808
1809 config UACCESS_WITH_MEMCPY
1810         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1811         depends on MMU
1812         default y if CPU_FEROCEON
1813         help
1814           Implement faster copy_to_user and clear_user methods for CPU
1815           cores where a 8-word STM instruction give significantly higher
1816           memory write throughput than a sequence of individual 32bit stores.
1817
1818           A possible side effect is a slight increase in scheduling latency
1819           between threads sharing the same address space if they invoke
1820           such copy operations with large buffers.
1821
1822           However, if the CPU data cache is using a write-allocate mode,
1823           this option is unlikely to provide any performance gain.
1824
1825 config SECCOMP
1826         bool
1827         prompt "Enable seccomp to safely compute untrusted bytecode"
1828         ---help---
1829           This kernel feature is useful for number crunching applications
1830           that may need to compute untrusted bytecode during their
1831           execution. By using pipes or other transports made available to
1832           the process as file descriptors supporting the read/write
1833           syscalls, it's possible to isolate those applications in
1834           their own address space using seccomp. Once seccomp is
1835           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1836           and the task is only allowed to execute a few safe syscalls
1837           defined by each seccomp mode.
1838
1839 config CC_STACKPROTECTOR
1840         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1841         depends on EXPERIMENTAL
1842         help
1843           This option turns on the -fstack-protector GCC feature. This
1844           feature puts, at the beginning of functions, a canary value on
1845           the stack just before the return address, and validates
1846           the value just before actually returning.  Stack based buffer
1847           overflows (that need to overwrite this return address) now also
1848           overwrite the canary, which gets detected and the attack is then
1849           neutralized via a kernel panic.
1850           This feature requires gcc version 4.2 or above.
1851
1852 config XEN_DOM0
1853         def_bool y
1854         depends on XEN
1855
1856 config XEN
1857         bool "Xen guest support on ARM (EXPERIMENTAL)"
1858         depends on EXPERIMENTAL && ARM && OF
1859         depends on CPU_V7 && !CPU_V6
1860         help
1861           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1862
1863 endmenu
1864
1865 menu "Boot options"
1866
1867 config USE_OF
1868         bool "Flattened Device Tree support"
1869         select IRQ_DOMAIN
1870         select OF
1871         select OF_EARLY_FLATTREE
1872         help
1873           Include support for flattened device tree machine descriptions.
1874
1875 config ATAGS
1876         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1877         default y
1878         help
1879           This is the traditional way of passing data to the kernel at boot
1880           time. If you are solely relying on the flattened device tree (or
1881           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1882           to remove ATAGS support from your kernel binary.  If unsure,
1883           leave this to y.
1884
1885 config DEPRECATED_PARAM_STRUCT
1886         bool "Provide old way to pass kernel parameters"
1887         depends on ATAGS
1888         help
1889           This was deprecated in 2001 and announced to live on for 5 years.
1890           Some old boot loaders still use this way.
1891
1892 # Compressed boot loader in ROM.  Yes, we really want to ask about
1893 # TEXT and BSS so we preserve their values in the config files.
1894 config ZBOOT_ROM_TEXT
1895         hex "Compressed ROM boot loader base address"
1896         default "0"
1897         help
1898           The physical address at which the ROM-able zImage is to be
1899           placed in the target.  Platforms which normally make use of
1900           ROM-able zImage formats normally set this to a suitable
1901           value in their defconfig file.
1902
1903           If ZBOOT_ROM is not enabled, this has no effect.
1904
1905 config ZBOOT_ROM_BSS
1906         hex "Compressed ROM boot loader BSS address"
1907         default "0"
1908         help
1909           The base address of an area of read/write memory in the target
1910           for the ROM-able zImage which must be available while the
1911           decompressor is running. It must be large enough to hold the
1912           entire decompressed kernel plus an additional 128 KiB.
1913           Platforms which normally make use of ROM-able zImage formats
1914           normally set this to a suitable value in their defconfig file.
1915
1916           If ZBOOT_ROM is not enabled, this has no effect.
1917
1918 config ZBOOT_ROM
1919         bool "Compressed boot loader in ROM/flash"
1920         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1921         help
1922           Say Y here if you intend to execute your compressed kernel image
1923           (zImage) directly from ROM or flash.  If unsure, say N.
1924
1925 choice
1926         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1927         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1928         default ZBOOT_ROM_NONE
1929         help
1930           Include experimental SD/MMC loading code in the ROM-able zImage.
1931           With this enabled it is possible to write the ROM-able zImage
1932           kernel image to an MMC or SD card and boot the kernel straight
1933           from the reset vector. At reset the processor Mask ROM will load
1934           the first part of the ROM-able zImage which in turn loads the
1935           rest the kernel image to RAM.
1936
1937 config ZBOOT_ROM_NONE
1938         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1939         help
1940           Do not load image from SD or MMC
1941
1942 config ZBOOT_ROM_MMCIF
1943         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1944         help
1945           Load image from MMCIF hardware block.
1946
1947 config ZBOOT_ROM_SH_MOBILE_SDHI
1948         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1949         help
1950           Load image from SDHI hardware block
1951
1952 endchoice
1953
1954 config ARM_APPENDED_DTB
1955         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1956         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1957         help
1958           With this option, the boot code will look for a device tree binary
1959           (DTB) appended to zImage
1960           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1961
1962           This is meant as a backward compatibility convenience for those
1963           systems with a bootloader that can't be upgraded to accommodate
1964           the documented boot protocol using a device tree.
1965
1966           Beware that there is very little in terms of protection against
1967           this option being confused by leftover garbage in memory that might
1968           look like a DTB header after a reboot if no actual DTB is appended
1969           to zImage.  Do not leave this option active in a production kernel
1970           if you don't intend to always append a DTB.  Proper passing of the
1971           location into r2 of a bootloader provided DTB is always preferable
1972           to this option.
1973
1974 config ARM_ATAG_DTB_COMPAT
1975         bool "Supplement the appended DTB with traditional ATAG information"
1976         depends on ARM_APPENDED_DTB
1977         help
1978           Some old bootloaders can't be updated to a DTB capable one, yet
1979           they provide ATAGs with memory configuration, the ramdisk address,
1980           the kernel cmdline string, etc.  Such information is dynamically
1981           provided by the bootloader and can't always be stored in a static
1982           DTB.  To allow a device tree enabled kernel to be used with such
1983           bootloaders, this option allows zImage to extract the information
1984           from the ATAG list and store it at run time into the appended DTB.
1985
1986 choice
1987         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1988         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1989
1990 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1991         bool "Use bootloader kernel arguments if available"
1992         help
1993           Uses the command-line options passed by the boot loader instead of
1994           the device tree bootargs property. If the boot loader doesn't provide
1995           any, the device tree bootargs property will be used.
1996
1997 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1998         bool "Extend with bootloader kernel arguments"
1999         help
2000           The command-line arguments provided by the boot loader will be
2001           appended to the the device tree bootargs property.
2002
2003 endchoice
2004
2005 config CMDLINE
2006         string "Default kernel command string"
2007         default ""
2008         help
2009           On some architectures (EBSA110 and CATS), there is currently no way
2010           for the boot loader to pass arguments to the kernel. For these
2011           architectures, you should supply some command-line options at build
2012           time by entering them here. As a minimum, you should specify the
2013           memory size and the root device (e.g., mem=64M root=/dev/nfs).
2014
2015 choice
2016         prompt "Kernel command line type" if CMDLINE != ""
2017         default CMDLINE_FROM_BOOTLOADER
2018         depends on ATAGS
2019
2020 config CMDLINE_FROM_BOOTLOADER
2021         bool "Use bootloader kernel arguments if available"
2022         help
2023           Uses the command-line options passed by the boot loader. If
2024           the boot loader doesn't provide any, the default kernel command
2025           string provided in CMDLINE will be used.
2026
2027 config CMDLINE_EXTEND
2028         bool "Extend bootloader kernel arguments"
2029         help
2030           The command-line arguments provided by the boot loader will be
2031           appended to the default kernel command string.
2032
2033 config CMDLINE_FORCE
2034         bool "Always use the default kernel command string"
2035         help
2036           Always use the default kernel command string, even if the boot
2037           loader passes other arguments to the kernel.
2038           This is useful if you cannot or don't want to change the
2039           command-line options your boot loader passes to the kernel.
2040 endchoice
2041
2042 config XIP_KERNEL
2043         bool "Kernel Execute-In-Place from ROM"
2044         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
2045         help
2046           Execute-In-Place allows the kernel to run from non-volatile storage
2047           directly addressable by the CPU, such as NOR flash. This saves RAM
2048           space since the text section of the kernel is not loaded from flash
2049           to RAM.  Read-write sections, such as the data section and stack,
2050           are still copied to RAM.  The XIP kernel is not compressed since
2051           it has to run directly from flash, so it will take more space to
2052           store it.  The flash address used to link the kernel object files,
2053           and for storing it, is configuration dependent. Therefore, if you
2054           say Y here, you must know the proper physical address where to
2055           store the kernel image depending on your own flash memory usage.
2056
2057           Also note that the make target becomes "make xipImage" rather than
2058           "make zImage" or "make Image".  The final kernel binary to put in
2059           ROM memory will be arch/arm/boot/xipImage.
2060
2061           If unsure, say N.
2062
2063 config XIP_PHYS_ADDR
2064         hex "XIP Kernel Physical Location"
2065         depends on XIP_KERNEL
2066         default "0x00080000"
2067         help
2068           This is the physical address in your flash memory the kernel will
2069           be linked for and stored to.  This address is dependent on your
2070           own flash usage.
2071
2072 config KEXEC
2073         bool "Kexec system call (EXPERIMENTAL)"
2074         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2075         help
2076           kexec is a system call that implements the ability to shutdown your
2077           current kernel, and to start another kernel.  It is like a reboot
2078           but it is independent of the system firmware.   And like a reboot
2079           you can start any kernel with it, not just Linux.
2080
2081           It is an ongoing process to be certain the hardware in a machine
2082           is properly shutdown, so do not be surprised if this code does not
2083           initially work for you.  It may help to enable device hotplugging
2084           support.
2085
2086 config ATAGS_PROC
2087         bool "Export atags in procfs"
2088         depends on ATAGS && KEXEC
2089         default y
2090         help
2091           Should the atags used to boot the kernel be exported in an "atags"
2092           file in procfs. Useful with kexec.
2093
2094 config CRASH_DUMP
2095         bool "Build kdump crash kernel (EXPERIMENTAL)"
2096         depends on EXPERIMENTAL
2097         help
2098           Generate crash dump after being started by kexec. This should
2099           be normally only set in special crash dump kernels which are
2100           loaded in the main kernel with kexec-tools into a specially
2101           reserved region and then later executed after a crash by
2102           kdump/kexec. The crash dump kernel must be compiled to a
2103           memory address not used by the main kernel
2104
2105           For more details see Documentation/kdump/kdump.txt
2106
2107 config AUTO_ZRELADDR
2108         bool "Auto calculation of the decompressed kernel image address"
2109         depends on !ZBOOT_ROM && !ARCH_U300
2110         help
2111           ZRELADDR is the physical address where the decompressed kernel
2112           image will be placed. If AUTO_ZRELADDR is selected, the address
2113           will be determined at run-time by masking the current IP with
2114           0xf8000000. This assumes the zImage being placed in the first 128MB
2115           from start of memory.
2116
2117 endmenu
2118
2119 menu "CPU Power Management"
2120
2121 if ARCH_HAS_CPUFREQ
2122
2123 source "drivers/cpufreq/Kconfig"
2124
2125 config CPU_FREQ_IMX
2126         tristate "CPUfreq driver for i.MX CPUs"
2127         depends on ARCH_MXC && CPU_FREQ
2128         select CPU_FREQ_TABLE
2129         help
2130           This enables the CPUfreq driver for i.MX CPUs.
2131
2132 config CPU_FREQ_SA1100
2133         bool
2134
2135 config CPU_FREQ_SA1110
2136         bool
2137
2138 config CPU_FREQ_INTEGRATOR
2139         tristate "CPUfreq driver for ARM Integrator CPUs"
2140         depends on ARCH_INTEGRATOR && CPU_FREQ
2141         default y
2142         help
2143           This enables the CPUfreq driver for ARM Integrator CPUs.
2144
2145           For details, take a look at <file:Documentation/cpu-freq>.
2146
2147           If in doubt, say Y.
2148
2149 config CPU_FREQ_PXA
2150         bool
2151         depends on CPU_FREQ && ARCH_PXA && PXA25x
2152         default y
2153         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2154         select CPU_FREQ_TABLE
2155
2156 config CPU_FREQ_S3C
2157         bool
2158         help
2159           Internal configuration node for common cpufreq on Samsung SoC
2160
2161 config CPU_FREQ_S3C24XX
2162         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2163         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2164         select CPU_FREQ_S3C
2165         help
2166           This enables the CPUfreq driver for the Samsung S3C24XX family
2167           of CPUs.
2168
2169           For details, take a look at <file:Documentation/cpu-freq>.
2170
2171           If in doubt, say N.
2172
2173 config CPU_FREQ_S3C24XX_PLL
2174         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2175         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2176         help
2177           Compile in support for changing the PLL frequency from the
2178           S3C24XX series CPUfreq driver. The PLL takes time to settle
2179           after a frequency change, so by default it is not enabled.
2180
2181           This also means that the PLL tables for the selected CPU(s) will
2182           be built which may increase the size of the kernel image.
2183
2184 config CPU_FREQ_S3C24XX_DEBUG
2185         bool "Debug CPUfreq Samsung driver core"
2186         depends on CPU_FREQ_S3C24XX
2187         help
2188           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2189
2190 config CPU_FREQ_S3C24XX_IODEBUG
2191         bool "Debug CPUfreq Samsung driver IO timing"
2192         depends on CPU_FREQ_S3C24XX
2193         help
2194           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2195
2196 config CPU_FREQ_S3C24XX_DEBUGFS
2197         bool "Export debugfs for CPUFreq"
2198         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2199         help
2200           Export status information via debugfs.
2201
2202 endif
2203
2204 source "drivers/cpuidle/Kconfig"
2205
2206 endmenu
2207
2208 menu "Floating point emulation"
2209
2210 comment "At least one emulation must be selected"
2211
2212 config FPE_NWFPE
2213         bool "NWFPE math emulation"
2214         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2215         ---help---
2216           Say Y to include the NWFPE floating point emulator in the kernel.
2217           This is necessary to run most binaries. Linux does not currently
2218           support floating point hardware so you need to say Y here even if
2219           your machine has an FPA or floating point co-processor podule.
2220
2221           You may say N here if you are going to load the Acorn FPEmulator
2222           early in the bootup.
2223
2224 config FPE_NWFPE_XP
2225         bool "Support extended precision"
2226         depends on FPE_NWFPE
2227         help
2228           Say Y to include 80-bit support in the kernel floating-point
2229           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2230           Note that gcc does not generate 80-bit operations by default,
2231           so in most cases this option only enlarges the size of the
2232           floating point emulator without any good reason.
2233
2234           You almost surely want to say N here.
2235
2236 config FPE_FASTFPE
2237         bool "FastFPE math emulation (EXPERIMENTAL)"
2238         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2239         ---help---
2240           Say Y here to include the FAST floating point emulator in the kernel.
2241           This is an experimental much faster emulator which now also has full
2242           precision for the mantissa.  It does not support any exceptions.
2243           It is very simple, and approximately 3-6 times faster than NWFPE.
2244
2245           It should be sufficient for most programs.  It may be not suitable
2246           for scientific calculations, but you have to check this for yourself.
2247           If you do not feel you need a faster FP emulation you should better
2248           choose NWFPE.
2249
2250 config VFP
2251         bool "VFP-format floating point maths"
2252         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2253         help
2254           Say Y to include VFP support code in the kernel. This is needed
2255           if your hardware includes a VFP unit.
2256
2257           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2258           release notes and additional status information.
2259
2260           Say N if your target does not have VFP hardware.
2261
2262 config VFPv3
2263         bool
2264         depends on VFP
2265         default y if CPU_V7
2266
2267 config NEON
2268         bool "Advanced SIMD (NEON) Extension support"
2269         depends on VFPv3 && CPU_V7
2270         help
2271           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2272           Extension.
2273
2274 endmenu
2275
2276 menu "Userspace binary formats"
2277
2278 source "fs/Kconfig.binfmt"
2279
2280 config ARTHUR
2281         tristate "RISC OS personality"
2282         depends on !AEABI
2283         help
2284           Say Y here to include the kernel code necessary if you want to run
2285           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2286           experimental; if this sounds frightening, say N and sleep in peace.
2287           You can also say M here to compile this support as a module (which
2288           will be called arthur).
2289
2290 endmenu
2291
2292 menu "Power management options"
2293
2294 source "kernel/power/Kconfig"
2295
2296 config ARCH_SUSPEND_POSSIBLE
2297         depends on !ARCH_S5PC100
2298         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2299                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2300         def_bool y
2301
2302 config ARM_CPU_SUSPEND
2303         def_bool PM_SLEEP
2304
2305 endmenu
2306
2307 source "net/Kconfig"
2308
2309 source "drivers/Kconfig"
2310
2311 source "fs/Kconfig"
2312
2313 source "arch/arm/Kconfig.debug"
2314
2315 source "security/Kconfig"
2316
2317 source "crypto/Kconfig"
2318
2319 source "lib/Kconfig"