2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
103 compatible = "simple-bus";
104 #address-cells = <1>;
107 ti,hwmods = "l3_main";
109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
113 prcm_clocks: clocks {
114 #address-cells = <1>;
118 prcm_clockdomains: clockdomains {
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
126 scrm_clocks: clocks {
127 #address-cells = <1>;
131 scrm_clockdomains: clockdomains {
135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc";
137 interrupt-controller;
138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>;
143 edma: edma@49000000 {
144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>,
148 interrupts = <12 13 14>;
151 ti,edma-regions = <4>;
152 ti,edma-slots = <256>;
155 gpio0: gpio@44e07000 {
156 compatible = "ti,omap4-gpio";
160 interrupt-controller;
161 #interrupt-cells = <2>;
162 reg = <0x44e07000 0x1000>;
166 gpio1: gpio@4804c000 {
167 compatible = "ti,omap4-gpio";
171 interrupt-controller;
172 #interrupt-cells = <2>;
173 reg = <0x4804c000 0x1000>;
177 gpio2: gpio@481ac000 {
178 compatible = "ti,omap4-gpio";
182 interrupt-controller;
183 #interrupt-cells = <2>;
184 reg = <0x481ac000 0x1000>;
188 gpio3: gpio@481ae000 {
189 compatible = "ti,omap4-gpio";
193 interrupt-controller;
194 #interrupt-cells = <2>;
195 reg = <0x481ae000 0x1000>;
199 uart0: serial@44e09000 {
200 compatible = "ti,omap3-uart";
202 clock-frequency = <48000000>;
203 reg = <0x44e09000 0x2000>;
208 uart1: serial@48022000 {
209 compatible = "ti,omap3-uart";
211 clock-frequency = <48000000>;
212 reg = <0x48022000 0x2000>;
217 uart2: serial@48024000 {
218 compatible = "ti,omap3-uart";
220 clock-frequency = <48000000>;
221 reg = <0x48024000 0x2000>;
226 uart3: serial@481a6000 {
227 compatible = "ti,omap3-uart";
229 clock-frequency = <48000000>;
230 reg = <0x481a6000 0x2000>;
235 uart4: serial@481a8000 {
236 compatible = "ti,omap3-uart";
238 clock-frequency = <48000000>;
239 reg = <0x481a8000 0x2000>;
244 uart5: serial@481aa000 {
245 compatible = "ti,omap3-uart";
247 clock-frequency = <48000000>;
248 reg = <0x481aa000 0x2000>;
254 compatible = "ti,omap4-i2c";
255 #address-cells = <1>;
258 reg = <0x44e0b000 0x1000>;
264 compatible = "ti,omap4-i2c";
265 #address-cells = <1>;
268 reg = <0x4802a000 0x1000>;
274 compatible = "ti,omap4-i2c";
275 #address-cells = <1>;
278 reg = <0x4819c000 0x1000>;
284 compatible = "ti,omap4-hsmmc";
287 ti,needs-special-reset;
288 ti,needs-special-hs-handling;
291 dma-names = "tx", "rx";
293 interrupt-parent = <&intc>;
294 reg = <0x48060000 0x1000>;
299 compatible = "ti,omap4-hsmmc";
301 ti,needs-special-reset;
304 dma-names = "tx", "rx";
306 interrupt-parent = <&intc>;
307 reg = <0x481d8000 0x1000>;
312 compatible = "ti,omap4-hsmmc";
314 ti,needs-special-reset;
316 interrupt-parent = <&intc>;
317 reg = <0x47810000 0x1000>;
321 hwspinlock: spinlock@480ca000 {
322 compatible = "ti,omap4-hwspinlock";
323 reg = <0x480ca000 0x1000>;
324 ti,hwmods = "spinlock";
329 compatible = "ti,omap3-wdt";
330 ti,hwmods = "wd_timer2";
331 reg = <0x44e35000 0x1000>;
335 dcan0: d_can@481cc000 {
336 compatible = "bosch,d_can";
337 ti,hwmods = "d_can0";
338 reg = <0x481cc000 0x2000
344 dcan1: d_can@481d0000 {
345 compatible = "bosch,d_can";
346 ti,hwmods = "d_can1";
347 reg = <0x481d0000 0x2000
353 timer1: timer@44e31000 {
354 compatible = "ti,am335x-timer-1ms";
355 reg = <0x44e31000 0x400>;
357 ti,hwmods = "timer1";
361 timer2: timer@48040000 {
362 compatible = "ti,am335x-timer";
363 reg = <0x48040000 0x400>;
365 ti,hwmods = "timer2";
368 timer3: timer@48042000 {
369 compatible = "ti,am335x-timer";
370 reg = <0x48042000 0x400>;
372 ti,hwmods = "timer3";
375 timer4: timer@48044000 {
376 compatible = "ti,am335x-timer";
377 reg = <0x48044000 0x400>;
379 ti,hwmods = "timer4";
383 timer5: timer@48046000 {
384 compatible = "ti,am335x-timer";
385 reg = <0x48046000 0x400>;
387 ti,hwmods = "timer5";
391 timer6: timer@48048000 {
392 compatible = "ti,am335x-timer";
393 reg = <0x48048000 0x400>;
395 ti,hwmods = "timer6";
399 timer7: timer@4804a000 {
400 compatible = "ti,am335x-timer";
401 reg = <0x4804a000 0x400>;
403 ti,hwmods = "timer7";
408 compatible = "ti,da830-rtc";
409 reg = <0x44e3e000 0x1000>;
416 compatible = "ti,omap4-mcspi";
417 #address-cells = <1>;
419 reg = <0x48030000 0x400>;
427 dma-names = "tx0", "rx0", "tx1", "rx1";
432 compatible = "ti,omap4-mcspi";
433 #address-cells = <1>;
435 reg = <0x481a0000 0x400>;
443 dma-names = "tx0", "rx0", "tx1", "rx1";
448 compatible = "ti,am33xx-usb";
449 reg = <0x47400000 0x1000>;
451 #address-cells = <1>;
453 ti,hwmods = "usb_otg_hs";
456 usb_ctrl_mod: control@44e10620 {
457 compatible = "ti,am335x-usb-ctrl-module";
458 reg = <0x44e10620 0x10
460 reg-names = "phy_ctrl", "wakeup";
464 usb0_phy: usb-phy@47401300 {
465 compatible = "ti,am335x-usb-phy";
466 reg = <0x47401300 0x100>;
469 ti,ctrl_mod = <&usb_ctrl_mod>;
473 compatible = "ti,musb-am33xx";
475 reg = <0x47401400 0x400
477 reg-names = "mc", "control";
480 interrupt-names = "mc";
482 mentor,multipoint = <1>;
483 mentor,num-eps = <16>;
484 mentor,ram-bits = <12>;
485 mentor,power = <500>;
488 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
489 &cppi41dma 2 0 &cppi41dma 3 0
490 &cppi41dma 4 0 &cppi41dma 5 0
491 &cppi41dma 6 0 &cppi41dma 7 0
492 &cppi41dma 8 0 &cppi41dma 9 0
493 &cppi41dma 10 0 &cppi41dma 11 0
494 &cppi41dma 12 0 &cppi41dma 13 0
495 &cppi41dma 14 0 &cppi41dma 0 1
496 &cppi41dma 1 1 &cppi41dma 2 1
497 &cppi41dma 3 1 &cppi41dma 4 1
498 &cppi41dma 5 1 &cppi41dma 6 1
499 &cppi41dma 7 1 &cppi41dma 8 1
500 &cppi41dma 9 1 &cppi41dma 10 1
501 &cppi41dma 11 1 &cppi41dma 12 1
502 &cppi41dma 13 1 &cppi41dma 14 1>;
504 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
505 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
507 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
508 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
512 usb1_phy: usb-phy@47401b00 {
513 compatible = "ti,am335x-usb-phy";
514 reg = <0x47401b00 0x100>;
517 ti,ctrl_mod = <&usb_ctrl_mod>;
521 compatible = "ti,musb-am33xx";
523 reg = <0x47401c00 0x400
525 reg-names = "mc", "control";
527 interrupt-names = "mc";
529 mentor,multipoint = <1>;
530 mentor,num-eps = <16>;
531 mentor,ram-bits = <12>;
532 mentor,power = <500>;
535 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
536 &cppi41dma 17 0 &cppi41dma 18 0
537 &cppi41dma 19 0 &cppi41dma 20 0
538 &cppi41dma 21 0 &cppi41dma 22 0
539 &cppi41dma 23 0 &cppi41dma 24 0
540 &cppi41dma 25 0 &cppi41dma 26 0
541 &cppi41dma 27 0 &cppi41dma 28 0
542 &cppi41dma 29 0 &cppi41dma 15 1
543 &cppi41dma 16 1 &cppi41dma 17 1
544 &cppi41dma 18 1 &cppi41dma 19 1
545 &cppi41dma 20 1 &cppi41dma 21 1
546 &cppi41dma 22 1 &cppi41dma 23 1
547 &cppi41dma 24 1 &cppi41dma 25 1
548 &cppi41dma 26 1 &cppi41dma 27 1
549 &cppi41dma 28 1 &cppi41dma 29 1>;
551 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
552 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
554 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
555 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
559 cppi41dma: dma-controller@47402000 {
560 compatible = "ti,am3359-cppi41";
561 reg = <0x47400000 0x1000
565 reg-names = "glue", "controller", "scheduler", "queuemgr";
567 interrupt-names = "glue";
569 #dma-channels = <30>;
570 #dma-requests = <256>;
575 epwmss0: epwmss@48300000 {
576 compatible = "ti,am33xx-pwmss";
577 reg = <0x48300000 0x10>;
578 ti,hwmods = "epwmss0";
579 #address-cells = <1>;
582 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
583 0x48300180 0x48300180 0x80 /* EQEP */
584 0x48300200 0x48300200 0x80>; /* EHRPWM */
586 ecap0: ecap@48300100 {
587 compatible = "ti,am33xx-ecap";
589 reg = <0x48300100 0x80>;
591 interrupt-names = "ecap0";
596 ehrpwm0: ehrpwm@48300200 {
597 compatible = "ti,am33xx-ehrpwm";
599 reg = <0x48300200 0x80>;
600 ti,hwmods = "ehrpwm0";
605 epwmss1: epwmss@48302000 {
606 compatible = "ti,am33xx-pwmss";
607 reg = <0x48302000 0x10>;
608 ti,hwmods = "epwmss1";
609 #address-cells = <1>;
612 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
613 0x48302180 0x48302180 0x80 /* EQEP */
614 0x48302200 0x48302200 0x80>; /* EHRPWM */
616 ecap1: ecap@48302100 {
617 compatible = "ti,am33xx-ecap";
619 reg = <0x48302100 0x80>;
621 interrupt-names = "ecap1";
626 ehrpwm1: ehrpwm@48302200 {
627 compatible = "ti,am33xx-ehrpwm";
629 reg = <0x48302200 0x80>;
630 ti,hwmods = "ehrpwm1";
635 epwmss2: epwmss@48304000 {
636 compatible = "ti,am33xx-pwmss";
637 reg = <0x48304000 0x10>;
638 ti,hwmods = "epwmss2";
639 #address-cells = <1>;
642 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
643 0x48304180 0x48304180 0x80 /* EQEP */
644 0x48304200 0x48304200 0x80>; /* EHRPWM */
646 ecap2: ecap@48304100 {
647 compatible = "ti,am33xx-ecap";
649 reg = <0x48304100 0x80>;
651 interrupt-names = "ecap2";
656 ehrpwm2: ehrpwm@48304200 {
657 compatible = "ti,am33xx-ehrpwm";
659 reg = <0x48304200 0x80>;
660 ti,hwmods = "ehrpwm2";
665 mac: ethernet@4a100000 {
666 compatible = "ti,cpsw";
667 ti,hwmods = "cpgmac0";
668 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
669 clock-names = "fck", "cpts";
670 cpdma_channels = <8>;
671 ale_entries = <1024>;
672 bd_ram_size = <0x2000>;
675 mac_control = <0x20>;
678 cpts_clock_mult = <0x80000000>;
679 cpts_clock_shift = <29>;
680 reg = <0x4a100000 0x800
682 #address-cells = <1>;
684 interrupt-parent = <&intc>;
691 interrupts = <40 41 42 43>;
694 davinci_mdio: mdio@4a101000 {
695 compatible = "ti,davinci_mdio";
696 #address-cells = <1>;
698 ti,hwmods = "davinci_mdio";
699 bus_freq = <1000000>;
700 reg = <0x4a101000 0x100>;
703 cpsw_emac0: slave@4a100200 {
704 /* Filled in by U-Boot */
705 mac-address = [ 00 00 00 00 00 00 ];
708 cpsw_emac1: slave@4a100300 {
709 /* Filled in by U-Boot */
710 mac-address = [ 00 00 00 00 00 00 ];
713 phy_sel: cpsw-phy-sel@44e10650 {
714 compatible = "ti,am3352-cpsw-phy-sel";
715 reg= <0x44e10650 0x4>;
716 reg-names = "gmii-sel";
720 ocmcram: ocmcram@40300000 {
721 compatible = "ti,am3352-ocmcram";
722 reg = <0x40300000 0x10000>;
723 ti,hwmods = "ocmcram";
726 wkup_m3: wkup_m3@44d00000 {
727 compatible = "ti,am3353-wkup-m3";
728 reg = <0x44d00000 0x4000 /* M3 UMEM */
729 0x44d80000 0x2000>; /* M3 DMEM */
730 ti,hwmods = "wkup_m3";
735 compatible = "ti,am3352-elm";
736 reg = <0x48080000 0x2000>;
742 lcdc: lcdc@4830e000 {
743 compatible = "ti,am33xx-tilcdc";
744 reg = <0x4830e000 0x1000>;
745 interrupt-parent = <&intc>;
751 tscadc: tscadc@44e0d000 {
752 compatible = "ti,am3359-tscadc";
753 reg = <0x44e0d000 0x1000>;
754 interrupt-parent = <&intc>;
756 ti,hwmods = "adc_tsc";
760 compatible = "ti,am3359-tsc";
763 #io-channel-cells = <1>;
764 compatible = "ti,am3359-adc";
768 gpmc: gpmc@50000000 {
769 compatible = "ti,am3352-gpmc";
772 reg = <0x50000000 0x2000>;
775 gpmc,num-waitpins = <2>;
776 #address-cells = <2>;
781 sham: sham@53100000 {
782 compatible = "ti,omap4-sham";
784 reg = <0x53100000 0x200>;
791 compatible = "ti,omap4-aes";
793 reg = <0x53500000 0xa0>;
797 dma-names = "tx", "rx";
800 mcasp0: mcasp@48038000 {
801 compatible = "ti,am33xx-mcasp-audio";
802 ti,hwmods = "mcasp0";
803 reg = <0x48038000 0x2000>,
804 <0x46000000 0x400000>;
805 reg-names = "mpu", "dat";
806 interrupts = <80>, <81>;
807 interrupt-names = "tx", "rx";
811 dma-names = "tx", "rx";
814 mcasp1: mcasp@4803C000 {
815 compatible = "ti,am33xx-mcasp-audio";
816 ti,hwmods = "mcasp1";
817 reg = <0x4803C000 0x2000>,
818 <0x46400000 0x400000>;
819 reg-names = "mpu", "dat";
820 interrupts = <82>, <83>;
821 interrupt-names = "tx", "rx";
825 dma-names = "tx", "rx";
829 compatible = "ti,omap4-rng";
831 reg = <0x48310000 0x2000>;
837 /include/ "am33xx-clocks.dtsi"