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Merge tag 'for-v4.3/omap-hwmod-prcm-a' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / boot / dts / am4372.dtsi
1 /*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13
14 #include "skeleton.dtsi"
15
16 / {
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
19
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33 cpu: cpu@0 {
34 compatible = "arm,cortex-a9";
35 device_type = "cpu";
36 reg = <0>;
37
38 clocks = <&dpll_mpu_ck>;
39 clock-names = "cpu";
40
41 clock-latency = <300000>; /* From omap-cpufreq driver */
42 };
43 };
44
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
47 interrupt-controller;
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
50 <0x48240100 0x0100>;
51 interrupt-parent = <&gic>;
52 };
53
54 wakeupgen: interrupt-controller@48281000 {
55 compatible = "ti,omap4-wugen-mpu";
56 interrupt-controller;
57 #interrupt-cells = <3>;
58 reg = <0x48281000 0x1000>;
59 interrupt-parent = <&gic>;
60 };
61
62 l2-cache-controller@48242000 {
63 compatible = "arm,pl310-cache";
64 reg = <0x48242000 0x1000>;
65 cache-unified;
66 cache-level = <2>;
67 };
68
69 ocp {
70 compatible = "ti,am4372-l3-noc", "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74 ti,hwmods = "l3_main";
75 reg = <0x44000000 0x400000
76 0x44800000 0x400000>;
77 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
78 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
79
80 l4_wkup: l4_wkup@44c00000 {
81 compatible = "ti,am4-l4-wkup", "simple-bus";
82 #address-cells = <1>;
83 #size-cells = <1>;
84 ranges = <0 0x44c00000 0x287000>;
85
86 prcm: prcm@1f0000 {
87 compatible = "ti,am4-prcm";
88 reg = <0x1f0000 0x11000>;
89 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
90
91 prcm_clocks: clocks {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 };
95
96 prcm_clockdomains: clockdomains {
97 };
98 };
99
100 scm: scm@210000 {
101 compatible = "ti,am4-scm", "simple-bus";
102 reg = <0x210000 0x4000>;
103 #address-cells = <1>;
104 #size-cells = <1>;
105 ranges = <0 0x210000 0x4000>;
106
107 am43xx_pinmux: pinmux@800 {
108 compatible = "ti,am437-padconf",
109 "pinctrl-single";
110 reg = <0x800 0x31c>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 #interrupt-cells = <1>;
114 interrupt-controller;
115 pinctrl-single,register-width = <32>;
116 pinctrl-single,function-mask = <0xffffffff>;
117 };
118
119 scm_conf: scm_conf@0 {
120 compatible = "syscon";
121 reg = <0x0 0x800>;
122 #address-cells = <1>;
123 #size-cells = <1>;
124
125 scm_clocks: clocks {
126 #address-cells = <1>;
127 #size-cells = <0>;
128 };
129 };
130
131 scm_clockdomains: clockdomains {
132 };
133 };
134 };
135
136 emif: emif@4c000000 {
137 compatible = "ti,emif-am4372";
138 reg = <0x4c000000 0x1000000>;
139 ti,hwmods = "emif";
140 };
141
142 edma: edma@49000000 {
143 compatible = "ti,edma3";
144 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
145 reg = <0x49000000 0x10000>,
146 <0x44e10f90 0x10>;
147 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
148 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
149 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
150 #dma-cells = <1>;
151 };
152
153 uart0: serial@44e09000 {
154 compatible = "ti,am4372-uart","ti,omap2-uart";
155 reg = <0x44e09000 0x2000>;
156 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
157 ti,hwmods = "uart1";
158 };
159
160 uart1: serial@48022000 {
161 compatible = "ti,am4372-uart","ti,omap2-uart";
162 reg = <0x48022000 0x2000>;
163 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
164 ti,hwmods = "uart2";
165 status = "disabled";
166 };
167
168 uart2: serial@48024000 {
169 compatible = "ti,am4372-uart","ti,omap2-uart";
170 reg = <0x48024000 0x2000>;
171 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
172 ti,hwmods = "uart3";
173 status = "disabled";
174 };
175
176 uart3: serial@481a6000 {
177 compatible = "ti,am4372-uart","ti,omap2-uart";
178 reg = <0x481a6000 0x2000>;
179 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
180 ti,hwmods = "uart4";
181 status = "disabled";
182 };
183
184 uart4: serial@481a8000 {
185 compatible = "ti,am4372-uart","ti,omap2-uart";
186 reg = <0x481a8000 0x2000>;
187 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
188 ti,hwmods = "uart5";
189 status = "disabled";
190 };
191
192 uart5: serial@481aa000 {
193 compatible = "ti,am4372-uart","ti,omap2-uart";
194 reg = <0x481aa000 0x2000>;
195 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
196 ti,hwmods = "uart6";
197 status = "disabled";
198 };
199
200 mailbox: mailbox@480C8000 {
201 compatible = "ti,omap4-mailbox";
202 reg = <0x480C8000 0x200>;
203 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
204 ti,hwmods = "mailbox";
205 #mbox-cells = <1>;
206 ti,mbox-num-users = <4>;
207 ti,mbox-num-fifos = <8>;
208 mbox_wkupm3: wkup_m3 {
209 ti,mbox-tx = <0 0 0>;
210 ti,mbox-rx = <0 0 3>;
211 };
212 };
213
214 timer1: timer@44e31000 {
215 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
216 reg = <0x44e31000 0x400>;
217 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
218 ti,timer-alwon;
219 ti,hwmods = "timer1";
220 };
221
222 timer2: timer@48040000 {
223 compatible = "ti,am4372-timer","ti,am335x-timer";
224 reg = <0x48040000 0x400>;
225 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
226 ti,hwmods = "timer2";
227 };
228
229 timer3: timer@48042000 {
230 compatible = "ti,am4372-timer","ti,am335x-timer";
231 reg = <0x48042000 0x400>;
232 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
233 ti,hwmods = "timer3";
234 status = "disabled";
235 };
236
237 timer4: timer@48044000 {
238 compatible = "ti,am4372-timer","ti,am335x-timer";
239 reg = <0x48044000 0x400>;
240 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
241 ti,timer-pwm;
242 ti,hwmods = "timer4";
243 status = "disabled";
244 };
245
246 timer5: timer@48046000 {
247 compatible = "ti,am4372-timer","ti,am335x-timer";
248 reg = <0x48046000 0x400>;
249 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
250 ti,timer-pwm;
251 ti,hwmods = "timer5";
252 status = "disabled";
253 };
254
255 timer6: timer@48048000 {
256 compatible = "ti,am4372-timer","ti,am335x-timer";
257 reg = <0x48048000 0x400>;
258 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
259 ti,timer-pwm;
260 ti,hwmods = "timer6";
261 status = "disabled";
262 };
263
264 timer7: timer@4804a000 {
265 compatible = "ti,am4372-timer","ti,am335x-timer";
266 reg = <0x4804a000 0x400>;
267 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
268 ti,timer-pwm;
269 ti,hwmods = "timer7";
270 status = "disabled";
271 };
272
273 timer8: timer@481c1000 {
274 compatible = "ti,am4372-timer","ti,am335x-timer";
275 reg = <0x481c1000 0x400>;
276 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
277 ti,hwmods = "timer8";
278 status = "disabled";
279 };
280
281 timer9: timer@4833d000 {
282 compatible = "ti,am4372-timer","ti,am335x-timer";
283 reg = <0x4833d000 0x400>;
284 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
285 ti,hwmods = "timer9";
286 status = "disabled";
287 };
288
289 timer10: timer@4833f000 {
290 compatible = "ti,am4372-timer","ti,am335x-timer";
291 reg = <0x4833f000 0x400>;
292 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
293 ti,hwmods = "timer10";
294 status = "disabled";
295 };
296
297 timer11: timer@48341000 {
298 compatible = "ti,am4372-timer","ti,am335x-timer";
299 reg = <0x48341000 0x400>;
300 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
301 ti,hwmods = "timer11";
302 status = "disabled";
303 };
304
305 counter32k: counter@44e86000 {
306 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
307 reg = <0x44e86000 0x40>;
308 ti,hwmods = "counter_32k";
309 };
310
311 rtc: rtc@44e3e000 {
312 compatible = "ti,am4372-rtc","ti,da830-rtc";
313 reg = <0x44e3e000 0x1000>;
314 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
316 ti,hwmods = "rtc";
317 status = "disabled";
318 };
319
320 wdt: wdt@44e35000 {
321 compatible = "ti,am4372-wdt","ti,omap3-wdt";
322 reg = <0x44e35000 0x1000>;
323 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
324 ti,hwmods = "wd_timer2";
325 };
326
327 gpio0: gpio@44e07000 {
328 compatible = "ti,am4372-gpio","ti,omap4-gpio";
329 reg = <0x44e07000 0x1000>;
330 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
331 gpio-controller;
332 #gpio-cells = <2>;
333 interrupt-controller;
334 #interrupt-cells = <2>;
335 ti,hwmods = "gpio1";
336 status = "disabled";
337 };
338
339 gpio1: gpio@4804c000 {
340 compatible = "ti,am4372-gpio","ti,omap4-gpio";
341 reg = <0x4804c000 0x1000>;
342 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
343 gpio-controller;
344 #gpio-cells = <2>;
345 interrupt-controller;
346 #interrupt-cells = <2>;
347 ti,hwmods = "gpio2";
348 status = "disabled";
349 };
350
351 gpio2: gpio@481ac000 {
352 compatible = "ti,am4372-gpio","ti,omap4-gpio";
353 reg = <0x481ac000 0x1000>;
354 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
355 gpio-controller;
356 #gpio-cells = <2>;
357 interrupt-controller;
358 #interrupt-cells = <2>;
359 ti,hwmods = "gpio3";
360 status = "disabled";
361 };
362
363 gpio3: gpio@481ae000 {
364 compatible = "ti,am4372-gpio","ti,omap4-gpio";
365 reg = <0x481ae000 0x1000>;
366 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
367 gpio-controller;
368 #gpio-cells = <2>;
369 interrupt-controller;
370 #interrupt-cells = <2>;
371 ti,hwmods = "gpio4";
372 status = "disabled";
373 };
374
375 gpio4: gpio@48320000 {
376 compatible = "ti,am4372-gpio","ti,omap4-gpio";
377 reg = <0x48320000 0x1000>;
378 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
379 gpio-controller;
380 #gpio-cells = <2>;
381 interrupt-controller;
382 #interrupt-cells = <2>;
383 ti,hwmods = "gpio5";
384 status = "disabled";
385 };
386
387 gpio5: gpio@48322000 {
388 compatible = "ti,am4372-gpio","ti,omap4-gpio";
389 reg = <0x48322000 0x1000>;
390 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
391 gpio-controller;
392 #gpio-cells = <2>;
393 interrupt-controller;
394 #interrupt-cells = <2>;
395 ti,hwmods = "gpio6";
396 status = "disabled";
397 };
398
399 hwspinlock: spinlock@480ca000 {
400 compatible = "ti,omap4-hwspinlock";
401 reg = <0x480ca000 0x1000>;
402 ti,hwmods = "spinlock";
403 #hwlock-cells = <1>;
404 };
405
406 i2c0: i2c@44e0b000 {
407 compatible = "ti,am4372-i2c","ti,omap4-i2c";
408 reg = <0x44e0b000 0x1000>;
409 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
410 ti,hwmods = "i2c1";
411 #address-cells = <1>;
412 #size-cells = <0>;
413 status = "disabled";
414 };
415
416 i2c1: i2c@4802a000 {
417 compatible = "ti,am4372-i2c","ti,omap4-i2c";
418 reg = <0x4802a000 0x1000>;
419 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
420 ti,hwmods = "i2c2";
421 #address-cells = <1>;
422 #size-cells = <0>;
423 status = "disabled";
424 };
425
426 i2c2: i2c@4819c000 {
427 compatible = "ti,am4372-i2c","ti,omap4-i2c";
428 reg = <0x4819c000 0x1000>;
429 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
430 ti,hwmods = "i2c3";
431 #address-cells = <1>;
432 #size-cells = <0>;
433 status = "disabled";
434 };
435
436 spi0: spi@48030000 {
437 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
438 reg = <0x48030000 0x400>;
439 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
440 ti,hwmods = "spi0";
441 #address-cells = <1>;
442 #size-cells = <0>;
443 status = "disabled";
444 };
445
446 mmc1: mmc@48060000 {
447 compatible = "ti,omap4-hsmmc";
448 reg = <0x48060000 0x1000>;
449 ti,hwmods = "mmc1";
450 ti,dual-volt;
451 ti,needs-special-reset;
452 dmas = <&edma 24
453 &edma 25>;
454 dma-names = "tx", "rx";
455 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
456 status = "disabled";
457 };
458
459 mmc2: mmc@481d8000 {
460 compatible = "ti,omap4-hsmmc";
461 reg = <0x481d8000 0x1000>;
462 ti,hwmods = "mmc2";
463 ti,needs-special-reset;
464 dmas = <&edma 2
465 &edma 3>;
466 dma-names = "tx", "rx";
467 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
468 status = "disabled";
469 };
470
471 mmc3: mmc@47810000 {
472 compatible = "ti,omap4-hsmmc";
473 reg = <0x47810000 0x1000>;
474 ti,hwmods = "mmc3";
475 ti,needs-special-reset;
476 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
477 status = "disabled";
478 };
479
480 spi1: spi@481a0000 {
481 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
482 reg = <0x481a0000 0x400>;
483 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
484 ti,hwmods = "spi1";
485 #address-cells = <1>;
486 #size-cells = <0>;
487 status = "disabled";
488 };
489
490 spi2: spi@481a2000 {
491 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
492 reg = <0x481a2000 0x400>;
493 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
494 ti,hwmods = "spi2";
495 #address-cells = <1>;
496 #size-cells = <0>;
497 status = "disabled";
498 };
499
500 spi3: spi@481a4000 {
501 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
502 reg = <0x481a4000 0x400>;
503 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
504 ti,hwmods = "spi3";
505 #address-cells = <1>;
506 #size-cells = <0>;
507 status = "disabled";
508 };
509
510 spi4: spi@48345000 {
511 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
512 reg = <0x48345000 0x400>;
513 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
514 ti,hwmods = "spi4";
515 #address-cells = <1>;
516 #size-cells = <0>;
517 status = "disabled";
518 };
519
520 mac: ethernet@4a100000 {
521 compatible = "ti,am4372-cpsw","ti,cpsw";
522 reg = <0x4a100000 0x800
523 0x4a101200 0x100>;
524 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
525 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
526 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
527 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
528 #address-cells = <1>;
529 #size-cells = <1>;
530 ti,hwmods = "cpgmac0";
531 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
532 clock-names = "fck", "cpts";
533 status = "disabled";
534 cpdma_channels = <8>;
535 ale_entries = <1024>;
536 bd_ram_size = <0x2000>;
537 no_bd_ram = <0>;
538 rx_descs = <64>;
539 mac_control = <0x20>;
540 slaves = <2>;
541 active_slave = <0>;
542 cpts_clock_mult = <0x80000000>;
543 cpts_clock_shift = <29>;
544 ranges;
545
546 davinci_mdio: mdio@4a101000 {
547 compatible = "ti,am4372-mdio","ti,davinci_mdio";
548 reg = <0x4a101000 0x100>;
549 #address-cells = <1>;
550 #size-cells = <0>;
551 ti,hwmods = "davinci_mdio";
552 bus_freq = <1000000>;
553 status = "disabled";
554 };
555
556 cpsw_emac0: slave@4a100200 {
557 /* Filled in by U-Boot */
558 mac-address = [ 00 00 00 00 00 00 ];
559 };
560
561 cpsw_emac1: slave@4a100300 {
562 /* Filled in by U-Boot */
563 mac-address = [ 00 00 00 00 00 00 ];
564 };
565
566 phy_sel: cpsw-phy-sel@44e10650 {
567 compatible = "ti,am43xx-cpsw-phy-sel";
568 reg= <0x44e10650 0x4>;
569 reg-names = "gmii-sel";
570 };
571 };
572
573 epwmss0: epwmss@48300000 {
574 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
575 reg = <0x48300000 0x10>;
576 #address-cells = <1>;
577 #size-cells = <1>;
578 ranges;
579 ti,hwmods = "epwmss0";
580 status = "disabled";
581
582 ecap0: ecap@48300100 {
583 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
584 #pwm-cells = <3>;
585 reg = <0x48300100 0x80>;
586 ti,hwmods = "ecap0";
587 status = "disabled";
588 };
589
590 ehrpwm0: ehrpwm@48300200 {
591 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
592 #pwm-cells = <3>;
593 reg = <0x48300200 0x80>;
594 ti,hwmods = "ehrpwm0";
595 status = "disabled";
596 };
597 };
598
599 epwmss1: epwmss@48302000 {
600 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
601 reg = <0x48302000 0x10>;
602 #address-cells = <1>;
603 #size-cells = <1>;
604 ranges;
605 ti,hwmods = "epwmss1";
606 status = "disabled";
607
608 ecap1: ecap@48302100 {
609 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
610 #pwm-cells = <3>;
611 reg = <0x48302100 0x80>;
612 ti,hwmods = "ecap1";
613 status = "disabled";
614 };
615
616 ehrpwm1: ehrpwm@48302200 {
617 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
618 #pwm-cells = <3>;
619 reg = <0x48302200 0x80>;
620 ti,hwmods = "ehrpwm1";
621 status = "disabled";
622 };
623 };
624
625 epwmss2: epwmss@48304000 {
626 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
627 reg = <0x48304000 0x10>;
628 #address-cells = <1>;
629 #size-cells = <1>;
630 ranges;
631 ti,hwmods = "epwmss2";
632 status = "disabled";
633
634 ecap2: ecap@48304100 {
635 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
636 #pwm-cells = <3>;
637 reg = <0x48304100 0x80>;
638 ti,hwmods = "ecap2";
639 status = "disabled";
640 };
641
642 ehrpwm2: ehrpwm@48304200 {
643 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
644 #pwm-cells = <3>;
645 reg = <0x48304200 0x80>;
646 ti,hwmods = "ehrpwm2";
647 status = "disabled";
648 };
649 };
650
651 epwmss3: epwmss@48306000 {
652 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
653 reg = <0x48306000 0x10>;
654 #address-cells = <1>;
655 #size-cells = <1>;
656 ranges;
657 ti,hwmods = "epwmss3";
658 status = "disabled";
659
660 ehrpwm3: ehrpwm@48306200 {
661 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
662 #pwm-cells = <3>;
663 reg = <0x48306200 0x80>;
664 ti,hwmods = "ehrpwm3";
665 status = "disabled";
666 };
667 };
668
669 epwmss4: epwmss@48308000 {
670 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
671 reg = <0x48308000 0x10>;
672 #address-cells = <1>;
673 #size-cells = <1>;
674 ranges;
675 ti,hwmods = "epwmss4";
676 status = "disabled";
677
678 ehrpwm4: ehrpwm@48308200 {
679 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
680 #pwm-cells = <3>;
681 reg = <0x48308200 0x80>;
682 ti,hwmods = "ehrpwm4";
683 status = "disabled";
684 };
685 };
686
687 epwmss5: epwmss@4830a000 {
688 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
689 reg = <0x4830a000 0x10>;
690 #address-cells = <1>;
691 #size-cells = <1>;
692 ranges;
693 ti,hwmods = "epwmss5";
694 status = "disabled";
695
696 ehrpwm5: ehrpwm@4830a200 {
697 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
698 #pwm-cells = <3>;
699 reg = <0x4830a200 0x80>;
700 ti,hwmods = "ehrpwm5";
701 status = "disabled";
702 };
703 };
704
705 tscadc: tscadc@44e0d000 {
706 compatible = "ti,am3359-tscadc";
707 reg = <0x44e0d000 0x1000>;
708 ti,hwmods = "adc_tsc";
709 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
710 clocks = <&adc_tsc_fck>;
711 clock-names = "fck";
712 status = "disabled";
713
714 tsc {
715 compatible = "ti,am3359-tsc";
716 };
717
718 adc {
719 #io-channel-cells = <1>;
720 compatible = "ti,am3359-adc";
721 };
722
723 };
724
725 sham: sham@53100000 {
726 compatible = "ti,omap5-sham";
727 ti,hwmods = "sham";
728 reg = <0x53100000 0x300>;
729 dmas = <&edma 36>;
730 dma-names = "rx";
731 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
732 };
733
734 aes: aes@53501000 {
735 compatible = "ti,omap4-aes";
736 ti,hwmods = "aes";
737 reg = <0x53501000 0xa0>;
738 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
739 dmas = <&edma 6
740 &edma 5>;
741 dma-names = "tx", "rx";
742 };
743
744 des: des@53701000 {
745 compatible = "ti,omap4-des";
746 ti,hwmods = "des";
747 reg = <0x53701000 0xa0>;
748 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
749 dmas = <&edma 34
750 &edma 33>;
751 dma-names = "tx", "rx";
752 };
753
754 mcasp0: mcasp@48038000 {
755 compatible = "ti,am33xx-mcasp-audio";
756 ti,hwmods = "mcasp0";
757 reg = <0x48038000 0x2000>,
758 <0x46000000 0x400000>;
759 reg-names = "mpu", "dat";
760 interrupts = <80>, <81>;
761 interrupt-names = "tx", "rx";
762 status = "disabled";
763 dmas = <&edma 8>,
764 <&edma 9>;
765 dma-names = "tx", "rx";
766 };
767
768 mcasp1: mcasp@4803C000 {
769 compatible = "ti,am33xx-mcasp-audio";
770 ti,hwmods = "mcasp1";
771 reg = <0x4803C000 0x2000>,
772 <0x46400000 0x400000>;
773 reg-names = "mpu", "dat";
774 interrupts = <82>, <83>;
775 interrupt-names = "tx", "rx";
776 status = "disabled";
777 dmas = <&edma 10>,
778 <&edma 11>;
779 dma-names = "tx", "rx";
780 };
781
782 elm: elm@48080000 {
783 compatible = "ti,am3352-elm";
784 reg = <0x48080000 0x2000>;
785 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
786 ti,hwmods = "elm";
787 clocks = <&l4ls_gclk>;
788 clock-names = "fck";
789 status = "disabled";
790 };
791
792 gpmc: gpmc@50000000 {
793 compatible = "ti,am3352-gpmc";
794 ti,hwmods = "gpmc";
795 clocks = <&l3s_gclk>;
796 clock-names = "fck";
797 reg = <0x50000000 0x2000>;
798 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
799 gpmc,num-cs = <7>;
800 gpmc,num-waitpins = <2>;
801 #address-cells = <2>;
802 #size-cells = <1>;
803 status = "disabled";
804 };
805
806 am43xx_control_usb2phy1: control-phy@44e10620 {
807 compatible = "ti,control-phy-usb2-am437";
808 reg = <0x44e10620 0x4>;
809 reg-names = "power";
810 };
811
812 am43xx_control_usb2phy2: control-phy@0x44e10628 {
813 compatible = "ti,control-phy-usb2-am437";
814 reg = <0x44e10628 0x4>;
815 reg-names = "power";
816 };
817
818 ocp2scp0: ocp2scp@483a8000 {
819 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
820 #address-cells = <1>;
821 #size-cells = <1>;
822 ranges;
823 ti,hwmods = "ocp2scp0";
824
825 usb2_phy1: phy@483a8000 {
826 compatible = "ti,am437x-usb2";
827 reg = <0x483a8000 0x8000>;
828 ctrl-module = <&am43xx_control_usb2phy1>;
829 clocks = <&usb_phy0_always_on_clk32k>,
830 <&usb_otg_ss0_refclk960m>;
831 clock-names = "wkupclk", "refclk";
832 #phy-cells = <0>;
833 status = "disabled";
834 };
835 };
836
837 ocp2scp1: ocp2scp@483e8000 {
838 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
839 #address-cells = <1>;
840 #size-cells = <1>;
841 ranges;
842 ti,hwmods = "ocp2scp1";
843
844 usb2_phy2: phy@483e8000 {
845 compatible = "ti,am437x-usb2";
846 reg = <0x483e8000 0x8000>;
847 ctrl-module = <&am43xx_control_usb2phy2>;
848 clocks = <&usb_phy1_always_on_clk32k>,
849 <&usb_otg_ss1_refclk960m>;
850 clock-names = "wkupclk", "refclk";
851 #phy-cells = <0>;
852 status = "disabled";
853 };
854 };
855
856 dwc3_1: omap_dwc3@48380000 {
857 compatible = "ti,am437x-dwc3";
858 ti,hwmods = "usb_otg_ss0";
859 reg = <0x48380000 0x10000>;
860 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
861 #address-cells = <1>;
862 #size-cells = <1>;
863 utmi-mode = <1>;
864 ranges;
865
866 usb1: usb@48390000 {
867 compatible = "synopsys,dwc3";
868 reg = <0x48390000 0x10000>;
869 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
870 phys = <&usb2_phy1>;
871 phy-names = "usb2-phy";
872 maximum-speed = "high-speed";
873 dr_mode = "otg";
874 status = "disabled";
875 snps,dis_u3_susphy_quirk;
876 snps,dis_u2_susphy_quirk;
877 };
878 };
879
880 dwc3_2: omap_dwc3@483c0000 {
881 compatible = "ti,am437x-dwc3";
882 ti,hwmods = "usb_otg_ss1";
883 reg = <0x483c0000 0x10000>;
884 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
885 #address-cells = <1>;
886 #size-cells = <1>;
887 utmi-mode = <1>;
888 ranges;
889
890 usb2: usb@483d0000 {
891 compatible = "synopsys,dwc3";
892 reg = <0x483d0000 0x10000>;
893 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
894 phys = <&usb2_phy2>;
895 phy-names = "usb2-phy";
896 maximum-speed = "high-speed";
897 dr_mode = "otg";
898 status = "disabled";
899 snps,dis_u3_susphy_quirk;
900 snps,dis_u2_susphy_quirk;
901 };
902 };
903
904 qspi: qspi@47900000 {
905 compatible = "ti,am4372-qspi";
906 reg = <0x47900000 0x100>;
907 #address-cells = <1>;
908 #size-cells = <0>;
909 ti,hwmods = "qspi";
910 interrupts = <0 138 0x4>;
911 num-cs = <4>;
912 status = "disabled";
913 };
914
915 hdq: hdq@48347000 {
916 compatible = "ti,am4372-hdq";
917 reg = <0x48347000 0x1000>;
918 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
919 clocks = <&func_12m_clk>;
920 clock-names = "fck";
921 ti,hwmods = "hdq1w";
922 status = "disabled";
923 };
924
925 dss: dss@4832a000 {
926 compatible = "ti,omap3-dss";
927 reg = <0x4832a000 0x200>;
928 status = "disabled";
929 ti,hwmods = "dss_core";
930 clocks = <&disp_clk>;
931 clock-names = "fck";
932 #address-cells = <1>;
933 #size-cells = <1>;
934 ranges;
935
936 dispc: dispc@4832a400 {
937 compatible = "ti,omap3-dispc";
938 reg = <0x4832a400 0x400>;
939 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
940 ti,hwmods = "dss_dispc";
941 clocks = <&disp_clk>;
942 clock-names = "fck";
943 };
944
945 rfbi: rfbi@4832a800 {
946 compatible = "ti,omap3-rfbi";
947 reg = <0x4832a800 0x100>;
948 ti,hwmods = "dss_rfbi";
949 clocks = <&disp_clk>;
950 clock-names = "fck";
951 status = "disabled";
952 };
953 };
954
955 ocmcram: ocmcram@40300000 {
956 compatible = "mmio-sram";
957 reg = <0x40300000 0x40000>; /* 256k */
958 };
959
960 dcan0: can@481cc000 {
961 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
962 ti,hwmods = "d_can0";
963 clocks = <&dcan0_fck>;
964 clock-names = "fck";
965 reg = <0x481cc000 0x2000>;
966 syscon-raminit = <&scm_conf 0x644 0>;
967 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
968 status = "disabled";
969 };
970
971 dcan1: can@481d0000 {
972 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
973 ti,hwmods = "d_can1";
974 clocks = <&dcan1_fck>;
975 clock-names = "fck";
976 reg = <0x481d0000 0x2000>;
977 syscon-raminit = <&scm_conf 0x644 1>;
978 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
979 status = "disabled";
980 };
981
982 vpfe0: vpfe@48326000 {
983 compatible = "ti,am437x-vpfe";
984 reg = <0x48326000 0x2000>;
985 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
986 ti,hwmods = "vpfe0";
987 status = "disabled";
988 };
989
990 vpfe1: vpfe@48328000 {
991 compatible = "ti,am437x-vpfe";
992 reg = <0x48328000 0x2000>;
993 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
994 ti,hwmods = "vpfe1";
995 status = "disabled";
996 };
997 };
998 };
999
1000 /include/ "am43xx-clocks.dtsi"
Linux kernel - Deliverables
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