arch/arm/boot/dts/armada-370-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License as
  18  *     published by the Free Software Foundation; either version 2 of the
  19  *     License, or (at your option) any later version.
  20  *
  21  *     This file is distributed in the hope that it will be useful
  22  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  *     GNU General Public License for more details.
  25  *
  26  * Or, alternatively
  27  *
  28  *  b) Permission is hereby granted, free of charge, to any person
  29  *     obtaining a copy of this software and associated documentation
  30  *     files (the "Software"), to deal in the Software without
  31  *     restriction, including without limitation the rights to use
  32  *     copy, modify, merge, publish, distribute, sublicense, and/or
  33  *     sell copies of the Software, and to permit persons to whom the
  34  *     Software is furnished to do so, subject to the following
  35  *     conditions:
  36  *
  37  *     The above copyright notice and this permission notice shall be
  38  *     included in all copies or substantial portions of the Software.
  39  *
  40  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  41  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  42  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  43  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  44  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  45  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  46  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  47  *     OTHER DEALINGS IN THE SOFTWARE.
  48  *
  49  * This file contains the definitions that are common to the Armada
  50  * 370 and Armada XP SoC.
  51  */
  52
  53 /include/ "skeleton64.dtsi"
  54
  55 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  56
  57 / {
  58         model = "Marvell Armada 370 and XP SoC";
  59         compatible = "marvell,armada-370-xp";
  60
  61         aliases {
  62                 eth0 = &eth0;
  63                 eth1 = &eth1;
  64         };
  65
  66         cpus {
  67                 #address-cells = <1>;
  68                 #size-cells = <0>;
  69                 cpu@0 {
  70                         compatible = "marvell,sheeva-v7";
  71                         device_type = "cpu";
  72                         reg = <0>;
  73                 };
  74         };
  75
  76         soc {
  77                 #address-cells = <2>;
  78                 #size-cells = <1>;
  79                 controller = <&mbusc>;
  80                 interrupt-parent = <&mpic>;
  81                 pcie-mem-aperture = <0xf8000000 0x7e00000>;
  82                 pcie-io-aperture  = <0xffe00000 0x100000>;
  83
  84                 devbus-bootcs {
  85                         compatible = "marvell,mvebu-devbus";
  86                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  87                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         clocks = <&coreclk 0>;
  91                         status = "disabled";
  92                 };
  93
  94                 devbus-cs0 {
  95                         compatible = "marvell,mvebu-devbus";
  96                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  97                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  98                         #address-cells = <1>;
  99                         #size-cells = <1>;
 100                         clocks = <&coreclk 0>;
 101                         status = "disabled";
 102                 };
 103
 104                 devbus-cs1 {
 105                         compatible = "marvell,mvebu-devbus";
 106                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
 107                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
 108                         #address-cells = <1>;
 109                         #size-cells = <1>;
 110                         clocks = <&coreclk 0>;
 111                         status = "disabled";
 112                 };
 113
 114                 devbus-cs2 {
 115                         compatible = "marvell,mvebu-devbus";
 116                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
 117                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
 118                         #address-cells = <1>;
 119                         #size-cells = <1>;
 120                         clocks = <&coreclk 0>;
 121                         status = "disabled";
 122                 };
 123
 124                 devbus-cs3 {
 125                         compatible = "marvell,mvebu-devbus";
 126                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
 127                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
 128                         #address-cells = <1>;
 129                         #size-cells = <1>;
 130                         clocks = <&coreclk 0>;
 131                         status = "disabled";
 132                 };
 133
 134                 internal-regs {
 135                         compatible = "simple-bus";
 136                         #address-cells = <1>;
 137                         #size-cells = <1>;
 138                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 139
 140                         rtc@10300 {
 141                                 compatible = "marvell,orion-rtc";
 142                                 reg = <0x10300 0x20>;
 143                                 interrupts = <50>;
 144                         };
 145
 146                         spi0: spi@10600 {
 147                                 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
 148                                 reg = <0x10600 0x28>;
 149                                 #address-cells = <1>;
 150                                 #size-cells = <0>;
 151                                 cell-index = <0>;
 152                                 interrupts = <30>;
 153                                 clocks = <&coreclk 0>;
 154                                 status = "disabled";
 155                         };
 156
 157                         spi1: spi@10680 {
 158                                 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
 159                                 reg = <0x10680 0x28>;
 160                                 #address-cells = <1>;
 161                                 #size-cells = <0>;
 162                                 cell-index = <1>;
 163                                 interrupts = <92>;
 164                                 clocks = <&coreclk 0>;
 165                                 status = "disabled";
 166                         };
 167
 168                         i2c0: i2c@11000 {
 169                                 compatible = "marvell,mv64xxx-i2c";
 170                                 #address-cells = <1>;
 171                                 #size-cells = <0>;
 172                                 interrupts = <31>;
 173                                 timeout-ms = <1000>;
 174                                 clocks = <&coreclk 0>;
 175                                 status = "disabled";
 176                         };
 177
 178                         i2c1: i2c@11100 {
 179                                 compatible = "marvell,mv64xxx-i2c";
 180                                 #address-cells = <1>;
 181                                 #size-cells = <0>;
 182                                 interrupts = <32>;
 183                                 timeout-ms = <1000>;
 184                                 clocks = <&coreclk 0>;
 185                                 status = "disabled";
 186                         };
 187
 188                         uart0: serial@12000 {
 189                                 compatible = "snps,dw-apb-uart";
 190                                 reg = <0x12000 0x100>;
 191                                 reg-shift = <2>;
 192                                 interrupts = <41>;
 193                                 reg-io-width = <1>;
 194                                 clocks = <&coreclk 0>;
 195                                 status = "disabled";
 196                         };
 197
 198                         uart1: serial@12100 {
 199                                 compatible = "snps,dw-apb-uart";
 200                                 reg = <0x12100 0x100>;
 201                                 reg-shift = <2>;
 202                                 interrupts = <42>;
 203                                 reg-io-width = <1>;
 204                                 clocks = <&coreclk 0>;
 205                                 status = "disabled";
 206                         };
 207
 208                         pinctrl: pin-ctrl@18000 {
 209                                 reg = <0x18000 0x38>;
 210                         };
 211
 212                         coredivclk: corediv-clock@18740 {
 213                                 compatible = "marvell,armada-370-corediv-clock";
 214                                 reg = <0x18740 0xc>;
 215                                 #clock-cells = <1>;
 216                                 clocks = <&mainpll>;
 217                                 clock-output-names = "nand";
 218                         };
 219
 220                         mbusc: mbus-controller@20000 {
 221                                 compatible = "marvell,mbus-controller";
 222                                 reg = <0x20000 0x100>, <0x20180 0x20>,
 223                                       <0x20250 0x8>;
 224                         };
 225
 226                         mpic: interrupt-controller@20000 {
 227                                 compatible = "marvell,mpic";
 228                                 #interrupt-cells = <1>;
 229                                 #size-cells = <1>;
 230                                 interrupt-controller;
 231                                 msi-controller;
 232                         };
 233
 234                         coherency-fabric@20200 {
 235                                 compatible = "marvell,coherency-fabric";
 236                                 reg = <0x20200 0xb0>, <0x21010 0x1c>;
 237                         };
 238
 239                         timer@20300 {
 240                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 241                                 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
 242                         };
 243
 244                         watchdog@20300 {
 245                                 reg = <0x20300 0x34>, <0x20704 0x4>;
 246                         };
 247
 248                         pmsu@22000 {
 249                                 compatible = "marvell,armada-370-pmsu";
 250                                 reg = <0x22000 0x1000>;
 251                         };
 252
 253                         usb@50000 {
 254                                 compatible = "marvell,orion-ehci";
 255                                 reg = <0x50000 0x500>;
 256                                 interrupts = <45>;
 257                                 status = "disabled";
 258                         };
 259
 260                         usb@51000 {
 261                                 compatible = "marvell,orion-ehci";
 262                                 reg = <0x51000 0x500>;
 263                                 interrupts = <46>;
 264                                 status = "disabled";
 265                         };
 266
 267                         eth0: ethernet@70000 {
 268                                 compatible = "marvell,armada-370-neta";
 269                                 reg = <0x70000 0x4000>;
 270                                 interrupts = <8>;
 271                                 clocks = <&gateclk 4>;
 272                                 status = "disabled";
 273                         };
 274
 275                         mdio: mdio {
 276                                 #address-cells = <1>;
 277                                 #size-cells = <0>;
 278                                 compatible = "marvell,orion-mdio";
 279                                 reg = <0x72004 0x4>;
 280                                 clocks = <&gateclk 4>;
 281                         };
 282
 283                         eth1: ethernet@74000 {
 284                                 compatible = "marvell,armada-370-neta";
 285                                 reg = <0x74000 0x4000>;
 286                                 interrupts = <10>;
 287                                 clocks = <&gateclk 3>;
 288                                 status = "disabled";
 289                         };
 290
 291                         sata@a0000 {
 292                                 compatible = "marvell,armada-370-sata";
 293                                 reg = <0xa0000 0x5000>;
 294                                 interrupts = <55>;
 295                                 clocks = <&gateclk 15>, <&gateclk 30>;
 296                                 clock-names = "0", "1";
 297                                 status = "disabled";
 298                         };
 299
 300                         nand@d0000 {
 301                                 compatible = "marvell,armada370-nand";
 302                                 reg = <0xd0000 0x54>;
 303                                 #address-cells = <1>;
 304                                 #size-cells = <1>;
 305                                 interrupts = <113>;
 306                                 clocks = <&coredivclk 0>;
 307                                 status = "disabled";
 308                         };
 309
 310                         mvsdio@d4000 {
 311                                 compatible = "marvell,orion-sdio";
 312                                 reg = <0xd4000 0x200>;
 313                                 interrupts = <54>;
 314                                 clocks = <&gateclk 17>;
 315                                 bus-width = <4>;
 316                                 cap-sdio-irq;
 317                                 cap-sd-highspeed;
 318                                 cap-mmc-highspeed;
 319                                 status = "disabled";
 320                         };
 321                 };
 322         };
 323
 324         clocks {
 325                 /* 2 GHz fixed main PLL */
 326                 mainpll: mainpll {
 327                         compatible = "fixed-clock";
 328                         #clock-cells = <0>;
 329                         clock-frequency = <2000000000>;
 330                 };
 331         };
 332  };