Merge remote-tracking branch 'asoc/fix/omap' into asoc-linus
[deliverable/linux.git] / arch / arm / boot / dts / armada-388-db.dts
1 /*
2 * Device Tree file for Marvell Armada 388 evaluation board
3 * (DB-88F6820)
4 *
5 * Copyright (C) 2014 Marvell
6 *
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 *
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
12 * whole.
13 *
14 * a) This file is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of the
17 * License, or (at your option) any later version.
18 *
19 * This file is distributed in the hope that it will be useful
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * Or, alternatively
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48 /dts-v1/;
49 #include "armada-388.dtsi"
50
51 / {
52 model = "Marvell Armada 385 Development Board";
53 compatible = "marvell,a385-db", "marvell,armada388",
54 "marvell,armada385", "marvell,armada380";
55
56 chosen {
57 bootargs = "console=ttyS0,115200 earlyprintk";
58 };
59
60 memory {
61 device_type = "memory";
62 reg = <0x00000000 0x10000000>; /* 256 MB */
63 };
64
65 soc {
66 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
67 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
68
69 internal-regs {
70 spi@10600 {
71 status = "okay";
72
73 spi-flash@0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "w25q32";
77 reg = <0>; /* Chip select 0 */
78 spi-max-frequency = <108000000>;
79 };
80 };
81
82 i2c@11000 {
83 status = "okay";
84 clock-frequency = <100000>;
85 };
86
87 i2c@11100 {
88 status = "okay";
89 clock-frequency = <100000>;
90 };
91
92 serial@12000 {
93 status = "okay";
94 };
95
96 ethernet@30000 {
97 status = "okay";
98 phy = <&phy1>;
99 phy-mode = "rgmii-id";
100 };
101
102 usb@50000 {
103 status = "ok";
104 };
105
106 ethernet@70000 {
107 status = "okay";
108 phy = <&phy0>;
109 phy-mode = "rgmii-id";
110 };
111
112 mdio@72004 {
113 phy0: ethernet-phy@0 {
114 reg = <0>;
115 };
116
117 phy1: ethernet-phy@1 {
118 reg = <1>;
119 };
120 };
121
122 sata@a8000 {
123 status = "okay";
124 };
125
126 sata@e0000 {
127 status = "okay";
128 };
129
130 flash@d0000 {
131 status = "okay";
132 num-cs = <1>;
133 marvell,nand-keep-config;
134 marvell,nand-enable-arbiter;
135 nand-on-flash-bbt;
136 nand-ecc-strength = <4>;
137 nand-ecc-step-size = <512>;
138
139 partition@0 {
140 label = "U-Boot";
141 reg = <0 0x800000>;
142 };
143 partition@800000 {
144 label = "Linux";
145 reg = <0x800000 0x800000>;
146 };
147 partition@1000000 {
148 label = "Filesystem";
149 reg = <0x1000000 0x3f000000>;
150 };
151 };
152
153 sdhci@d8000 {
154 broken-cd;
155 wp-inverted;
156 bus-width = <8>;
157 status = "okay";
158 no-1-8-v;
159 };
160
161 usb3@f0000 {
162 status = "okay";
163 };
164
165 usb3@f8000 {
166 status = "okay";
167 };
168 };
169
170 pcie-controller {
171 status = "okay";
172 /*
173 * The two PCIe units are accessible through
174 * standard PCIe slots on the board.
175 */
176 pcie@1,0 {
177 /* Port 0, Lane 0 */
178 status = "okay";
179 };
180 pcie@2,0 {
181 /* Port 1, Lane 0 */
182 status = "okay";
183 };
184 };
185 };
186 };
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