2 * Device Tree file for Marvell Armada 385 development board
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
14 * a) This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without
16 * any warranty of any kind, whether express or implied.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "armada-388.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Marvell Armada 388 DB-88F6820-GP";
48 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380";
51 stdout-path = "serial0:115200n8";
55 device_type = "memory";
56 reg = <0x00000000 0x80000000>; /* 2 GB */
60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
68 pinctrl-names = "default";
69 pinctrl-0 = <&spi0_pins>;
75 compatible = "st,m25p128", "jedec,spi-nor";
76 reg = <0>; /* Chip select 0 */
77 spi-max-frequency = <50000000>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&i2c0_pins>;
86 clock-frequency = <100000>;
88 expander0: pca9555@20 {
89 compatible = "nxp,pca9555";
90 pinctrl-names = "default";
91 pinctrl-0 = <&pca0_pins>;
92 interrupt-parent = <&gpio0>;
93 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
97 #interrupt-cells = <2>;
101 expander1: pca9555@21 {
102 compatible = "nxp,pca9555";
103 pinctrl-names = "default";
104 interrupt-parent = <&gpio0>;
105 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
114 compatible = "atmel,24c64";
121 * Exported on the micro USB connector CON16
125 pinctrl-names = "default";
126 pinctrl-0 = <&uart0_pins>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&ge1_rgmii_pins>;
136 phy-mode = "rgmii-id";
137 buffer-manager = <&bm>;
144 vcc-supply = <®_usb2_0_vbus>;
150 pinctrl-names = "default";
152 * The Reference Clock 0 is used to provide a
155 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
158 phy-mode = "rgmii-id";
159 buffer-manager = <&bm>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&mdio_pins>;
169 phy0: ethernet-phy@1 {
173 phy1: ethernet-phy@0 {
179 pinctrl-names = "default";
180 pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
182 #address-cells = <1>;
187 target-supply = <®_5v_sata0>;
192 target-supply = <®_5v_sata1>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
204 #address-cells = <1>;
209 target-supply = <®_5v_sata2>;
214 target-supply = <®_5v_sata3>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&sdhci_pins>;
223 * A388-GP board v1.5 and higher replace
224 * hitherto card detection method based on GPIO
225 * with the one using DAT3 pin. As they are
226 * incompatible, software-based polling is
227 * enabled with 'broken-cd' property. For boards
228 * older than v1.5 it can be replaced with:
229 * 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;',
230 * whereas for the newer ones following can be
243 usb-phy = <&usb2_1_phy>;
249 usb-phy = <&usb3_phy>;
261 * One PCIe units is accessible through
262 * standard PCIe slot on the board.
270 * The two other PCIe units are accessible
271 * through mini PCIe slot on the board.
284 compatible = "gpio-fan";
285 gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
286 gpio-fan,speed-map = < 0 0
291 usb2_1_phy: usb2_1_phy {
292 compatible = "usb-nop-xceiv";
293 vcc-supply = <®_usb2_1_vbus>;
297 compatible = "usb-nop-xceiv";
298 vcc-supply = <®_usb3_vbus>;
301 reg_usb3_vbus: usb3-vbus {
302 compatible = "regulator-fixed";
303 regulator-name = "usb3-vbus";
304 regulator-min-microvolt = <5000000>;
305 regulator-max-microvolt = <5000000>;
307 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
310 reg_usb2_0_vbus: v5-vbus0 {
311 compatible = "regulator-fixed";
312 regulator-name = "v5.0-vbus0";
313 regulator-min-microvolt = <5000000>;
314 regulator-max-microvolt = <5000000>;
317 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
320 reg_usb2_1_vbus: v5-vbus1 {
321 compatible = "regulator-fixed";
322 regulator-name = "v5.0-vbus1";
323 regulator-min-microvolt = <5000000>;
324 regulator-max-microvolt = <5000000>;
326 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
329 reg_sata0: pwr-sata0 {
330 compatible = "regulator-fixed";
331 regulator-name = "pwr_en_sata0";
332 regulator-min-microvolt = <12000000>;
333 regulator-max-microvolt = <12000000>;
336 gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
339 reg_5v_sata0: v5-sata0 {
340 compatible = "regulator-fixed";
341 regulator-name = "v5.0-sata0";
342 regulator-min-microvolt = <5000000>;
343 regulator-max-microvolt = <5000000>;
344 vin-supply = <®_sata0>;
347 reg_12v_sata0: v12-sata0 {
348 compatible = "regulator-fixed";
349 regulator-name = "v12.0-sata0";
350 regulator-min-microvolt = <12000000>;
351 regulator-max-microvolt = <12000000>;
352 vin-supply = <®_sata0>;
355 reg_sata1: pwr-sata1 {
356 regulator-name = "pwr_en_sata1";
357 compatible = "regulator-fixed";
358 regulator-min-microvolt = <12000000>;
359 regulator-max-microvolt = <12000000>;
362 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
365 reg_5v_sata1: v5-sata1 {
366 compatible = "regulator-fixed";
367 regulator-name = "v5.0-sata1";
368 regulator-min-microvolt = <5000000>;
369 regulator-max-microvolt = <5000000>;
370 vin-supply = <®_sata1>;
373 reg_12v_sata1: v12-sata1 {
374 compatible = "regulator-fixed";
375 regulator-name = "v12.0-sata1";
376 regulator-min-microvolt = <12000000>;
377 regulator-max-microvolt = <12000000>;
378 vin-supply = <®_sata1>;
381 reg_sata2: pwr-sata2 {
382 compatible = "regulator-fixed";
383 regulator-name = "pwr_en_sata2";
386 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
389 reg_5v_sata2: v5-sata2 {
390 compatible = "regulator-fixed";
391 regulator-name = "v5.0-sata2";
392 regulator-min-microvolt = <5000000>;
393 regulator-max-microvolt = <5000000>;
394 vin-supply = <®_sata2>;
397 reg_12v_sata2: v12-sata2 {
398 compatible = "regulator-fixed";
399 regulator-name = "v12.0-sata2";
400 regulator-min-microvolt = <12000000>;
401 regulator-max-microvolt = <12000000>;
402 vin-supply = <®_sata2>;
405 reg_sata3: pwr-sata3 {
406 compatible = "regulator-fixed";
407 regulator-name = "pwr_en_sata3";
410 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
413 reg_5v_sata3: v5-sata3 {
414 compatible = "regulator-fixed";
415 regulator-name = "v5.0-sata3";
416 regulator-min-microvolt = <5000000>;
417 regulator-max-microvolt = <5000000>;
418 vin-supply = <®_sata3>;
421 reg_12v_sata3: v12-sata3 {
422 compatible = "regulator-fixed";
423 regulator-name = "v12.0-sata3";
424 regulator-min-microvolt = <12000000>;
425 regulator-max-microvolt = <12000000>;
426 vin-supply = <®_sata3>;
431 pca0_pins: pca0_pins {
432 marvell,pins = "mpp18";
433 marvell,function = "gpio";