arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * Contains definitions specific to the Armada XP SoC that are not
  16  * common to all Armada SoCs.
  17  */
  18
  19 #include "armada-370-xp.dtsi"
  20
  21 / {
  22         model = "Marvell Armada XP family SoC";
  23         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  24
  25         aliases {
  26                 eth2 = &eth2;
  27         };
  28
  29         soc {
  30                 compatible = "marvell,armadaxp-mbus", "simple-bus";
  31
  32                 bootrom {
  33                         compatible = "marvell,bootrom";
  34                         reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  35                 };
  36
  37                 internal-regs {
  38                         L2: l2-cache {
  39                                 compatible = "marvell,aurora-system-cache";
  40                                 reg = <0x08000 0x1000>;
  41                                 cache-id-part = <0x100>;
  42                                 wt-override;
  43                         };
  44
  45                         interrupt-controller@20000 {
  46                               reg = <0x20a00 0x2d0>, <0x21070 0x58>;
  47                         };
  48
  49                         armada-370-xp-pmsu@22000 {
  50                                 compatible = "marvell,armada-370-xp-pmsu";
  51                                 reg = <0x22100 0x430>, <0x20800 0x20>;
  52                         };
  53
  54                         serial@12200 {
  55                                 compatible = "snps,dw-apb-uart";
  56                                 reg = <0x12200 0x100>;
  57                                 reg-shift = <2>;
  58                                 interrupts = <43>;
  59                                 reg-io-width = <1>;
  60                                 status = "disabled";
  61                         };
  62                         serial@12300 {
  63                                 compatible = "snps,dw-apb-uart";
  64                                 reg = <0x12300 0x100>;
  65                                 reg-shift = <2>;
  66                                 interrupts = <44>;
  67                                 reg-io-width = <1>;
  68                                 status = "disabled";
  69                         };
  70
  71                         timer@20300 {
  72                                 compatible = "marvell,armada-xp-timer";
  73                                 clocks = <&coreclk 2>, <&refclk>;
  74                                 clock-names = "nbclk", "fixed";
  75                         };
  76
  77                         coreclk: mvebu-sar@18230 {
  78                                 compatible = "marvell,armada-xp-core-clock";
  79                                 reg = <0x18230 0x08>;
  80                                 #clock-cells = <1>;
  81                         };
  82
  83                         cpuclk: clock-complex@18700 {
  84                                 #clock-cells = <1>;
  85                                 compatible = "marvell,armada-xp-cpu-clock";
  86                                 reg = <0x18700 0xA0>;
  87                                 clocks = <&coreclk 1>;
  88                         };
  89
  90                         gateclk: clock-gating-control@18220 {
  91                                 compatible = "marvell,armada-xp-gating-clock";
  92                                 reg = <0x18220 0x4>;
  93                                 clocks = <&coreclk 0>;
  94                                 #clock-cells = <1>;
  95                         };
  96
  97                         system-controller@18200 {
  98                                 compatible = "marvell,armada-370-xp-system-controller";
  99                                 reg = <0x18200 0x500>;
 100                         };
 101
 102                         eth2: ethernet@30000 {
 103                                 compatible = "marvell,armada-370-neta";
 104                                 reg = <0x30000 0x4000>;
 105                                 interrupts = <12>;
 106                                 clocks = <&gateclk 2>;
 107                                 status = "disabled";
 108                         };
 109
 110                         xor@60900 {
 111                                 compatible = "marvell,orion-xor";
 112                                 reg = <0x60900 0x100
 113                                        0x60b00 0x100>;
 114                                 clocks = <&gateclk 22>;
 115                                 status = "okay";
 116
 117                                 xor10 {
 118                                         interrupts = <51>;
 119                                         dmacap,memcpy;
 120                                         dmacap,xor;
 121                                 };
 122                                 xor11 {
 123                                         interrupts = <52>;
 124                                         dmacap,memcpy;
 125                                         dmacap,xor;
 126                                         dmacap,memset;
 127                                 };
 128                         };
 129
 130                         xor@f0900 {
 131                                 compatible = "marvell,orion-xor";
 132                                 reg = <0xF0900 0x100
 133                                        0xF0B00 0x100>;
 134                                 clocks = <&gateclk 28>;
 135                                 status = "okay";
 136
 137                                 xor00 {
 138                                         interrupts = <94>;
 139                                         dmacap,memcpy;
 140                                         dmacap,xor;
 141                                 };
 142                                 xor01 {
 143                                         interrupts = <95>;
 144                                         dmacap,memcpy;
 145                                         dmacap,xor;
 146                                         dmacap,memset;
 147                                 };
 148                         };
 149
 150                         usb@50000 {
 151                                 clocks = <&gateclk 18>;
 152                         };
 153
 154                         usb@51000 {
 155                                 clocks = <&gateclk 19>;
 156                         };
 157
 158                         usb@52000 {
 159                                 compatible = "marvell,orion-ehci";
 160                                 reg = <0x52000 0x500>;
 161                                 interrupts = <47>;
 162                                 clocks = <&gateclk 20>;
 163                                 status = "disabled";
 164                         };
 165
 166                         thermal@182b0 {
 167                                 compatible = "marvell,armadaxp-thermal";
 168                                 reg = <0x182b0 0x4
 169                                         0x184d0 0x4>;
 170                                 status = "okay";
 171                         };
 172                 };
 173         };
 174
 175         clocks {
 176                 /* 25 MHz reference crystal */
 177                 refclk: oscillator {
 178                         compatible = "fixed-clock";
 179                         #clock-cells = <0>;
 180                         clock-frequency = <25000000>;
 181                 };
 182         };
 183 };