2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
37 compatible = "arm,arm926ejs";
42 reg = <0x70000000 0x10000000>;
46 compatible = "simple-bus";
52 compatible = "simple-bus";
57 aic: interrupt-controller@fffff000 {
58 #interrupt-cells = <3>;
59 compatible = "atmel,at91rm9200-aic";
61 reg = <0xfffff000 0x200>;
62 atmel,external-irqs = <31>;
65 ramc0: ramc@ffffe400 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe400 0x200
72 compatible = "atmel,at91rm9200-pmc";
73 reg = <0xfffffc00 0x100>;
77 compatible = "atmel,at91sam9g45-rstc";
78 reg = <0xfffffd00 0x10>;
82 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>;
89 compatible = "atmel,at91sam9rl-shdwc";
90 reg = <0xfffffd10 0x10>;
93 tcb0: timer@fff7c000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfff7c000 0x100>;
96 interrupts = <18 4 0>;
99 tcb1: timer@fffd4000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfffd4000 0x100>;
102 interrupts = <18 4 0>;
105 dma: dma-controller@ffffec00 {
106 compatible = "atmel,at91sam9g45-dma";
107 reg = <0xffffec00 0x200>;
108 interrupts = <21 4 0>;
112 #address-cells = <1>;
114 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
115 ranges = <0xfffff200 0xfffff200 0xa00>;
119 0xffffffff 0xffc003ff /* pioA */
120 0xffffffff 0x800f8f00 /* pioB */
121 0xffffffff 0x00000e00 /* pioC */
122 0xffffffff 0xff0c1381 /* pioD */
123 0xffffffff 0x81ffff81 /* pioE */
126 /* shared pinctrl settings */
128 pinctrl_dbgu: dbgu-0 {
130 <1 12 0x1 0x0 /* PB12 periph A */
131 1 13 0x1 0x0>; /* PB13 periph A */
136 pinctrl_usart0: usart0-0 {
138 <1 19 0x1 0x1 /* PB19 periph A with pullup */
139 1 18 0x1 0x0>; /* PB18 periph A */
142 pinctrl_usart0_rts: usart0_rts-0 {
144 <1 17 0x2 0x0>; /* PB17 periph B */
147 pinctrl_usart0_cts: usart0_cts-0 {
149 <1 15 0x2 0x0>; /* PB15 periph B */
154 pinctrl_usart1: usart1-0 {
156 <1 4 0x1 0x1 /* PB4 periph A with pullup */
157 1 5 0x1 0x0>; /* PB5 periph A */
160 pinctrl_usart1_rts: usart1_rts-0 {
162 <3 16 0x1 0x0>; /* PD16 periph A */
165 pinctrl_usart1_cts: usart1_cts-0 {
167 <3 17 0x1 0x0>; /* PD17 periph A */
172 pinctrl_usart2: usart2-0 {
174 <1 6 0x1 0x1 /* PB6 periph A with pullup */
175 1 7 0x1 0x0>; /* PB7 periph A */
178 pinctrl_usart2_rts: usart2_rts-0 {
180 <2 9 0x2 0x0>; /* PC9 periph B */
183 pinctrl_usart2_cts: usart2_cts-0 {
185 <2 11 0x2 0x0>; /* PC11 periph B */
190 pinctrl_usart3: usart3-0 {
192 <1 8 0x1 0x1 /* PB9 periph A with pullup */
193 1 9 0x1 0x0>; /* PB8 periph A */
196 pinctrl_usart3_rts: usart3_rts-0 {
198 <0 23 0x2 0x0>; /* PA23 periph B */
201 pinctrl_usart3_cts: usart3_cts-0 {
203 <0 24 0x2 0x0>; /* PA24 periph B */
208 pinctrl_nand: nand-0 {
210 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
211 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
216 pinctrl_macb_rmii: macb_rmii-0 {
218 <0 10 0x1 0x0 /* PA10 periph A */
219 0 11 0x1 0x0 /* PA11 periph A */
220 0 12 0x1 0x0 /* PA12 periph A */
221 0 13 0x1 0x0 /* PA13 periph A */
222 0 14 0x1 0x0 /* PA14 periph A */
223 0 15 0x1 0x0 /* PA15 periph A */
224 0 16 0x1 0x0 /* PA16 periph A */
225 0 17 0x1 0x0 /* PA17 periph A */
226 0 18 0x1 0x0 /* PA18 periph A */
227 0 19 0x1 0x0>; /* PA19 periph A */
230 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
232 <0 6 0x2 0x0 /* PA6 periph B */
233 0 7 0x2 0x0 /* PA7 periph B */
234 0 8 0x2 0x0 /* PA8 periph B */
235 0 9 0x2 0x0 /* PA9 periph B */
236 0 27 0x2 0x0 /* PA27 periph B */
237 0 28 0x2 0x0 /* PA28 periph B */
238 0 29 0x2 0x0 /* PA29 periph B */
239 0 30 0x2 0x0>; /* PA30 periph B */
244 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
246 <0 0 0x1 0x0 /* PA0 periph A */
247 0 1 0x1 0x1 /* PA1 periph A with pullup */
248 0 2 0x1 0x1>; /* PA2 periph A with pullup */
251 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
253 <0 3 0x1 0x1 /* PA3 periph A with pullup */
254 0 4 0x1 0x1 /* PA4 periph A with pullup */
255 0 5 0x1 0x1>; /* PA5 periph A with pullup */
258 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
260 <0 6 0x1 0x1 /* PA6 periph A with pullup */
261 0 7 0x1 0x1 /* PA7 periph A with pullup */
262 0 8 0x1 0x1 /* PA8 periph A with pullup */
263 0 9 0x1 0x1>; /* PA9 periph A with pullup */
268 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
270 <0 31 0x1 0x0 /* PA31 periph A */
271 0 22 0x1 0x1 /* PA22 periph A with pullup */
272 0 23 0x1 0x1>; /* PA23 periph A with pullup */
275 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
277 <0 24 0x1 0x1 /* PA24 periph A with pullup */
278 0 25 0x1 0x1 /* PA25 periph A with pullup */
279 0 26 0x1 0x1>; /* PA26 periph A with pullup */
282 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
284 <0 27 0x1 0x1 /* PA27 periph A with pullup */
285 0 28 0x1 0x1 /* PA28 periph A with pullup */
286 0 29 0x1 0x1 /* PA29 periph A with pullup */
287 0 20 0x1 0x1>; /* PA30 periph A with pullup */
291 pioA: gpio@fffff200 {
292 compatible = "atmel,at91rm9200-gpio";
293 reg = <0xfffff200 0x200>;
294 interrupts = <2 4 1>;
297 interrupt-controller;
298 #interrupt-cells = <2>;
301 pioB: gpio@fffff400 {
302 compatible = "atmel,at91rm9200-gpio";
303 reg = <0xfffff400 0x200>;
304 interrupts = <3 4 1>;
307 interrupt-controller;
308 #interrupt-cells = <2>;
311 pioC: gpio@fffff600 {
312 compatible = "atmel,at91rm9200-gpio";
313 reg = <0xfffff600 0x200>;
314 interrupts = <4 4 1>;
317 interrupt-controller;
318 #interrupt-cells = <2>;
321 pioD: gpio@fffff800 {
322 compatible = "atmel,at91rm9200-gpio";
323 reg = <0xfffff800 0x200>;
324 interrupts = <5 4 1>;
327 interrupt-controller;
328 #interrupt-cells = <2>;
331 pioE: gpio@fffffa00 {
332 compatible = "atmel,at91rm9200-gpio";
333 reg = <0xfffffa00 0x200>;
334 interrupts = <5 4 1>;
337 interrupt-controller;
338 #interrupt-cells = <2>;
342 dbgu: serial@ffffee00 {
343 compatible = "atmel,at91sam9260-usart";
344 reg = <0xffffee00 0x200>;
345 interrupts = <1 4 7>;
346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_dbgu>;
351 usart0: serial@fff8c000 {
352 compatible = "atmel,at91sam9260-usart";
353 reg = <0xfff8c000 0x200>;
354 interrupts = <7 4 5>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&pinctrl_usart0>;
362 usart1: serial@fff90000 {
363 compatible = "atmel,at91sam9260-usart";
364 reg = <0xfff90000 0x200>;
365 interrupts = <8 4 5>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_usart1>;
373 usart2: serial@fff94000 {
374 compatible = "atmel,at91sam9260-usart";
375 reg = <0xfff94000 0x200>;
376 interrupts = <9 4 5>;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_usart2>;
384 usart3: serial@fff98000 {
385 compatible = "atmel,at91sam9260-usart";
386 reg = <0xfff98000 0x200>;
387 interrupts = <10 4 5>;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_usart3>;
395 macb0: ethernet@fffbc000 {
396 compatible = "cdns,at32ap7000-macb", "cdns,macb";
397 reg = <0xfffbc000 0x100>;
398 interrupts = <25 4 3>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_macb_rmii>;
405 compatible = "atmel,at91sam9g10-i2c";
406 reg = <0xfff84000 0x100>;
407 interrupts = <12 4 6>;
408 #address-cells = <1>;
414 compatible = "atmel,at91sam9g10-i2c";
415 reg = <0xfff88000 0x100>;
416 interrupts = <13 4 6>;
417 #address-cells = <1>;
423 compatible = "atmel,at91sam9260-adc";
424 reg = <0xfffb0000 0x100>;
425 interrupts = <20 4 0>;
426 atmel,adc-use-external-triggers;
427 atmel,adc-channels-used = <0xff>;
428 atmel,adc-vref = <3300>;
429 atmel,adc-num-channels = <8>;
430 atmel,adc-startup-time = <40>;
431 atmel,adc-channel-base = <0x30>;
432 atmel,adc-drdy-mask = <0x10000>;
433 atmel,adc-status-register = <0x1c>;
434 atmel,adc-trigger-register = <0x08>;
437 trigger-name = "external-rising";
438 trigger-value = <0x1>;
442 trigger-name = "external-falling";
443 trigger-value = <0x2>;
448 trigger-name = "external-any";
449 trigger-value = <0x3>;
454 trigger-name = "continuous";
455 trigger-value = <0x6>;
460 compatible = "atmel,hsmci";
461 reg = <0xfff80000 0x600>;
462 interrupts = <11 4 0>;
463 #address-cells = <1>;
469 compatible = "atmel,hsmci";
470 reg = <0xfffd0000 0x600>;
471 interrupts = <29 4 0>;
472 #address-cells = <1>;
478 nand0: nand@40000000 {
479 compatible = "atmel,at91rm9200-nand";
480 #address-cells = <1>;
482 reg = <0x40000000 0x10000000
485 atmel,nand-addr-offset = <21>;
486 atmel,nand-cmd-offset = <22>;
487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_nand>;
496 usb0: ohci@00700000 {
497 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
498 reg = <0x00700000 0x100000>;
499 interrupts = <22 4 2>;
503 usb1: ehci@00800000 {
504 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
505 reg = <0x00800000 0x100000>;
506 interrupts = <22 4 2>;
512 compatible = "i2c-gpio";
513 gpios = <&pioA 20 0 /* sda */
516 i2c-gpio,sda-open-drain;
517 i2c-gpio,scl-open-drain;
518 i2c-gpio,delay-us = <5>; /* ~100 kHz */
519 #address-cells = <1>;