Merge branch 'at91' into devel
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
1 /*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12 /include/ "skeleton.dtsi"
13
14 / {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
32 i2c0 = &i2c0;
33 i2c1 = &i2c1;
34 };
35 cpus {
36 cpu@0 {
37 compatible = "arm,arm926ejs";
38 };
39 };
40
41 memory {
42 reg = <0x70000000 0x10000000>;
43 };
44
45 ahb {
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
50
51 apb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 aic: interrupt-controller@fffff000 {
58 #interrupt-cells = <3>;
59 compatible = "atmel,at91rm9200-aic";
60 interrupt-controller;
61 reg = <0xfffff000 0x200>;
62 atmel,external-irqs = <31>;
63 };
64
65 ramc0: ramc@ffffe400 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe400 0x200
68 0xffffe600 0x200>;
69 };
70
71 pmc: pmc@fffffc00 {
72 compatible = "atmel,at91rm9200-pmc";
73 reg = <0xfffffc00 0x100>;
74 };
75
76 rstc@fffffd00 {
77 compatible = "atmel,at91sam9g45-rstc";
78 reg = <0xfffffd00 0x10>;
79 };
80
81 pit: timer@fffffd30 {
82 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>;
84 interrupts = <1 4 7>;
85 };
86
87
88 shdwc@fffffd10 {
89 compatible = "atmel,at91sam9rl-shdwc";
90 reg = <0xfffffd10 0x10>;
91 };
92
93 tcb0: timer@fff7c000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfff7c000 0x100>;
96 interrupts = <18 4 0>;
97 };
98
99 tcb1: timer@fffd4000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfffd4000 0x100>;
102 interrupts = <18 4 0>;
103 };
104
105 dma: dma-controller@ffffec00 {
106 compatible = "atmel,at91sam9g45-dma";
107 reg = <0xffffec00 0x200>;
108 interrupts = <21 4 0>;
109 };
110
111 pinctrl@fffff200 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
115 ranges = <0xfffff200 0xfffff200 0xa00>;
116
117 atmel,mux-mask = <
118 /* A B */
119 0xffffffff 0xffc003ff /* pioA */
120 0xffffffff 0x800f8f00 /* pioB */
121 0xffffffff 0x00000e00 /* pioC */
122 0xffffffff 0xff0c1381 /* pioD */
123 0xffffffff 0x81ffff81 /* pioE */
124 >;
125
126 /* shared pinctrl settings */
127 dbgu {
128 pinctrl_dbgu: dbgu-0 {
129 atmel,pins =
130 <1 12 0x1 0x0 /* PB12 periph A */
131 1 13 0x1 0x0>; /* PB13 periph A */
132 };
133 };
134
135 uart0 {
136 pinctrl_uart0: uart0-0 {
137 atmel,pins =
138 <1 19 0x1 0x1 /* PB19 periph A with pullup */
139 1 18 0x1 0x0>; /* PB18 periph A */
140 };
141
142 pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
143 atmel,pins =
144 <1 17 0x2 0x0 /* PB17 periph B */
145 1 15 0x2 0x0>; /* PB15 periph B */
146 };
147 };
148
149 uart1 {
150 pinctrl_uart1: uart1-0 {
151 atmel,pins =
152 <1 4 0x1 0x1 /* PB4 periph A with pullup */
153 1 5 0x1 0x0>; /* PB5 periph A */
154 };
155
156 pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
157 atmel,pins =
158 <3 16 0x1 0x0 /* PD16 periph A */
159 3 17 0x1 0x0>; /* PD17 periph A */
160 };
161 };
162
163 uart2 {
164 pinctrl_uart2: uart2-0 {
165 atmel,pins =
166 <1 6 0x1 0x1 /* PB6 periph A with pullup */
167 1 7 0x1 0x0>; /* PB7 periph A */
168 };
169
170 pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
171 atmel,pins =
172 <2 9 0x2 0x0 /* PC9 periph B */
173 2 11 0x2 0x0>; /* PC11 periph B */
174 };
175 };
176
177 uart3 {
178 pinctrl_uart3: uart3-0 {
179 atmel,pins =
180 <1 8 0x1 0x1 /* PB9 periph A with pullup */
181 1 9 0x1 0x0>; /* PB8 periph A */
182 };
183
184 pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
185 atmel,pins =
186 <0 23 0x2 0x0 /* PA23 periph B */
187 0 24 0x2 0x0>; /* PA24 periph B */
188 };
189 };
190
191 nand {
192 pinctrl_nand: nand-0 {
193 atmel,pins =
194 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
195 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
196 };
197 };
198
199 pioA: gpio@fffff200 {
200 compatible = "atmel,at91rm9200-gpio";
201 reg = <0xfffff200 0x200>;
202 interrupts = <2 4 1>;
203 #gpio-cells = <2>;
204 gpio-controller;
205 interrupt-controller;
206 #interrupt-cells = <2>;
207 };
208
209 pioB: gpio@fffff400 {
210 compatible = "atmel,at91rm9200-gpio";
211 reg = <0xfffff400 0x200>;
212 interrupts = <3 4 1>;
213 #gpio-cells = <2>;
214 gpio-controller;
215 interrupt-controller;
216 #interrupt-cells = <2>;
217 };
218
219 pioC: gpio@fffff600 {
220 compatible = "atmel,at91rm9200-gpio";
221 reg = <0xfffff600 0x200>;
222 interrupts = <4 4 1>;
223 #gpio-cells = <2>;
224 gpio-controller;
225 interrupt-controller;
226 #interrupt-cells = <2>;
227 };
228
229 pioD: gpio@fffff800 {
230 compatible = "atmel,at91rm9200-gpio";
231 reg = <0xfffff800 0x200>;
232 interrupts = <5 4 1>;
233 #gpio-cells = <2>;
234 gpio-controller;
235 interrupt-controller;
236 #interrupt-cells = <2>;
237 };
238
239 pioE: gpio@fffffa00 {
240 compatible = "atmel,at91rm9200-gpio";
241 reg = <0xfffffa00 0x200>;
242 interrupts = <5 4 1>;
243 #gpio-cells = <2>;
244 gpio-controller;
245 interrupt-controller;
246 #interrupt-cells = <2>;
247 };
248 };
249
250 dbgu: serial@ffffee00 {
251 compatible = "atmel,at91sam9260-usart";
252 reg = <0xffffee00 0x200>;
253 interrupts = <1 4 7>;
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_dbgu>;
256 status = "disabled";
257 };
258
259 usart0: serial@fff8c000 {
260 compatible = "atmel,at91sam9260-usart";
261 reg = <0xfff8c000 0x200>;
262 interrupts = <7 4 5>;
263 atmel,use-dma-rx;
264 atmel,use-dma-tx;
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_uart0>;
267 status = "disabled";
268 };
269
270 usart1: serial@fff90000 {
271 compatible = "atmel,at91sam9260-usart";
272 reg = <0xfff90000 0x200>;
273 interrupts = <8 4 5>;
274 atmel,use-dma-rx;
275 atmel,use-dma-tx;
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_uart1>;
278 status = "disabled";
279 };
280
281 usart2: serial@fff94000 {
282 compatible = "atmel,at91sam9260-usart";
283 reg = <0xfff94000 0x200>;
284 interrupts = <9 4 5>;
285 atmel,use-dma-rx;
286 atmel,use-dma-tx;
287 pinctrl-names = "default";
288 pinctrl-0 = <&pinctrl_uart2>;
289 status = "disabled";
290 };
291
292 usart3: serial@fff98000 {
293 compatible = "atmel,at91sam9260-usart";
294 reg = <0xfff98000 0x200>;
295 interrupts = <10 4 5>;
296 atmel,use-dma-rx;
297 atmel,use-dma-tx;
298 pinctrl-names = "default";
299 pinctrl-0 = <&pinctrl_uart3>;
300 status = "disabled";
301 };
302
303 macb0: ethernet@fffbc000 {
304 compatible = "cdns,at32ap7000-macb", "cdns,macb";
305 reg = <0xfffbc000 0x100>;
306 interrupts = <25 4 3>;
307 status = "disabled";
308 };
309
310 i2c0: i2c@fff84000 {
311 compatible = "atmel,at91sam9g10-i2c";
312 reg = <0xfff84000 0x100>;
313 interrupts = <12 4 6>;
314 #address-cells = <1>;
315 #size-cells = <0>;
316 status = "disabled";
317 };
318
319 i2c1: i2c@fff88000 {
320 compatible = "atmel,at91sam9g10-i2c";
321 reg = <0xfff88000 0x100>;
322 interrupts = <13 4 6>;
323 #address-cells = <1>;
324 #size-cells = <0>;
325 status = "disabled";
326 };
327
328 adc0: adc@fffb0000 {
329 compatible = "atmel,at91sam9260-adc";
330 reg = <0xfffb0000 0x100>;
331 interrupts = <20 4 0>;
332 atmel,adc-use-external-triggers;
333 atmel,adc-channels-used = <0xff>;
334 atmel,adc-vref = <3300>;
335 atmel,adc-num-channels = <8>;
336 atmel,adc-startup-time = <40>;
337 atmel,adc-channel-base = <0x30>;
338 atmel,adc-drdy-mask = <0x10000>;
339 atmel,adc-status-register = <0x1c>;
340 atmel,adc-trigger-register = <0x08>;
341
342 trigger@0 {
343 trigger-name = "external-rising";
344 trigger-value = <0x1>;
345 trigger-external;
346 };
347 trigger@1 {
348 trigger-name = "external-falling";
349 trigger-value = <0x2>;
350 trigger-external;
351 };
352
353 trigger@2 {
354 trigger-name = "external-any";
355 trigger-value = <0x3>;
356 trigger-external;
357 };
358
359 trigger@3 {
360 trigger-name = "continuous";
361 trigger-value = <0x6>;
362 };
363 };
364 };
365
366 nand0: nand@40000000 {
367 compatible = "atmel,at91rm9200-nand";
368 #address-cells = <1>;
369 #size-cells = <1>;
370 reg = <0x40000000 0x10000000
371 0xffffe200 0x200
372 >;
373 atmel,nand-addr-offset = <21>;
374 atmel,nand-cmd-offset = <22>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&pinctrl_nand>;
377 gpios = <&pioC 8 0
378 &pioC 14 0
379 0
380 >;
381 status = "disabled";
382 };
383
384 usb0: ohci@00700000 {
385 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
386 reg = <0x00700000 0x100000>;
387 interrupts = <22 4 2>;
388 status = "disabled";
389 };
390
391 usb1: ehci@00800000 {
392 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
393 reg = <0x00800000 0x100000>;
394 interrupts = <22 4 2>;
395 status = "disabled";
396 };
397 };
398
399 i2c@0 {
400 compatible = "i2c-gpio";
401 gpios = <&pioA 20 0 /* sda */
402 &pioA 21 0 /* scl */
403 >;
404 i2c-gpio,sda-open-drain;
405 i2c-gpio,scl-open-drain;
406 i2c-gpio,delay-us = <5>; /* ~100 kHz */
407 #address-cells = <1>;
408 #size-cells = <0>;
409 status = "disabled";
410 };
411 };
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