2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
37 compatible = "arm,arm926ejs";
42 reg = <0x20000000 0x10000000>;
46 compatible = "simple-bus";
52 compatible = "simple-bus";
57 aic: interrupt-controller@fffff000 {
58 #interrupt-cells = <3>;
59 compatible = "atmel,at91rm9200-aic";
61 reg = <0xfffff000 0x200>;
62 atmel,external-irqs = <31>;
65 ramc0: ramc@ffffe800 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe800 0x200>;
71 compatible = "atmel,at91rm9200-pmc";
72 reg = <0xfffffc00 0x100>;
76 compatible = "atmel,at91sam9g45-rstc";
77 reg = <0xfffffe00 0x10>;
81 compatible = "atmel,at91sam9x5-shdwc";
82 reg = <0xfffffe10 0x10>;
86 compatible = "atmel,at91sam9260-pit";
87 reg = <0xfffffe30 0xf>;
91 tcb0: timer@f8008000 {
92 compatible = "atmel,at91sam9x5-tcb";
93 reg = <0xf8008000 0x100>;
94 interrupts = <17 4 0>;
97 tcb1: timer@f800c000 {
98 compatible = "atmel,at91sam9x5-tcb";
99 reg = <0xf800c000 0x100>;
100 interrupts = <17 4 0>;
103 dma0: dma-controller@ffffec00 {
104 compatible = "atmel,at91sam9g45-dma";
105 reg = <0xffffec00 0x200>;
106 interrupts = <20 4 0>;
109 dma1: dma-controller@ffffee00 {
110 compatible = "atmel,at91sam9g45-dma";
111 reg = <0xffffee00 0x200>;
112 interrupts = <21 4 0>;
116 #address-cells = <1>;
118 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
119 ranges = <0xfffff400 0xfffff400 0x800>;
121 /* shared pinctrl settings */
123 pinctrl_dbgu: dbgu-0 {
125 <0 9 0x1 0x0 /* PA9 periph A */
126 0 10 0x1 0x1>; /* PA10 periph A with pullup */
131 pinctrl_usart0: usart0-0 {
133 <0 0 0x1 0x1 /* PA0 periph A with pullup */
134 0 1 0x1 0x0>; /* PA1 periph A */
137 pinctrl_usart0_rts: usart0_rts-0 {
139 <0 2 0x1 0x0>; /* PA2 periph A */
142 pinctrl_usart0_cts: usart0_cts-0 {
144 <0 3 0x1 0x0>; /* PA3 periph A */
147 pinctrl_usart0_sck: usart0_sck-0 {
149 <0 4 0x1 0x0>; /* PA4 periph A */
154 pinctrl_usart1: usart1-0 {
156 <0 5 0x1 0x1 /* PA5 periph A with pullup */
157 0 6 0x1 0x0>; /* PA6 periph A */
160 pinctrl_usart1_rts: usart1_rts-0 {
162 <2 27 0x3 0x0>; /* PC27 periph C */
165 pinctrl_usart1_cts: usart1_cts-0 {
167 <2 28 0x3 0x0>; /* PC28 periph C */
170 pinctrl_usart1_sck: usart1_sck-0 {
172 <2 28 0x3 0x0>; /* PC29 periph C */
177 pinctrl_usart2: usart2-0 {
179 <0 7 0x1 0x1 /* PA7 periph A with pullup */
180 0 8 0x1 0x0>; /* PA8 periph A */
183 pinctrl_uart2_rts: uart2_rts-0 {
185 <1 0 0x2 0x0>; /* PB0 periph B */
188 pinctrl_uart2_cts: uart2_cts-0 {
190 <1 1 0x2 0x0>; /* PB1 periph B */
193 pinctrl_usart2_sck: usart2_sck-0 {
195 <1 2 0x2 0x0>; /* PB2 periph B */
200 pinctrl_uart3: usart3-0 {
202 <2 23 0x2 0x1 /* PC22 periph B with pullup */
203 2 23 0x2 0x0>; /* PC23 periph B */
206 pinctrl_usart3_rts: usart3_rts-0 {
208 <2 24 0x2 0x0>; /* PC24 periph B */
211 pinctrl_usart3_cts: usart3_cts-0 {
213 <2 25 0x2 0x0>; /* PC25 periph B */
216 pinctrl_usart3_sck: usart3_sck-0 {
218 <2 26 0x2 0x0>; /* PC26 periph B */
223 pinctrl_uart0: uart0-0 {
225 <2 8 0x3 0x0 /* PC8 periph C */
226 2 9 0x3 0x1>; /* PC9 periph C with pullup */
231 pinctrl_uart1: uart1-0 {
233 <2 16 0x3 0x0 /* PC16 periph C */
234 2 17 0x3 0x1>; /* PC17 periph C with pullup */
239 pinctrl_nand: nand-0 {
241 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
242 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
247 pinctrl_macb0_rmii: macb0_rmii-0 {
249 <1 0 0x1 0x0 /* PB0 periph A */
250 1 1 0x1 0x0 /* PB1 periph A */
251 1 2 0x1 0x0 /* PB2 periph A */
252 1 3 0x1 0x0 /* PB3 periph A */
253 1 4 0x1 0x0 /* PB4 periph A */
254 1 5 0x1 0x0 /* PB5 periph A */
255 1 6 0x1 0x0 /* PB6 periph A */
256 1 7 0x1 0x0 /* PB7 periph A */
257 1 9 0x1 0x0 /* PB9 periph A */
258 1 10 0x1 0x0>; /* PB10 periph A */
261 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
263 <1 8 0x1 0x0 /* PB8 periph A */
264 1 11 0x1 0x0 /* PB11 periph A */
265 1 12 0x1 0x0 /* PB12 periph A */
266 1 13 0x1 0x0 /* PB13 periph A */
267 1 14 0x1 0x0 /* PB14 periph A */
268 1 15 0x1 0x0 /* PB15 periph A */
269 1 16 0x1 0x0 /* PB16 periph A */
270 1 17 0x1 0x0>; /* PB17 periph A */
275 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
277 <0 17 0x1 0x0 /* PA17 periph A */
278 0 16 0x1 0x1 /* PA16 periph A with pullup */
279 0 15 0x1 0x1>; /* PA15 periph A with pullup */
282 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
284 <0 18 0x1 0x1 /* PA18 periph A with pullup */
285 0 19 0x1 0x1 /* PA19 periph A with pullup */
286 0 20 0x1 0x1>; /* PA20 periph A with pullup */
291 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
293 <0 13 0x2 0x0 /* PA13 periph B */
294 0 12 0x2 0x1 /* PA12 periph B with pullup */
295 0 11 0x2 0x1>; /* PA11 periph B with pullup */
298 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
300 <0 2 0x2 0x1 /* PA2 periph B with pullup */
301 0 3 0x2 0x1 /* PA3 periph B with pullup */
302 0 4 0x2 0x1>; /* PA4 periph B with pullup */
307 pinctrl_ssc0_tx: ssc0_tx-0 {
309 <0 24 0x2 0x0 /* PA24 periph B */
310 0 25 0x2 0x0 /* PA25 periph B */
311 0 26 0x2 0x0>; /* PA26 periph B */
314 pinctrl_ssc0_rx: ssc0_rx-0 {
316 <0 27 0x2 0x0 /* PA27 periph B */
317 0 28 0x2 0x0 /* PA28 periph B */
318 0 29 0x2 0x0>; /* PA29 periph B */
322 pioA: gpio@fffff400 {
323 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
324 reg = <0xfffff400 0x200>;
325 interrupts = <2 4 1>;
328 interrupt-controller;
329 #interrupt-cells = <2>;
332 pioB: gpio@fffff600 {
333 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
334 reg = <0xfffff600 0x200>;
335 interrupts = <2 4 1>;
339 interrupt-controller;
340 #interrupt-cells = <2>;
343 pioC: gpio@fffff800 {
344 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
345 reg = <0xfffff800 0x200>;
346 interrupts = <3 4 1>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
353 pioD: gpio@fffffa00 {
354 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
355 reg = <0xfffffa00 0x200>;
356 interrupts = <3 4 1>;
360 interrupt-controller;
361 #interrupt-cells = <2>;
366 compatible = "atmel,at91sam9g45-ssc";
367 reg = <0xf0010000 0x4000>;
368 interrupts = <28 4 5>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
375 compatible = "atmel,hsmci";
376 reg = <0xf0008000 0x600>;
377 interrupts = <12 4 0>;
378 #address-cells = <1>;
384 compatible = "atmel,hsmci";
385 reg = <0xf000c000 0x600>;
386 interrupts = <26 4 0>;
387 #address-cells = <1>;
392 dbgu: serial@fffff200 {
393 compatible = "atmel,at91sam9260-usart";
394 reg = <0xfffff200 0x200>;
395 interrupts = <1 4 7>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&pinctrl_dbgu>;
401 usart0: serial@f801c000 {
402 compatible = "atmel,at91sam9260-usart";
403 reg = <0xf801c000 0x200>;
404 interrupts = <5 4 5>;
407 pinctrl-names = "default";
408 pinctrl-0 = <&pinctrl_usart0>;
412 usart1: serial@f8020000 {
413 compatible = "atmel,at91sam9260-usart";
414 reg = <0xf8020000 0x200>;
415 interrupts = <6 4 5>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_usart1>;
423 usart2: serial@f8024000 {
424 compatible = "atmel,at91sam9260-usart";
425 reg = <0xf8024000 0x200>;
426 interrupts = <7 4 5>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_usart2>;
434 macb0: ethernet@f802c000 {
435 compatible = "cdns,at32ap7000-macb", "cdns,macb";
436 reg = <0xf802c000 0x100>;
437 interrupts = <24 4 3>;
438 pinctrl-names = "default";
439 pinctrl-0 = <&pinctrl_macb0_rmii>;
443 macb1: ethernet@f8030000 {
444 compatible = "cdns,at32ap7000-macb", "cdns,macb";
445 reg = <0xf8030000 0x100>;
446 interrupts = <27 4 3>;
451 compatible = "atmel,at91sam9x5-i2c";
452 reg = <0xf8010000 0x100>;
453 interrupts = <9 4 6>;
454 #address-cells = <1>;
460 compatible = "atmel,at91sam9x5-i2c";
461 reg = <0xf8014000 0x100>;
462 interrupts = <10 4 6>;
463 #address-cells = <1>;
469 compatible = "atmel,at91sam9x5-i2c";
470 reg = <0xf8018000 0x100>;
471 interrupts = <11 4 6>;
472 #address-cells = <1>;
478 compatible = "atmel,at91sam9260-adc";
479 reg = <0xf804c000 0x100>;
480 interrupts = <19 4 0>;
481 atmel,adc-use-external;
482 atmel,adc-channels-used = <0xffff>;
483 atmel,adc-vref = <3300>;
484 atmel,adc-num-channels = <12>;
485 atmel,adc-startup-time = <40>;
486 atmel,adc-channel-base = <0x50>;
487 atmel,adc-drdy-mask = <0x1000000>;
488 atmel,adc-status-register = <0x30>;
489 atmel,adc-trigger-register = <0xc0>;
492 trigger-name = "external-rising";
493 trigger-value = <0x1>;
498 trigger-name = "external-falling";
499 trigger-value = <0x2>;
504 trigger-name = "external-any";
505 trigger-value = <0x3>;
510 trigger-name = "continuous";
511 trigger-value = <0x6>;
516 nand0: nand@40000000 {
517 compatible = "atmel,at91rm9200-nand";
518 #address-cells = <1>;
520 reg = <0x40000000 0x10000000
522 atmel,nand-addr-offset = <21>;
523 atmel,nand-cmd-offset = <22>;
524 pinctrl-names = "default";
525 pinctrl-0 = <&pinctrl_nand>;
533 usb0: ohci@00600000 {
534 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
535 reg = <0x00600000 0x100000>;
536 interrupts = <22 4 2>;
540 usb1: ehci@00700000 {
541 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
542 reg = <0x00700000 0x100000>;
543 interrupts = <22 4 2>;
549 compatible = "i2c-gpio";
550 gpios = <&pioA 30 0 /* sda */
553 i2c-gpio,sda-open-drain;
554 i2c-gpio,scl-open-drain;
555 i2c-gpio,delay-us = <2>; /* ~100 kHz */
556 #address-cells = <1>;
562 compatible = "i2c-gpio";
563 gpios = <&pioC 0 0 /* sda */
566 i2c-gpio,sda-open-drain;
567 i2c-gpio,scl-open-drain;
568 i2c-gpio,delay-us = <2>; /* ~100 kHz */
569 #address-cells = <1>;
575 compatible = "i2c-gpio";
576 gpios = <&pioB 4 0 /* sda */
579 i2c-gpio,sda-open-drain;
580 i2c-gpio,scl-open-drain;
581 i2c-gpio,delay-us = <2>; /* ~100 kHz */
582 #address-cells = <1>;