2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
10 #include "skeleton.dtsi"
13 compatible = "ti,dm816";
14 interrupt-parent = <&intc>;
30 compatible = "arm,cortex-a8";
37 compatible = "arm,cortex-a8-pmu";
42 * The soc node represents the soc top level view. It is used for IPs
43 * that are not memory mapped in the MPU view or for the MPU itself.
46 compatible = "ti,omap-infra";
48 compatible = "ti,omap3-mpu";
54 * XXX: Use a flat representation of the dm816x interconnect.
55 * The real dm816x interconnect network is quite complex. Since
56 * it will not bring real advantage to represent that in DT
57 * for the moment, just use a fake OCP bus entry to represent
58 * the whole bus hierarchy.
61 compatible = "simple-bus";
62 reg = <0x44000000 0x10000>;
69 compatible = "ti,dm816-prcm";
70 reg = <0x48180000 0x4000>;
77 prcm_clockdomains: clockdomains {
82 compatible = "ti,dm816-scrm", "simple-bus";
83 reg = <0x48140000 0x21000>;
86 ranges = <0 0x48140000 0x21000>;
88 dm816x_pinmux: pinmux@800 {
89 compatible = "pinctrl-single";
93 pinctrl-single,register-width = <16>;
94 pinctrl-single,function-mask = <0xf>;
97 /* Device Configuration Registers */
98 scm_conf: syscon@600 {
99 compatible = "syscon", "simple-bus";
101 #address-cells = <1>;
103 ranges = <0 0x600 0x110>;
105 usb_phy0: usb-phy@20 {
106 compatible = "ti,dm8168-usb-phy";
109 clocks = <&main_fapll 6>;
110 clock-names = "refclk";
112 syscon = <&scm_conf>;
115 usb_phy1: usb-phy@28 {
116 compatible = "ti,dm8168-usb-phy";
119 clocks = <&main_fapll 6>;
120 clock-names = "refclk";
122 syscon = <&scm_conf>;
126 scrm_clocks: clocks {
127 #address-cells = <1>;
131 scrm_clockdomains: clockdomains {
135 edma: edma@49000000 {
136 compatible = "ti,edma3";
137 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
138 reg = <0x49000000 0x10000>,
140 interrupts = <12 13 14>;
145 compatible = "ti,816-elm";
147 reg = <0x48080000 0x2000>;
151 gpio1: gpio@48032000 {
152 compatible = "ti,omap4-gpio";
155 reg = <0x48032000 0x1000>;
159 interrupt-controller;
160 #interrupt-cells = <2>;
163 gpio2: gpio@4804c000 {
164 compatible = "ti,omap4-gpio";
167 reg = <0x4804c000 0x1000>;
171 interrupt-controller;
172 #interrupt-cells = <2>;
175 gpmc: gpmc@50000000 {
176 compatible = "ti,am3352-gpmc";
178 reg = <0x50000000 0x2000>;
179 #address-cells = <2>;
185 gpmc,num-waitpins = <2>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
193 compatible = "ti,omap4-i2c";
195 reg = <0x48028000 0x1000>;
196 #address-cells = <1>;
199 dmas = <&edma 58 &edma 59>;
200 dma-names = "tx", "rx";
204 compatible = "ti,omap4-i2c";
206 reg = <0x4802a000 0x1000>;
207 #address-cells = <1>;
210 dmas = <&edma 60 &edma 61>;
211 dma-names = "tx", "rx";
214 intc: interrupt-controller@48200000 {
215 compatible = "ti,dm816-intc";
216 interrupt-controller;
217 #interrupt-cells = <1>;
218 reg = <0x48200000 0x1000>;
222 compatible = "ti,am3352-rtc", "ti,da830-rtc";
223 reg = <0x480c0000 0x1000>;
224 interrupts = <75 76>;
228 mailbox: mailbox@480c8000 {
229 compatible = "ti,omap4-mailbox";
230 reg = <0x480c8000 0x2000>;
232 ti,hwmods = "mailbox";
234 ti,mbox-num-users = <4>;
235 ti,mbox-num-fifos = <12>;
237 ti,mbox-tx = <3 0 0>;
238 ti,mbox-rx = <0 0 0>;
242 spinbox: spinbox@480ca000 {
243 compatible = "ti,omap4-hwspinlock";
244 reg = <0x480ca000 0x2000>;
245 ti,hwmods = "spinbox";
249 mdio: mdio@4a100800 {
250 compatible = "ti,davinci_mdio";
251 #address-cells = <1>;
253 reg = <0x4a100800 0x100>;
254 ti,hwmods = "davinci_mdio";
255 bus_freq = <1000000>;
256 phy0: ethernet-phy@0 {
259 phy1: ethernet-phy@1 {
264 eth0: ethernet@4a100000 {
265 compatible = "ti,dm816-emac";
267 reg = <0x4a100000 0x800
269 clocks = <&sysclk24_ck>;
270 syscon = <&scm_conf>;
271 ti,davinci-ctrl-reg-offset = <0>;
272 ti,davinci-ctrl-mod-reg-offset = <0x900>;
273 ti,davinci-ctrl-ram-offset = <0x2000>;
274 ti,davinci-ctrl-ram-size = <0x2000>;
275 interrupts = <40 41 42 43>;
276 phy-handle = <&phy0>;
279 eth1: ethernet@4a120000 {
280 compatible = "ti,dm816-emac";
282 reg = <0x4a120000 0x4000>;
283 clocks = <&sysclk24_ck>;
284 syscon = <&scm_conf>;
285 ti,davinci-ctrl-reg-offset = <0>;
286 ti,davinci-ctrl-mod-reg-offset = <0x900>;
287 ti,davinci-ctrl-ram-offset = <0x2000>;
288 ti,davinci-ctrl-ram-size = <0x2000>;
289 interrupts = <44 45 46 47>;
290 phy-handle = <&phy1>;
293 mcspi1: spi@48030000 {
294 compatible = "ti,omap4-mcspi";
295 reg = <0x48030000 0x1000>;
296 #address-cells = <1>;
300 ti,hwmods = "mcspi1";
301 dmas = <&edma 16 &edma 17
305 dma-names = "tx0", "rx0", "tx1", "rx1",
306 "tx2", "rx2", "tx3", "rx3";
310 compatible = "ti,omap4-hsmmc";
311 reg = <0x48060000 0x11000>;
314 dmas = <&edma 24 &edma 25>;
315 dma-names = "tx", "rx";
318 timer1: timer@4802e000 {
319 compatible = "ti,dm816-timer";
320 reg = <0x4802e000 0x2000>;
322 ti,hwmods = "timer1";
326 timer2: timer@48040000 {
327 compatible = "ti,dm816-timer";
328 reg = <0x48040000 0x2000>;
330 ti,hwmods = "timer2";
333 timer3: timer@48042000 {
334 compatible = "ti,dm816-timer";
335 reg = <0x48042000 0x2000>;
337 ti,hwmods = "timer3";
340 timer4: timer@48044000 {
341 compatible = "ti,dm816-timer";
342 reg = <0x48044000 0x2000>;
344 ti,hwmods = "timer4";
348 timer5: timer@48046000 {
349 compatible = "ti,dm816-timer";
350 reg = <0x48046000 0x2000>;
352 ti,hwmods = "timer5";
356 timer6: timer@48048000 {
357 compatible = "ti,dm816-timer";
358 reg = <0x48048000 0x2000>;
360 ti,hwmods = "timer6";
364 timer7: timer@4804a000 {
365 compatible = "ti,dm816-timer";
366 reg = <0x4804a000 0x2000>;
368 ti,hwmods = "timer7";
372 uart1: uart@48020000 {
373 compatible = "ti,omap3-uart";
375 reg = <0x48020000 0x2000>;
376 clock-frequency = <48000000>;
378 dmas = <&edma 26 &edma 27>;
379 dma-names = "tx", "rx";
382 uart2: uart@48022000 {
383 compatible = "ti,omap3-uart";
385 reg = <0x48022000 0x2000>;
386 clock-frequency = <48000000>;
388 dmas = <&edma 28 &edma 29>;
389 dma-names = "tx", "rx";
392 uart3: uart@48024000 {
393 compatible = "ti,omap3-uart";
395 reg = <0x48024000 0x2000>;
396 clock-frequency = <48000000>;
398 dmas = <&edma 30 &edma 31>;
399 dma-names = "tx", "rx";
402 /* NOTE: USB needs a transceiver driver for phys to work */
403 usb: usb_otg_hs@47401000 {
404 compatible = "ti,am33xx-usb";
405 reg = <0x47401000 0x400000>;
407 #address-cells = <1>;
409 ti,hwmods = "usb_otg_hs";
412 compatible = "ti,musb-dm816";
413 reg = <0x47401400 0x400
415 reg-names = "mc", "control";
417 interrupt-names = "mc";
419 interface-type = <0>;
421 phy-names = "usb2-phy";
422 mentor,multipoint = <1>;
423 mentor,num-eps = <16>;
424 mentor,ram-bits = <12>;
425 mentor,power = <500>;
427 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
428 &cppi41dma 2 0 &cppi41dma 3 0
429 &cppi41dma 4 0 &cppi41dma 5 0
430 &cppi41dma 6 0 &cppi41dma 7 0
431 &cppi41dma 8 0 &cppi41dma 9 0
432 &cppi41dma 10 0 &cppi41dma 11 0
433 &cppi41dma 12 0 &cppi41dma 13 0
434 &cppi41dma 14 0 &cppi41dma 0 1
435 &cppi41dma 1 1 &cppi41dma 2 1
436 &cppi41dma 3 1 &cppi41dma 4 1
437 &cppi41dma 5 1 &cppi41dma 6 1
438 &cppi41dma 7 1 &cppi41dma 8 1
439 &cppi41dma 9 1 &cppi41dma 10 1
440 &cppi41dma 11 1 &cppi41dma 12 1
441 &cppi41dma 13 1 &cppi41dma 14 1>;
443 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
444 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
446 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
447 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
452 compatible = "ti,musb-dm816";
453 reg = <0x47401c00 0x400
455 reg-names = "mc", "control";
457 interrupt-names = "mc";
459 interface-type = <0>;
461 phy-names = "usb2-phy";
462 mentor,multipoint = <1>;
463 mentor,num-eps = <16>;
464 mentor,ram-bits = <12>;
465 mentor,power = <500>;
467 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
468 &cppi41dma 17 0 &cppi41dma 18 0
469 &cppi41dma 19 0 &cppi41dma 20 0
470 &cppi41dma 21 0 &cppi41dma 22 0
471 &cppi41dma 23 0 &cppi41dma 24 0
472 &cppi41dma 25 0 &cppi41dma 26 0
473 &cppi41dma 27 0 &cppi41dma 28 0
474 &cppi41dma 29 0 &cppi41dma 15 1
475 &cppi41dma 16 1 &cppi41dma 17 1
476 &cppi41dma 18 1 &cppi41dma 19 1
477 &cppi41dma 20 1 &cppi41dma 21 1
478 &cppi41dma 22 1 &cppi41dma 23 1
479 &cppi41dma 24 1 &cppi41dma 25 1
480 &cppi41dma 26 1 &cppi41dma 27 1
481 &cppi41dma 28 1 &cppi41dma 29 1>;
483 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
484 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
486 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
487 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
491 cppi41dma: dma-controller@47402000 {
492 compatible = "ti,am3359-cppi41";
493 reg = <0x47400000 0x1000
497 reg-names = "glue", "controller", "scheduler", "queuemgr";
499 interrupt-names = "glue";
501 #dma-channels = <30>;
502 #dma-requests = <256>;
506 wd_timer2: wd_timer@480c2000 {
507 compatible = "ti,omap3-wdt";
508 ti,hwmods = "wd_timer";
509 reg = <0x480c2000 0x1000>;
515 #include "dm816x-clocks.dtsi"