arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &dwmmc_0;
  37                 mshc1 = &dwmmc_1;
  38                 mshc2 = &dwmmc_2;
  39                 mshc3 = &dwmmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                 };
  64                 cpu@1 {
  65                         device_type = "cpu";
  66                         compatible = "arm,cortex-a15";
  67                         reg = <1>;
  68                 };
  69         };
  70
  71         pd_gsc: gsc-power-domain@10044000 {
  72                 compatible = "samsung,exynos4210-pd";
  73                 reg = <0x10044000 0x20>;
  74         };
  75
  76         pd_mfc: mfc-power-domain@10044040 {
  77                 compatible = "samsung,exynos4210-pd";
  78                 reg = <0x10044040 0x20>;
  79         };
  80
  81         clock: clock-controller@10010000 {
  82                 compatible = "samsung,exynos5250-clock";
  83                 reg = <0x10010000 0x30000>;
  84                 #clock-cells = <1>;
  85         };
  86
  87         clock_audss: audss-clock-controller@3810000 {
  88                 compatible = "samsung,exynos5250-audss-clock";
  89                 reg = <0x03810000 0x0C>;
  90                 #clock-cells = <1>;
  91         };
  92
  93         timer {
  94                 compatible = "arm,armv7-timer";
  95                 interrupts = <1 13 0xf08>,
  96                              <1 14 0xf08>,
  97                              <1 11 0xf08>,
  98                              <1 10 0xf08>;
  99         };
 100
 101         mct@101C0000 {
 102                 compatible = "samsung,exynos4210-mct";
 103                 reg = <0x101C0000 0x800>;
 104                 interrupt-controller;
 105                 #interrups-cells = <2>;
 106                 interrupt-parent = <&mct_map>;
 107                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 108                              <4 0>, <5 0>;
 109                 clocks = <&clock 1>, <&clock 335>;
 110                 clock-names = "fin_pll", "mct";
 111
 112                 mct_map: mct-map {
 113                         #interrupt-cells = <2>;
 114                         #address-cells = <0>;
 115                         #size-cells = <0>;
 116                         interrupt-map = <0x0 0 &combiner 23 3>,
 117                                         <0x1 0 &combiner 23 4>,
 118                                         <0x2 0 &combiner 25 2>,
 119                                         <0x3 0 &combiner 25 3>,
 120                                         <0x4 0 &gic 0 120 0>,
 121                                         <0x5 0 &gic 0 121 0>;
 122                 };
 123         };
 124
 125         pmu {
 126                 compatible = "arm,cortex-a15-pmu";
 127                 interrupt-parent = <&combiner>;
 128                 interrupts = <1 2>, <22 4>;
 129         };
 130
 131         pinctrl_0: pinctrl@11400000 {
 132                 compatible = "samsung,exynos5250-pinctrl";
 133                 reg = <0x11400000 0x1000>;
 134                 interrupts = <0 46 0>;
 135
 136                 wakup_eint: wakeup-interrupt-controller {
 137                         compatible = "samsung,exynos4210-wakeup-eint";
 138                         interrupt-parent = <&gic>;
 139                         interrupts = <0 32 0>;
 140                 };
 141         };
 142
 143         pinctrl_1: pinctrl@13400000 {
 144                 compatible = "samsung,exynos5250-pinctrl";
 145                 reg = <0x13400000 0x1000>;
 146                 interrupts = <0 45 0>;
 147         };
 148
 149         pinctrl_2: pinctrl@10d10000 {
 150                 compatible = "samsung,exynos5250-pinctrl";
 151                 reg = <0x10d10000 0x1000>;
 152                 interrupts = <0 50 0>;
 153         };
 154
 155         pinctrl_3: pinctrl@03860000 {
 156                 compatible = "samsung,exynos5250-pinctrl";
 157                 reg = <0x03860000 0x1000>;
 158                 interrupts = <0 47 0>;
 159         };
 160
 161         watchdog {
 162                 clocks = <&clock 336>;
 163                 clock-names = "watchdog";
 164         };
 165
 166         codec@11000000 {
 167                 compatible = "samsung,mfc-v6";
 168                 reg = <0x11000000 0x10000>;
 169                 interrupts = <0 96 0>;
 170                 samsung,power-domain = <&pd_mfc>;
 171         };
 172
 173         rtc {
 174                 clocks = <&clock 337>;
 175                 clock-names = "rtc";
 176         };
 177
 178         tmu@10060000 {
 179                 compatible = "samsung,exynos5250-tmu";
 180                 reg = <0x10060000 0x100>;
 181                 interrupts = <0 65 0>;
 182                 clocks = <&clock 338>;
 183                 clock-names = "tmu_apbif";
 184         };
 185
 186         serial@12C00000 {
 187                 clocks = <&clock 289>, <&clock 146>;
 188                 clock-names = "uart", "clk_uart_baud0";
 189         };
 190
 191         serial@12C10000 {
 192                 clocks = <&clock 290>, <&clock 147>;
 193                 clock-names = "uart", "clk_uart_baud0";
 194         };
 195
 196         serial@12C20000 {
 197                 clocks = <&clock 291>, <&clock 148>;
 198                 clock-names = "uart", "clk_uart_baud0";
 199         };
 200
 201         serial@12C30000 {
 202                 clocks = <&clock 292>, <&clock 149>;
 203                 clock-names = "uart", "clk_uart_baud0";
 204         };
 205
 206         sata@122F0000 {
 207                 compatible = "samsung,exynos5-sata-ahci";
 208                 reg = <0x122F0000 0x1ff>;
 209                 interrupts = <0 115 0>;
 210                 clocks = <&clock 277>, <&clock 143>;
 211                 clock-names = "sata", "sclk_sata";
 212         };
 213
 214         sata-phy@12170000 {
 215                 compatible = "samsung,exynos5-sata-phy";
 216                 reg = <0x12170000 0x1ff>;
 217         };
 218
 219         i2c_0: i2c@12C60000 {
 220                 compatible = "samsung,s3c2440-i2c";
 221                 reg = <0x12C60000 0x100>;
 222                 interrupts = <0 56 0>;
 223                 #address-cells = <1>;
 224                 #size-cells = <0>;
 225                 clocks = <&clock 294>;
 226                 clock-names = "i2c";
 227                 pinctrl-names = "default";
 228                 pinctrl-0 = <&i2c0_bus>;
 229         };
 230
 231         i2c_1: i2c@12C70000 {
 232                 compatible = "samsung,s3c2440-i2c";
 233                 reg = <0x12C70000 0x100>;
 234                 interrupts = <0 57 0>;
 235                 #address-cells = <1>;
 236                 #size-cells = <0>;
 237                 clocks = <&clock 295>;
 238                 clock-names = "i2c";
 239                 pinctrl-names = "default";
 240                 pinctrl-0 = <&i2c1_bus>;
 241         };
 242
 243         i2c_2: i2c@12C80000 {
 244                 compatible = "samsung,s3c2440-i2c";
 245                 reg = <0x12C80000 0x100>;
 246                 interrupts = <0 58 0>;
 247                 #address-cells = <1>;
 248                 #size-cells = <0>;
 249                 clocks = <&clock 296>;
 250                 clock-names = "i2c";
 251                 pinctrl-names = "default";
 252                 pinctrl-0 = <&i2c2_bus>;
 253         };
 254
 255         i2c_3: i2c@12C90000 {
 256                 compatible = "samsung,s3c2440-i2c";
 257                 reg = <0x12C90000 0x100>;
 258                 interrupts = <0 59 0>;
 259                 #address-cells = <1>;
 260                 #size-cells = <0>;
 261                 clocks = <&clock 297>;
 262                 clock-names = "i2c";
 263                 pinctrl-names = "default";
 264                 pinctrl-0 = <&i2c3_bus>;
 265         };
 266
 267         i2c_4: i2c@12CA0000 {
 268                 compatible = "samsung,s3c2440-i2c";
 269                 reg = <0x12CA0000 0x100>;
 270                 interrupts = <0 60 0>;
 271                 #address-cells = <1>;
 272                 #size-cells = <0>;
 273                 clocks = <&clock 298>;
 274                 clock-names = "i2c";
 275                 pinctrl-names = "default";
 276                 pinctrl-0 = <&i2c4_bus>;
 277         };
 278
 279         i2c_5: i2c@12CB0000 {
 280                 compatible = "samsung,s3c2440-i2c";
 281                 reg = <0x12CB0000 0x100>;
 282                 interrupts = <0 61 0>;
 283                 #address-cells = <1>;
 284                 #size-cells = <0>;
 285                 clocks = <&clock 299>;
 286                 clock-names = "i2c";
 287                 pinctrl-names = "default";
 288                 pinctrl-0 = <&i2c5_bus>;
 289         };
 290
 291         i2c_6: i2c@12CC0000 {
 292                 compatible = "samsung,s3c2440-i2c";
 293                 reg = <0x12CC0000 0x100>;
 294                 interrupts = <0 62 0>;
 295                 #address-cells = <1>;
 296                 #size-cells = <0>;
 297                 clocks = <&clock 300>;
 298                 clock-names = "i2c";
 299                 pinctrl-names = "default";
 300                 pinctrl-0 = <&i2c6_bus>;
 301         };
 302
 303         i2c_7: i2c@12CD0000 {
 304                 compatible = "samsung,s3c2440-i2c";
 305                 reg = <0x12CD0000 0x100>;
 306                 interrupts = <0 63 0>;
 307                 #address-cells = <1>;
 308                 #size-cells = <0>;
 309                 clocks = <&clock 301>;
 310                 clock-names = "i2c";
 311                 pinctrl-names = "default";
 312                 pinctrl-0 = <&i2c7_bus>;
 313         };
 314
 315         i2c_8: i2c@12CE0000 {
 316                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 317                 reg = <0x12CE0000 0x1000>;
 318                 interrupts = <0 64 0>;
 319                 #address-cells = <1>;
 320                 #size-cells = <0>;
 321                 clocks = <&clock 302>;
 322                 clock-names = "i2c";
 323         };
 324
 325         i2c@121D0000 {
 326                 compatible = "samsung,exynos5-sata-phy-i2c";
 327                 reg = <0x121D0000 0x100>;
 328                 #address-cells = <1>;
 329                 #size-cells = <0>;
 330                 clocks = <&clock 288>;
 331                 clock-names = "i2c";
 332         };
 333
 334         spi_0: spi@12d20000 {
 335                 compatible = "samsung,exynos4210-spi";
 336                 reg = <0x12d20000 0x100>;
 337                 interrupts = <0 66 0>;
 338                 dmas = <&pdma0 5
 339                         &pdma0 4>;
 340                 dma-names = "tx", "rx";
 341                 #address-cells = <1>;
 342                 #size-cells = <0>;
 343                 clocks = <&clock 304>, <&clock 154>;
 344                 clock-names = "spi", "spi_busclk0";
 345                 pinctrl-names = "default";
 346                 pinctrl-0 = <&spi0_bus>;
 347         };
 348
 349         spi_1: spi@12d30000 {
 350                 compatible = "samsung,exynos4210-spi";
 351                 reg = <0x12d30000 0x100>;
 352                 interrupts = <0 67 0>;
 353                 dmas = <&pdma1 5
 354                         &pdma1 4>;
 355                 dma-names = "tx", "rx";
 356                 #address-cells = <1>;
 357                 #size-cells = <0>;
 358                 clocks = <&clock 305>, <&clock 155>;
 359                 clock-names = "spi", "spi_busclk0";
 360                 pinctrl-names = "default";
 361                 pinctrl-0 = <&spi1_bus>;
 362         };
 363
 364         spi_2: spi@12d40000 {
 365                 compatible = "samsung,exynos4210-spi";
 366                 reg = <0x12d40000 0x100>;
 367                 interrupts = <0 68 0>;
 368                 dmas = <&pdma0 7
 369                         &pdma0 6>;
 370                 dma-names = "tx", "rx";
 371                 #address-cells = <1>;
 372                 #size-cells = <0>;
 373                 clocks = <&clock 306>, <&clock 156>;
 374                 clock-names = "spi", "spi_busclk0";
 375                 pinctrl-names = "default";
 376                 pinctrl-0 = <&spi2_bus>;
 377         };
 378
 379         dwmmc_0: dwmmc0@12200000 {
 380                 reg = <0x12200000 0x1000>;
 381                 clocks = <&clock 280>, <&clock 139>;
 382                 clock-names = "biu", "ciu";
 383         };
 384
 385         dwmmc_1: dwmmc1@12210000 {
 386                 reg = <0x12210000 0x1000>;
 387                 clocks = <&clock 281>, <&clock 140>;
 388                 clock-names = "biu", "ciu";
 389         };
 390
 391         dwmmc_2: dwmmc2@12220000 {
 392                 reg = <0x12220000 0x1000>;
 393                 clocks = <&clock 282>, <&clock 141>;
 394                 clock-names = "biu", "ciu";
 395         };
 396
 397         dwmmc_3: dwmmc3@12230000 {
 398                 compatible = "samsung,exynos5250-dw-mshc";
 399                 reg = <0x12230000 0x1000>;
 400                 interrupts = <0 78 0>;
 401                 #address-cells = <1>;
 402                 #size-cells = <0>;
 403                 clocks = <&clock 283>, <&clock 142>;
 404                 clock-names = "biu", "ciu";
 405         };
 406
 407         i2s0: i2s@03830000 {
 408                 compatible = "samsung,s5pv210-i2s";
 409                 reg = <0x03830000 0x100>;
 410                 dmas = <&pdma0 10
 411                         &pdma0 9
 412                         &pdma0 8>;
 413                 dma-names = "tx", "rx", "tx-sec";
 414                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 415                         <&clock_audss EXYNOS_I2S_BUS>,
 416                         <&clock_audss EXYNOS_SCLK_I2S>;
 417                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 418                 samsung,idma-addr = <0x03000000>;
 419                 pinctrl-names = "default";
 420                 pinctrl-0 = <&i2s0_bus>;
 421         };
 422
 423         i2s1: i2s@12D60000 {
 424                 compatible = "samsung,s3c6410-i2s";
 425                 reg = <0x12D60000 0x100>;
 426                 dmas = <&pdma1 12
 427                         &pdma1 11>;
 428                 dma-names = "tx", "rx";
 429                 clocks = <&clock 307>, <&clock 157>;
 430                 clock-names = "iis", "i2s_opclk0";
 431                 pinctrl-names = "default";
 432                 pinctrl-0 = <&i2s1_bus>;
 433         };
 434
 435         i2s2: i2s@12D70000 {
 436                 compatible = "samsung,s3c6410-i2s";
 437                 reg = <0x12D70000 0x100>;
 438                 dmas = <&pdma0 12
 439                         &pdma0 11>;
 440                 dma-names = "tx", "rx";
 441                 clocks = <&clock 308>, <&clock 158>;
 442                 clock-names = "iis", "i2s_opclk0";
 443                 pinctrl-names = "default";
 444                 pinctrl-0 = <&i2s2_bus>;
 445         };
 446
 447         usb@12000000 {
 448                 compatible = "samsung,exynos5250-dwusb3";
 449                 clocks = <&clock 286>;
 450                 clock-names = "usbdrd30";
 451                 #address-cells = <1>;
 452                 #size-cells = <1>;
 453                 ranges;
 454
 455                 dwc3 {
 456                         compatible = "synopsys,dwc3";
 457                         reg = <0x12000000 0x10000>;
 458                         interrupts = <0 72 0>;
 459                         usb-phy = <&usb2_phy &usb3_phy>;
 460                 };
 461         };
 462
 463         usb3_phy: usbphy@12100000 {
 464                 compatible = "samsung,exynos5250-usb3phy";
 465                 reg = <0x12100000 0x100>;
 466                 clocks = <&clock 1>, <&clock 286>;
 467                 clock-names = "ext_xtal", "usbdrd30";
 468                 #address-cells = <1>;
 469                 #size-cells = <1>;
 470                 ranges;
 471
 472                 usbphy-sys {
 473                         reg = <0x10040704 0x8>;
 474                 };
 475         };
 476
 477         usb@12110000 {
 478                 compatible = "samsung,exynos4210-ehci";
 479                 reg = <0x12110000 0x100>;
 480                 interrupts = <0 71 0>;
 481
 482                 clocks = <&clock 285>;
 483                 clock-names = "usbhost";
 484         };
 485
 486         usb@12120000 {
 487                 compatible = "samsung,exynos4210-ohci";
 488                 reg = <0x12120000 0x100>;
 489                 interrupts = <0 71 0>;
 490
 491                 clocks = <&clock 285>;
 492                 clock-names = "usbhost";
 493         };
 494
 495         usb2_phy: usbphy@12130000 {
 496                 compatible = "samsung,exynos5250-usb2phy";
 497                 reg = <0x12130000 0x100>;
 498                 clocks = <&clock 1>, <&clock 285>;
 499                 clock-names = "ext_xtal", "usbhost";
 500                 #address-cells = <1>;
 501                 #size-cells = <1>;
 502                 ranges;
 503
 504                 usbphy-sys {
 505                         reg = <0x10040704 0x8>,
 506                               <0x10050230 0x4>;
 507                 };
 508         };
 509
 510         amba {
 511                 #address-cells = <1>;
 512                 #size-cells = <1>;
 513                 compatible = "arm,amba-bus";
 514                 interrupt-parent = <&gic>;
 515                 ranges;
 516
 517                 pdma0: pdma@121A0000 {
 518                         compatible = "arm,pl330", "arm,primecell";
 519                         reg = <0x121A0000 0x1000>;
 520                         interrupts = <0 34 0>;
 521                         clocks = <&clock 275>;
 522                         clock-names = "apb_pclk";
 523                         #dma-cells = <1>;
 524                         #dma-channels = <8>;
 525                         #dma-requests = <32>;
 526                 };
 527
 528                 pdma1: pdma@121B0000 {
 529                         compatible = "arm,pl330", "arm,primecell";
 530                         reg = <0x121B0000 0x1000>;
 531                         interrupts = <0 35 0>;
 532                         clocks = <&clock 276>;
 533                         clock-names = "apb_pclk";
 534                         #dma-cells = <1>;
 535                         #dma-channels = <8>;
 536                         #dma-requests = <32>;
 537                 };
 538
 539                 mdma0: mdma@10800000 {
 540                         compatible = "arm,pl330", "arm,primecell";
 541                         reg = <0x10800000 0x1000>;
 542                         interrupts = <0 33 0>;
 543                         clocks = <&clock 271>;
 544                         clock-names = "apb_pclk";
 545                         #dma-cells = <1>;
 546                         #dma-channels = <8>;
 547                         #dma-requests = <1>;
 548                 };
 549
 550                 mdma1: mdma@11C10000 {
 551                         compatible = "arm,pl330", "arm,primecell";
 552                         reg = <0x11C10000 0x1000>;
 553                         interrupts = <0 124 0>;
 554                         clocks = <&clock 271>;
 555                         clock-names = "apb_pclk";
 556                         #dma-cells = <1>;
 557                         #dma-channels = <8>;
 558                         #dma-requests = <1>;
 559                 };
 560         };
 561
 562         gsc_0:  gsc@13e00000 {
 563                 compatible = "samsung,exynos5-gsc";
 564                 reg = <0x13e00000 0x1000>;
 565                 interrupts = <0 85 0>;
 566                 samsung,power-domain = <&pd_gsc>;
 567                 clocks = <&clock 256>;
 568                 clock-names = "gscl";
 569         };
 570
 571         gsc_1:  gsc@13e10000 {
 572                 compatible = "samsung,exynos5-gsc";
 573                 reg = <0x13e10000 0x1000>;
 574                 interrupts = <0 86 0>;
 575                 samsung,power-domain = <&pd_gsc>;
 576                 clocks = <&clock 257>;
 577                 clock-names = "gscl";
 578         };
 579
 580         gsc_2:  gsc@13e20000 {
 581                 compatible = "samsung,exynos5-gsc";
 582                 reg = <0x13e20000 0x1000>;
 583                 interrupts = <0 87 0>;
 584                 samsung,power-domain = <&pd_gsc>;
 585                 clocks = <&clock 258>;
 586                 clock-names = "gscl";
 587         };
 588
 589         gsc_3:  gsc@13e30000 {
 590                 compatible = "samsung,exynos5-gsc";
 591                 reg = <0x13e30000 0x1000>;
 592                 interrupts = <0 88 0>;
 593                 samsung,power-domain = <&pd_gsc>;
 594                 clocks = <&clock 259>;
 595                 clock-names = "gscl";
 596         };
 597
 598         hdmi {
 599                 compatible = "samsung,exynos4212-hdmi";
 600                 reg = <0x14530000 0x70000>;
 601                 interrupts = <0 95 0>;
 602                 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
 603                                 <&clock 333>, <&clock 333>;
 604                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 605                                 "sclk_hdmiphy", "hdmiphy";
 606         };
 607
 608         mixer {
 609                 compatible = "samsung,exynos5250-mixer";
 610                 reg = <0x14450000 0x10000>;
 611                 interrupts = <0 94 0>;
 612         };
 613
 614         dp-controller {
 615                 compatible = "samsung,exynos5-dp";
 616                 reg = <0x145b0000 0x1000>;
 617                 interrupts = <10 3>;
 618                 interrupt-parent = <&combiner>;
 619                 clocks = <&clock 342>;
 620                 clock-names = "dp";
 621                 #address-cells = <1>;
 622                 #size-cells = <0>;
 623
 624                 dptx-phy {
 625                         reg = <0x10040720>;
 626                         samsung,enable-mask = <1>;
 627                 };
 628         };
 629
 630         fimd {
 631                 compatible = "samsung,exynos5250-fimd";
 632                 interrupt-parent = <&combiner>;
 633                 reg = <0x14400000 0x40000>;
 634                 interrupt-names = "fifo", "vsync", "lcd_sys";
 635                 interrupts = <18 4>, <18 5>, <18 6>;
 636                 clocks = <&clock 133>, <&clock 339>;
 637                 clock-names = "sclk_fimd", "fimd";
 638         };
 639 };