Merge tag 'drm-intel-next-2016-01-24' of git://anongit.freedesktop.org/drm-intel...
[deliverable/linux.git] / arch / arm / boot / dts / exynos5422-odroidxu3-common.dtsi
1 /*
2 * Hardkernel Odroid XU3 board device tree source
3 *
4 * Copyright (c) 2014 Collabora Ltd.
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/sound/samsung-i2s.h>
17 #include "exynos5800.dtsi"
18 #include "exynos5422-cpus.dtsi"
19 #include "exynos5422-cpu-thermal.dtsi"
20
21 / {
22 memory {
23 reg = <0x40000000 0x7EA00000>;
24 };
25
26 chosen {
27 linux,stdout-path = &serial_2;
28 };
29
30 firmware@02073000 {
31 compatible = "samsung,secure-firmware";
32 reg = <0x02073000 0x1000>;
33 };
34
35 fixed-rate-clocks {
36 oscclk {
37 compatible = "samsung,exynos5420-oscclk";
38 clock-frequency = <24000000>;
39 };
40 };
41
42 emmc_pwrseq: pwrseq {
43 pinctrl-0 = <&emmc_nrst_pin>;
44 pinctrl-names = "default";
45 compatible = "mmc-pwrseq-emmc";
46 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
47 };
48
49 fan0: pwm-fan {
50 compatible = "pwm-fan";
51 pwms = <&pwm 0 20972 0>;
52 cooling-min-state = <0>;
53 cooling-max-state = <3>;
54 #cooling-cells = <2>;
55 cooling-levels = <0 130 170 230>;
56 };
57 };
58
59 &clock_audss {
60 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
61 <&clock_audss EXYNOS_MOUT_I2S>,
62 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
63 assigned-clock-parents = <&clock CLK_FIN_PLL>,
64 <&clock_audss EXYNOS_MOUT_AUDSS>;
65 assigned-clock-rates = <0>,
66 <0>,
67 <19200000>;
68 };
69
70 &hdmi {
71 status = "okay";
72 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&hdmi_hpd_irq>;
75
76 vdd_osc-supply = <&ldo7_reg>;
77 vdd_pll-supply = <&ldo6_reg>;
78 vdd-supply = <&ldo6_reg>;
79 };
80
81 &hsi2c_4 {
82 status = "okay";
83
84 s2mps11_pmic@66 {
85 compatible = "samsung,s2mps11-pmic";
86 reg = <0x66>;
87 s2mps11,buck2-ramp-delay = <12>;
88 s2mps11,buck34-ramp-delay = <12>;
89 s2mps11,buck16-ramp-delay = <12>;
90 s2mps11,buck6-ramp-enable = <1>;
91 s2mps11,buck2-ramp-enable = <1>;
92 s2mps11,buck3-ramp-enable = <1>;
93 s2mps11,buck4-ramp-enable = <1>;
94 samsung,s2mps11-acokb-ground;
95
96 interrupt-parent = <&gpx0>;
97 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&s2mps11_irq>;
100
101 s2mps11_osc: clocks {
102 #clock-cells = <1>;
103 clock-output-names = "s2mps11_ap",
104 "s2mps11_cp", "s2mps11_bt";
105 };
106
107 regulators {
108 ldo1_reg: LDO1 {
109 regulator-name = "vdd_ldo1";
110 regulator-min-microvolt = <1000000>;
111 regulator-max-microvolt = <1000000>;
112 regulator-always-on;
113 };
114
115 ldo3_reg: LDO3 {
116 regulator-name = "vdd_ldo3";
117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <1800000>;
119 regulator-always-on;
120 };
121
122 ldo5_reg: LDO5 {
123 regulator-name = "vdd_ldo5";
124 regulator-min-microvolt = <1800000>;
125 regulator-max-microvolt = <1800000>;
126 regulator-always-on;
127 };
128
129 ldo6_reg: LDO6 {
130 regulator-name = "vdd_ldo6";
131 regulator-min-microvolt = <1000000>;
132 regulator-max-microvolt = <1000000>;
133 regulator-always-on;
134 };
135
136 ldo7_reg: LDO7 {
137 regulator-name = "vdd_ldo7";
138 regulator-min-microvolt = <1800000>;
139 regulator-max-microvolt = <1800000>;
140 regulator-always-on;
141 };
142
143 ldo8_reg: LDO8 {
144 regulator-name = "vdd_ldo8";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
147 regulator-always-on;
148 };
149
150 ldo9_reg: LDO9 {
151 regulator-name = "vdd_ldo9";
152 regulator-min-microvolt = <3000000>;
153 regulator-max-microvolt = <3000000>;
154 regulator-always-on;
155 };
156
157 ldo10_reg: LDO10 {
158 regulator-name = "vdd_ldo10";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
161 regulator-always-on;
162 };
163
164 ldo11_reg: LDO11 {
165 regulator-name = "vdd_ldo11";
166 regulator-min-microvolt = <1000000>;
167 regulator-max-microvolt = <1000000>;
168 regulator-always-on;
169 };
170
171 ldo12_reg: LDO12 {
172 regulator-name = "vdd_ldo12";
173 regulator-min-microvolt = <1800000>;
174 regulator-max-microvolt = <1800000>;
175 regulator-always-on;
176 };
177
178 ldo13_reg: LDO13 {
179 regulator-name = "vdd_ldo13";
180 regulator-min-microvolt = <2800000>;
181 regulator-max-microvolt = <2800000>;
182 regulator-always-on;
183 };
184
185 ldo15_reg: LDO15 {
186 regulator-name = "vdd_ldo15";
187 regulator-min-microvolt = <3100000>;
188 regulator-max-microvolt = <3100000>;
189 regulator-always-on;
190 };
191
192 ldo16_reg: LDO16 {
193 regulator-name = "vdd_ldo16";
194 regulator-min-microvolt = <2200000>;
195 regulator-max-microvolt = <2200000>;
196 regulator-always-on;
197 };
198
199 ldo17_reg: LDO17 {
200 regulator-name = "tsp_avdd";
201 regulator-min-microvolt = <3300000>;
202 regulator-max-microvolt = <3300000>;
203 regulator-always-on;
204 };
205
206 ldo19_reg: LDO19 {
207 regulator-name = "vdd_sd";
208 regulator-min-microvolt = <2800000>;
209 regulator-max-microvolt = <2800000>;
210 regulator-always-on;
211 };
212
213 ldo24_reg: LDO24 {
214 regulator-name = "tsp_io";
215 regulator-min-microvolt = <2800000>;
216 regulator-max-microvolt = <2800000>;
217 regulator-always-on;
218 };
219
220 ldo26_reg: LDO26 {
221 regulator-name = "vdd_ldo26";
222 regulator-min-microvolt = <3000000>;
223 regulator-max-microvolt = <3000000>;
224 regulator-always-on;
225 };
226
227 buck1_reg: BUCK1 {
228 regulator-name = "vdd_mif";
229 regulator-min-microvolt = <800000>;
230 regulator-max-microvolt = <1300000>;
231 regulator-always-on;
232 regulator-boot-on;
233 };
234
235 buck2_reg: BUCK2 {
236 regulator-name = "vdd_arm";
237 regulator-min-microvolt = <800000>;
238 regulator-max-microvolt = <1500000>;
239 regulator-always-on;
240 regulator-boot-on;
241 };
242
243 buck3_reg: BUCK3 {
244 regulator-name = "vdd_int";
245 regulator-min-microvolt = <800000>;
246 regulator-max-microvolt = <1400000>;
247 regulator-always-on;
248 regulator-boot-on;
249 };
250
251 buck4_reg: BUCK4 {
252 regulator-name = "vdd_g3d";
253 regulator-min-microvolt = <800000>;
254 regulator-max-microvolt = <1400000>;
255 regulator-always-on;
256 regulator-boot-on;
257 };
258
259 buck5_reg: BUCK5 {
260 regulator-name = "vdd_mem";
261 regulator-min-microvolt = <800000>;
262 regulator-max-microvolt = <1400000>;
263 regulator-always-on;
264 regulator-boot-on;
265 };
266
267 buck6_reg: BUCK6 {
268 regulator-name = "vdd_kfc";
269 regulator-min-microvolt = <800000>;
270 regulator-max-microvolt = <1500000>;
271 regulator-always-on;
272 regulator-boot-on;
273 };
274
275 buck7_reg: BUCK7 {
276 regulator-name = "vdd_1.0v_ldo";
277 regulator-min-microvolt = <800000>;
278 regulator-max-microvolt = <1500000>;
279 regulator-always-on;
280 regulator-boot-on;
281 };
282
283 buck8_reg: BUCK8 {
284 regulator-name = "vdd_1.8v_ldo";
285 regulator-min-microvolt = <800000>;
286 regulator-max-microvolt = <1500000>;
287 regulator-always-on;
288 regulator-boot-on;
289 };
290
291 buck9_reg: BUCK9 {
292 regulator-name = "vdd_2.8v_ldo";
293 regulator-min-microvolt = <3000000>;
294 regulator-max-microvolt = <3750000>;
295 regulator-always-on;
296 regulator-boot-on;
297 };
298
299 buck10_reg: BUCK10 {
300 regulator-name = "vdd_vmem";
301 regulator-min-microvolt = <2850000>;
302 regulator-max-microvolt = <2850000>;
303 regulator-always-on;
304 regulator-boot-on;
305 };
306 };
307 };
308 };
309
310 &i2c_2 {
311 samsung,i2c-sda-delay = <100>;
312 samsung,i2c-max-bus-freq = <66000>;
313 status = "okay";
314
315 hdmiddc@50 {
316 compatible = "samsung,exynos4210-hdmiddc";
317 reg = <0x50>;
318 };
319 };
320
321 &mfc {
322 samsung,mfc-r = <0x43000000 0x800000>;
323 samsung,mfc-l = <0x51000000 0x800000>;
324 };
325
326 &mmc_0 {
327 status = "okay";
328 mmc-pwrseq = <&emmc_pwrseq>;
329 cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
330 card-detect-delay = <200>;
331 samsung,dw-mshc-ciu-div = <3>;
332 samsung,dw-mshc-sdr-timing = <0 4>;
333 samsung,dw-mshc-ddr-timing = <0 2>;
334 samsung,dw-mshc-hs400-timing = <0 2>;
335 samsung,read-strobe-delay = <90>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
338 bus-width = <8>;
339 cap-mmc-highspeed;
340 mmc-hs200-1_8v;
341 mmc-hs400-1_8v;
342 };
343
344 &mmc_2 {
345 status = "okay";
346 card-detect-delay = <200>;
347 samsung,dw-mshc-ciu-div = <3>;
348 samsung,dw-mshc-sdr-timing = <0 4>;
349 samsung,dw-mshc-ddr-timing = <0 2>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
352 bus-width = <4>;
353 cap-sd-highspeed;
354 };
355
356 &pinctrl_0 {
357 hdmi_hpd_irq: hdmi-hpd-irq {
358 samsung,pins = "gpx3-7";
359 samsung,pin-function = <0>;
360 samsung,pin-pud = <1>;
361 samsung,pin-drv = <0>;
362 };
363
364 s2mps11_irq: s2mps11-irq {
365 samsung,pins = "gpx0-4";
366 samsung,pin-function = <0xf>;
367 samsung,pin-pud = <0>;
368 samsung,pin-drv = <0>;
369 };
370 };
371
372 &pinctrl_1 {
373 emmc_nrst_pin: emmc-nrst {
374 samsung,pins = "gpd1-0";
375 samsung,pin-function = <0>;
376 samsung,pin-pud = <0>;
377 samsung,pin-drv = <0>;
378 };
379 };
380
381 &tmu_cpu0 {
382 vtmu-supply = <&ldo7_reg>;
383 status = "okay";
384 };
385
386 &tmu_cpu1 {
387 vtmu-supply = <&ldo7_reg>;
388 status = "okay";
389 };
390
391 &tmu_cpu2 {
392 vtmu-supply = <&ldo7_reg>;
393 status = "okay";
394 };
395
396 &tmu_cpu3 {
397 vtmu-supply = <&ldo7_reg>;
398 status = "okay";
399 };
400
401 &tmu_gpu {
402 vtmu-supply = <&ldo7_reg>;
403 status = "okay";
404 };
405
406 &rtc {
407 status = "okay";
408 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
409 clock-names = "rtc", "rtc_src";
410 };
411
412 &usbdrd_dwc3_0 {
413 dr_mode = "host";
414 };
415
416 /* usbdrd_dwc3_1 mode customized in each board */
417
418 &usbdrd3_0 {
419 vdd33-supply = <&ldo9_reg>;
420 vdd10-supply = <&ldo11_reg>;
421 };
422
423 &usbdrd3_1 {
424 vdd33-supply = <&ldo9_reg>;
425 vdd10-supply = <&ldo11_reg>;
426 };
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