2 * Copyright 2011 Calxeda, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
19 /* First 4KB has pen for secondary cores. */
20 /memreserve/ 0x00000000 0x0001000;
23 model = "Calxeda Highbank";
24 compatible = "calxeda,highbank";
33 compatible = "arm,cortex-a9";
35 next-level-cache = <&L2>;
39 compatible = "arm,cortex-a9";
41 next-level-cache = <&L2>;
45 compatible = "arm,cortex-a9";
47 next-level-cache = <&L2>;
51 compatible = "arm,cortex-a9";
53 next-level-cache = <&L2>;
59 device_type = "memory";
60 reg = <0x00000000 0xff900000>;
64 bootargs = "console=ttyAMA0";
70 compatible = "simple-bus";
71 interrupt-parent = <&intc>;
75 compatible = "arm,cortex-a9-twd-timer";
76 reg = <0xfff10600 0x20>;
77 interrupts = <1 13 0xf01>;
81 compatible = "arm,cortex-a9-twd-wdt";
82 reg = <0xfff10620 0x20>;
83 interrupts = <1 14 0xf01>;
86 intc: interrupt-controller@fff11000 {
87 compatible = "arm,cortex-a9-gic";
88 #interrupt-cells = <3>;
92 reg = <0xfff11000 0x1000>,
97 compatible = "arm,pl310-cache";
98 reg = <0xfff12000 0x1000>;
99 interrupts = <0 70 4>;
105 compatible = "arm,cortex-a9-pmu";
106 interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
110 compatible = "calxeda,hb-ahci";
111 reg = <0xffe08000 0x10000>;
112 interrupts = <0 83 4>;
116 compatible = "calxeda,hb-sdhci";
117 reg = <0xffe0e000 0x1000>;
118 interrupts = <0 90 4>;
122 compatible = "arm,pl320", "arm,primecell";
123 reg = <0xfff20000 0x1000>;
124 interrupts = <0 7 4>;
127 gpioe: gpio@fff30000 {
129 compatible = "arm,pl061", "arm,primecell";
131 reg = <0xfff30000 0x1000>;
132 interrupts = <0 14 4>;
135 gpiof: gpio@fff31000 {
137 compatible = "arm,pl061", "arm,primecell";
139 reg = <0xfff31000 0x1000>;
140 interrupts = <0 15 4>;
143 gpiog: gpio@fff32000 {
145 compatible = "arm,pl061", "arm,primecell";
147 reg = <0xfff32000 0x1000>;
148 interrupts = <0 16 4>;
151 gpioh: gpio@fff33000 {
153 compatible = "arm,pl061", "arm,primecell";
155 reg = <0xfff33000 0x1000>;
156 interrupts = <0 17 4>;
160 compatible = "arm,sp804", "arm,primecell";
161 reg = <0xfff34000 0x1000>;
162 interrupts = <0 18 4>;
166 compatible = "arm,pl031", "arm,primecell";
167 reg = <0xfff35000 0x1000>;
168 interrupts = <0 19 4>;
172 compatible = "arm,pl011", "arm,primecell";
173 reg = <0xfff36000 0x1000>;
174 interrupts = <0 20 4>;
178 compatible = "ipmi-smic";
179 device_type = "ipmi";
180 reg = <0xfff3a000 0x1000>;
181 interrupts = <0 24 4>;
187 compatible = "calxeda,hb-sregs";
188 reg = <0xfff3c000 0x1000>;
192 compatible = "arm,pl330", "arm,primecell";
193 reg = <0xfff3d000 0x1000>;
194 interrupts = <0 92 4>;
198 compatible = "calxeda,hb-xgmac";
199 reg = <0xfff50000 0x1000>;
200 interrupts = <0 77 4 0 78 4 0 79 4>;
204 compatible = "calxeda,hb-xgmac";
205 reg = <0xfff51000 0x1000>;
206 interrupts = <0 80 4 0 81 4 0 82 4>;