arch/arm/boot/dts/hip01-ca9x2.dts

   1 /*
   2  * Hisilicon Ltd. HiP01 SoC
   3  *
   4  * Copyright (C) 2014 Hisilicon Ltd.
   5  * Copyright (C) 2014 Huawei Ltd.
   6  *
   7  * Author: Wang Long <long.wanglong@huawei.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 /dts-v1/;
  15
  16 /* First 8KB reserved for secondary core boot */
  17 /memreserve/ 0x80000000 0x00002000;
  18
  19 #include "hip01.dtsi"
  20
  21 / {
  22         model = "Hisilicon HIP01 Development Board";
  23         compatible = "hisilicon,hip01-ca9x2", "hisilicon,hip01";
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28                 enable-method = "hisilicon,hip01-smp";
  29
  30                 cpu@0 {
  31                         device_type = "cpu";
  32                         compatible = "arm,cortex-a9";
  33                         reg = <0>;
  34                 };
  35
  36                 cpu@1 {
  37                         device_type = "cpu";
  38                         compatible = "arm,cortex-a9";
  39                         reg = <1>;
  40                 };
  41         };
  42
  43         memory {
  44                 device_type = "memory";
  45                 reg = <0x80000000 0x80000000>;
  46         };
  47 };
  48
  49 &uart0 {
  50         status = "okay";
  51 };