Merge tag 'v4.3-rc1' into spi-fix-doc
[deliverable/linux.git] / arch / arm / boot / dts / imx23.dtsi
1 /*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 #include "skeleton.dtsi"
13 #include "imx23-pinfunc.h"
14
15 / {
16 interrupt-parent = <&icoll>;
17
18 aliases {
19 gpio0 = &gpio0;
20 gpio1 = &gpio1;
21 gpio2 = &gpio2;
22 serial0 = &auart0;
23 serial1 = &auart1;
24 spi0 = &ssp0;
25 spi1 = &ssp1;
26 usbphy0 = &usbphy0;
27 };
28
29 cpus {
30 #address-cells = <0>;
31 #size-cells = <0>;
32
33 cpu {
34 compatible = "arm,arm926ej-s";
35 device_type = "cpu";
36 };
37 };
38
39 apb@80000000 {
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
43 reg = <0x80000000 0x80000>;
44 ranges;
45
46 apbh@80000000 {
47 compatible = "simple-bus";
48 #address-cells = <1>;
49 #size-cells = <1>;
50 reg = <0x80000000 0x40000>;
51 ranges;
52
53 icoll: interrupt-controller@80000000 {
54 compatible = "fsl,imx23-icoll", "fsl,icoll";
55 interrupt-controller;
56 #interrupt-cells = <1>;
57 reg = <0x80000000 0x2000>;
58 };
59
60 dma_apbh: dma-apbh@80004000 {
61 compatible = "fsl,imx23-dma-apbh";
62 reg = <0x80004000 0x2000>;
63 interrupts = <0 14 20 0
64 13 13 13 13>;
65 interrupt-names = "empty", "ssp0", "ssp1", "empty",
66 "gpmi0", "gpmi1", "gpmi2", "gpmi3";
67 #dma-cells = <1>;
68 dma-channels = <8>;
69 clocks = <&clks 15>;
70 };
71
72 ecc@80008000 {
73 reg = <0x80008000 0x2000>;
74 status = "disabled";
75 };
76
77 gpmi-nand@8000c000 {
78 compatible = "fsl,imx23-gpmi-nand";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
82 reg-names = "gpmi-nand", "bch";
83 interrupts = <56>;
84 interrupt-names = "bch";
85 clocks = <&clks 34>;
86 clock-names = "gpmi_io";
87 dmas = <&dma_apbh 4>;
88 dma-names = "rx-tx";
89 status = "disabled";
90 };
91
92 ssp0: ssp@80010000 {
93 reg = <0x80010000 0x2000>;
94 interrupts = <15>;
95 clocks = <&clks 33>;
96 dmas = <&dma_apbh 1>;
97 dma-names = "rx-tx";
98 status = "disabled";
99 };
100
101 etm@80014000 {
102 reg = <0x80014000 0x2000>;
103 status = "disabled";
104 };
105
106 pinctrl@80018000 {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 compatible = "fsl,imx23-pinctrl", "simple-bus";
110 reg = <0x80018000 0x2000>;
111
112 gpio0: gpio@0 {
113 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
114 interrupts = <16>;
115 gpio-controller;
116 #gpio-cells = <2>;
117 interrupt-controller;
118 #interrupt-cells = <2>;
119 };
120
121 gpio1: gpio@1 {
122 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
123 interrupts = <17>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 interrupt-controller;
127 #interrupt-cells = <2>;
128 };
129
130 gpio2: gpio@2 {
131 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
132 interrupts = <18>;
133 gpio-controller;
134 #gpio-cells = <2>;
135 interrupt-controller;
136 #interrupt-cells = <2>;
137 };
138
139 duart_pins_a: duart@0 {
140 reg = <0>;
141 fsl,pinmux-ids = <
142 MX23_PAD_PWM0__DUART_RX
143 MX23_PAD_PWM1__DUART_TX
144 >;
145 fsl,drive-strength = <MXS_DRIVE_4mA>;
146 fsl,voltage = <MXS_VOLTAGE_HIGH>;
147 fsl,pull-up = <MXS_PULL_DISABLE>;
148 };
149
150 auart0_pins_a: auart0@0 {
151 reg = <0>;
152 fsl,pinmux-ids = <
153 MX23_PAD_AUART1_RX__AUART1_RX
154 MX23_PAD_AUART1_TX__AUART1_TX
155 MX23_PAD_AUART1_CTS__AUART1_CTS
156 MX23_PAD_AUART1_RTS__AUART1_RTS
157 >;
158 fsl,drive-strength = <MXS_DRIVE_4mA>;
159 fsl,voltage = <MXS_VOLTAGE_HIGH>;
160 fsl,pull-up = <MXS_PULL_DISABLE>;
161 };
162
163 auart0_2pins_a: auart0-2pins@0 {
164 reg = <0>;
165 fsl,pinmux-ids = <
166 MX23_PAD_I2C_SCL__AUART1_TX
167 MX23_PAD_I2C_SDA__AUART1_RX
168 >;
169 fsl,drive-strength = <MXS_DRIVE_4mA>;
170 fsl,voltage = <MXS_VOLTAGE_HIGH>;
171 fsl,pull-up = <MXS_PULL_DISABLE>;
172 };
173
174 gpmi_pins_a: gpmi-nand@0 {
175 reg = <0>;
176 fsl,pinmux-ids = <
177 MX23_PAD_GPMI_D00__GPMI_D00
178 MX23_PAD_GPMI_D01__GPMI_D01
179 MX23_PAD_GPMI_D02__GPMI_D02
180 MX23_PAD_GPMI_D03__GPMI_D03
181 MX23_PAD_GPMI_D04__GPMI_D04
182 MX23_PAD_GPMI_D05__GPMI_D05
183 MX23_PAD_GPMI_D06__GPMI_D06
184 MX23_PAD_GPMI_D07__GPMI_D07
185 MX23_PAD_GPMI_CLE__GPMI_CLE
186 MX23_PAD_GPMI_ALE__GPMI_ALE
187 MX23_PAD_GPMI_RDY0__GPMI_RDY0
188 MX23_PAD_GPMI_RDY1__GPMI_RDY1
189 MX23_PAD_GPMI_WPN__GPMI_WPN
190 MX23_PAD_GPMI_WRN__GPMI_WRN
191 MX23_PAD_GPMI_RDN__GPMI_RDN
192 MX23_PAD_GPMI_CE1N__GPMI_CE1N
193 MX23_PAD_GPMI_CE0N__GPMI_CE0N
194 >;
195 fsl,drive-strength = <MXS_DRIVE_4mA>;
196 fsl,voltage = <MXS_VOLTAGE_HIGH>;
197 fsl,pull-up = <MXS_PULL_DISABLE>;
198 };
199
200 gpmi_pins_fixup: gpmi-pins-fixup {
201 fsl,pinmux-ids = <
202 MX23_PAD_GPMI_WPN__GPMI_WPN
203 MX23_PAD_GPMI_WRN__GPMI_WRN
204 MX23_PAD_GPMI_RDN__GPMI_RDN
205 >;
206 fsl,drive-strength = <MXS_DRIVE_12mA>;
207 };
208
209 mmc0_4bit_pins_a: mmc0-4bit@0 {
210 reg = <0>;
211 fsl,pinmux-ids = <
212 MX23_PAD_SSP1_DATA0__SSP1_DATA0
213 MX23_PAD_SSP1_DATA1__SSP1_DATA1
214 MX23_PAD_SSP1_DATA2__SSP1_DATA2
215 MX23_PAD_SSP1_DATA3__SSP1_DATA3
216 MX23_PAD_SSP1_CMD__SSP1_CMD
217 MX23_PAD_SSP1_SCK__SSP1_SCK
218 >;
219 fsl,drive-strength = <MXS_DRIVE_8mA>;
220 fsl,voltage = <MXS_VOLTAGE_HIGH>;
221 fsl,pull-up = <MXS_PULL_ENABLE>;
222 };
223
224 mmc0_8bit_pins_a: mmc0-8bit@0 {
225 reg = <0>;
226 fsl,pinmux-ids = <
227 MX23_PAD_SSP1_DATA0__SSP1_DATA0
228 MX23_PAD_SSP1_DATA1__SSP1_DATA1
229 MX23_PAD_SSP1_DATA2__SSP1_DATA2
230 MX23_PAD_SSP1_DATA3__SSP1_DATA3
231 MX23_PAD_GPMI_D08__SSP1_DATA4
232 MX23_PAD_GPMI_D09__SSP1_DATA5
233 MX23_PAD_GPMI_D10__SSP1_DATA6
234 MX23_PAD_GPMI_D11__SSP1_DATA7
235 MX23_PAD_SSP1_CMD__SSP1_CMD
236 MX23_PAD_SSP1_DETECT__SSP1_DETECT
237 MX23_PAD_SSP1_SCK__SSP1_SCK
238 >;
239 fsl,drive-strength = <MXS_DRIVE_8mA>;
240 fsl,voltage = <MXS_VOLTAGE_HIGH>;
241 fsl,pull-up = <MXS_PULL_ENABLE>;
242 };
243
244 mmc0_pins_fixup: mmc0-pins-fixup {
245 fsl,pinmux-ids = <
246 MX23_PAD_SSP1_DETECT__SSP1_DETECT
247 MX23_PAD_SSP1_SCK__SSP1_SCK
248 >;
249 fsl,pull-up = <MXS_PULL_DISABLE>;
250 };
251
252 pwm2_pins_a: pwm2@0 {
253 reg = <0>;
254 fsl,pinmux-ids = <
255 MX23_PAD_PWM2__PWM2
256 >;
257 fsl,drive-strength = <MXS_DRIVE_4mA>;
258 fsl,voltage = <MXS_VOLTAGE_HIGH>;
259 fsl,pull-up = <MXS_PULL_DISABLE>;
260 };
261
262 lcdif_24bit_pins_a: lcdif-24bit@0 {
263 reg = <0>;
264 fsl,pinmux-ids = <
265 MX23_PAD_LCD_D00__LCD_D00
266 MX23_PAD_LCD_D01__LCD_D01
267 MX23_PAD_LCD_D02__LCD_D02
268 MX23_PAD_LCD_D03__LCD_D03
269 MX23_PAD_LCD_D04__LCD_D04
270 MX23_PAD_LCD_D05__LCD_D05
271 MX23_PAD_LCD_D06__LCD_D06
272 MX23_PAD_LCD_D07__LCD_D07
273 MX23_PAD_LCD_D08__LCD_D08
274 MX23_PAD_LCD_D09__LCD_D09
275 MX23_PAD_LCD_D10__LCD_D10
276 MX23_PAD_LCD_D11__LCD_D11
277 MX23_PAD_LCD_D12__LCD_D12
278 MX23_PAD_LCD_D13__LCD_D13
279 MX23_PAD_LCD_D14__LCD_D14
280 MX23_PAD_LCD_D15__LCD_D15
281 MX23_PAD_LCD_D16__LCD_D16
282 MX23_PAD_LCD_D17__LCD_D17
283 MX23_PAD_GPMI_D08__LCD_D18
284 MX23_PAD_GPMI_D09__LCD_D19
285 MX23_PAD_GPMI_D10__LCD_D20
286 MX23_PAD_GPMI_D11__LCD_D21
287 MX23_PAD_GPMI_D12__LCD_D22
288 MX23_PAD_GPMI_D13__LCD_D23
289 MX23_PAD_LCD_DOTCK__LCD_DOTCK
290 MX23_PAD_LCD_ENABLE__LCD_ENABLE
291 MX23_PAD_LCD_HSYNC__LCD_HSYNC
292 MX23_PAD_LCD_VSYNC__LCD_VSYNC
293 >;
294 fsl,drive-strength = <MXS_DRIVE_4mA>;
295 fsl,voltage = <MXS_VOLTAGE_HIGH>;
296 fsl,pull-up = <MXS_PULL_DISABLE>;
297 };
298
299 spi2_pins_a: spi2@0 {
300 reg = <0>;
301 fsl,pinmux-ids = <
302 MX23_PAD_GPMI_WRN__SSP2_SCK
303 MX23_PAD_GPMI_RDY1__SSP2_CMD
304 MX23_PAD_GPMI_D00__SSP2_DATA0
305 MX23_PAD_GPMI_D03__SSP2_DATA3
306 >;
307 fsl,drive-strength = <MXS_DRIVE_8mA>;
308 fsl,voltage = <MXS_VOLTAGE_HIGH>;
309 fsl,pull-up = <MXS_PULL_ENABLE>;
310 };
311
312 i2c_pins_a: i2c@0 {
313 reg = <0>;
314 fsl,pinmux-ids = <
315 MX23_PAD_I2C_SCL__I2C_SCL
316 MX23_PAD_I2C_SDA__I2C_SDA
317 >;
318 fsl,drive-strength = <MXS_DRIVE_8mA>;
319 fsl,voltage = <MXS_VOLTAGE_HIGH>;
320 fsl,pull-up = <MXS_PULL_ENABLE>;
321 };
322
323 i2c_pins_b: i2c@1 {
324 reg = <1>;
325 fsl,pinmux-ids = <
326 MX23_PAD_LCD_ENABLE__I2C_SCL
327 MX23_PAD_LCD_HSYNC__I2C_SDA
328 >;
329 fsl,drive-strength = <MXS_DRIVE_8mA>;
330 fsl,voltage = <MXS_VOLTAGE_HIGH>;
331 fsl,pull-up = <MXS_PULL_ENABLE>;
332 };
333
334 i2c_pins_c: i2c@2 {
335 reg = <2>;
336 fsl,pinmux-ids = <
337 MX23_PAD_SSP1_DATA1__I2C_SCL
338 MX23_PAD_SSP1_DATA2__I2C_SDA
339 >;
340 fsl,drive-strength = <MXS_DRIVE_8mA>;
341 fsl,voltage = <MXS_VOLTAGE_HIGH>;
342 fsl,pull-up = <MXS_PULL_ENABLE>;
343 };
344 };
345
346 digctl@8001c000 {
347 compatible = "fsl,imx23-digctl";
348 reg = <0x8001c000 2000>;
349 status = "disabled";
350 };
351
352 emi@80020000 {
353 reg = <0x80020000 0x2000>;
354 status = "disabled";
355 };
356
357 dma_apbx: dma-apbx@80024000 {
358 compatible = "fsl,imx23-dma-apbx";
359 reg = <0x80024000 0x2000>;
360 interrupts = <7 5 9 26
361 19 0 25 23
362 60 58 9 0
363 0 0 0 0>;
364 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
365 "saif0", "empty", "auart0-rx", "auart0-tx",
366 "auart1-rx", "auart1-tx", "saif1", "empty",
367 "empty", "empty", "empty", "empty";
368 #dma-cells = <1>;
369 dma-channels = <16>;
370 clocks = <&clks 16>;
371 };
372
373 dcp@80028000 {
374 compatible = "fsl,imx23-dcp";
375 reg = <0x80028000 0x2000>;
376 interrupts = <53 54>;
377 status = "okay";
378 };
379
380 pxp@8002a000 {
381 reg = <0x8002a000 0x2000>;
382 status = "disabled";
383 };
384
385 ocotp@8002c000 {
386 compatible = "fsl,ocotp";
387 reg = <0x8002c000 0x2000>;
388 status = "disabled";
389 };
390
391 axi-ahb@8002e000 {
392 reg = <0x8002e000 0x2000>;
393 status = "disabled";
394 };
395
396 lcdif@80030000 {
397 compatible = "fsl,imx23-lcdif";
398 reg = <0x80030000 2000>;
399 interrupts = <46 45>;
400 clocks = <&clks 38>;
401 status = "disabled";
402 };
403
404 ssp1: ssp@80034000 {
405 reg = <0x80034000 0x2000>;
406 interrupts = <2>;
407 clocks = <&clks 33>;
408 dmas = <&dma_apbh 2>;
409 dma-names = "rx-tx";
410 status = "disabled";
411 };
412
413 tvenc@80038000 {
414 reg = <0x80038000 0x2000>;
415 status = "disabled";
416 };
417 };
418
419 apbx@80040000 {
420 compatible = "simple-bus";
421 #address-cells = <1>;
422 #size-cells = <1>;
423 reg = <0x80040000 0x40000>;
424 ranges;
425
426 clks: clkctrl@80040000 {
427 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
428 reg = <0x80040000 0x2000>;
429 #clock-cells = <1>;
430 };
431
432 saif0: saif@80042000 {
433 reg = <0x80042000 0x2000>;
434 dmas = <&dma_apbx 4>;
435 dma-names = "rx-tx";
436 status = "disabled";
437 };
438
439 power@80044000 {
440 reg = <0x80044000 0x2000>;
441 status = "disabled";
442 };
443
444 saif1: saif@80046000 {
445 reg = <0x80046000 0x2000>;
446 dmas = <&dma_apbx 10>;
447 dma-names = "rx-tx";
448 status = "disabled";
449 };
450
451 audio-out@80048000 {
452 reg = <0x80048000 0x2000>;
453 dmas = <&dma_apbx 1>;
454 dma-names = "tx";
455 status = "disabled";
456 };
457
458 audio-in@8004c000 {
459 reg = <0x8004c000 0x2000>;
460 dmas = <&dma_apbx 0>;
461 dma-names = "rx";
462 status = "disabled";
463 };
464
465 lradc: lradc@80050000 {
466 compatible = "fsl,imx23-lradc";
467 reg = <0x80050000 0x2000>;
468 interrupts = <36 37 38 39 40 41 42 43 44>;
469 status = "disabled";
470 clocks = <&clks 26>;
471 #io-channel-cells = <1>;
472 };
473
474 spdif@80054000 {
475 reg = <0x80054000 2000>;
476 dmas = <&dma_apbx 2>;
477 dma-names = "tx";
478 status = "disabled";
479 };
480
481 i2c: i2c@80058000 {
482 #address-cells = <1>;
483 #size-cells = <0>;
484 compatible = "fsl,imx23-i2c";
485 reg = <0x80058000 0x2000>;
486 interrupts = <27>;
487 clock-frequency = <100000>;
488 dmas = <&dma_apbx 3>;
489 dma-names = "rx-tx";
490 status = "disabled";
491 };
492
493 rtc@8005c000 {
494 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
495 reg = <0x8005c000 0x2000>;
496 interrupts = <22>;
497 };
498
499 pwm: pwm@80064000 {
500 compatible = "fsl,imx23-pwm";
501 reg = <0x80064000 0x2000>;
502 clocks = <&clks 30>;
503 #pwm-cells = <2>;
504 fsl,pwm-number = <5>;
505 status = "disabled";
506 };
507
508 timrot@80068000 {
509 compatible = "fsl,imx23-timrot", "fsl,timrot";
510 reg = <0x80068000 0x2000>;
511 interrupts = <28 29 30 31>;
512 clocks = <&clks 28>;
513 };
514
515 auart0: serial@8006c000 {
516 compatible = "fsl,imx23-auart";
517 reg = <0x8006c000 0x2000>;
518 interrupts = <24>;
519 clocks = <&clks 32>;
520 dmas = <&dma_apbx 6>, <&dma_apbx 7>;
521 dma-names = "rx", "tx";
522 status = "disabled";
523 };
524
525 auart1: serial@8006e000 {
526 compatible = "fsl,imx23-auart";
527 reg = <0x8006e000 0x2000>;
528 interrupts = <59>;
529 clocks = <&clks 32>;
530 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
531 dma-names = "rx", "tx";
532 status = "disabled";
533 };
534
535 duart: serial@80070000 {
536 compatible = "arm,pl011", "arm,primecell";
537 reg = <0x80070000 0x2000>;
538 interrupts = <0>;
539 clocks = <&clks 32>, <&clks 16>;
540 clock-names = "uart", "apb_pclk";
541 status = "disabled";
542 };
543
544 usbphy0: usbphy@8007c000 {
545 compatible = "fsl,imx23-usbphy";
546 reg = <0x8007c000 0x2000>;
547 clocks = <&clks 41>;
548 status = "disabled";
549 };
550 };
551 };
552
553 ahb@80080000 {
554 compatible = "simple-bus";
555 #address-cells = <1>;
556 #size-cells = <1>;
557 reg = <0x80080000 0x80000>;
558 ranges;
559
560 usb0: usb@80080000 {
561 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
562 reg = <0x80080000 0x40000>;
563 interrupts = <11>;
564 fsl,usbphy = <&usbphy0>;
565 clocks = <&clks 40>;
566 status = "disabled";
567 };
568 };
569
570 iio_hwmon {
571 compatible = "iio-hwmon";
572 io-channels = <&lradc 8>;
573 };
574 };
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