ARM: ux500: enable AB8500 GPIO for HREF
[deliverable/linux.git] / arch / arm / boot / dts / imx27-phytec-phycore.dts
1 /*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 /dts-v1/;
13 /include/ "imx27.dtsi"
14
15 / {
16 model = "Phytec pcm038";
17 compatible = "phytec,imx27-pcm038", "fsl,imx27";
18
19 memory {
20 reg = <0x0 0x0>;
21 };
22
23 soc {
24 aipi@10000000 { /* aipi1 */
25 serial@1000a000 {
26 fsl,uart-has-rtscts;
27 status = "okay";
28 };
29
30 serial@1000b000 {
31 fsl,uart-has-rtscts;
32 status = "okay";
33 };
34
35 serial@1000c000 {
36 fsl,uart-has-rtscts;
37 status = "okay";
38 };
39
40 i2c@1001d000 {
41 clock-frequency = <400000>;
42 status = "okay";
43 at24@52 {
44 compatible = "at,24c32";
45 pagesize = <32>;
46 reg = <0x52>;
47 };
48 pcf8563@51 {
49 compatible = "nxp,pcf8563";
50 reg = <0x51>;
51 };
52 lm75@4a {
53 compatible = "national,lm75";
54 reg = <0x4a>;
55 };
56 };
57 };
58
59 aipi@10020000 { /* aipi2 */
60 ethernet@1002b000 {
61 status = "okay";
62 };
63 };
64 };
65
66 nor_flash@c0000000 {
67 compatible = "cfi-flash";
68 bank-width = <2>;
69 reg = <0xc0000000 0x02000000>;
70 #address-cells = <1>;
71 #size-cells = <1>;
72 };
73 };
This page took 0.03844 seconds and 5 git commands to generate.