arch/arm/boot/dts/imx53-qsb-common.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include "imx53.dtsi"
  14
  15 / {
  16         memory {
  17                 reg = <0x70000000 0x20000000>,
  18                       <0xb0000000 0x20000000>;
  19         };
  20
  21         display0: display@di0 {
  22                 compatible = "fsl,imx-parallel-display";
  23                 interface-pix-fmt = "rgb565";
  24                 pinctrl-names = "default";
  25                 pinctrl-0 = <&pinctrl_ipu_disp0>;
  26                 status = "disabled";
  27                 display-timings {
  28                         claawvga {
  29                                 native-mode;
  30                                 clock-frequency = <27000000>;
  31                                 hactive = <800>;
  32                                 vactive = <480>;
  33                                 hback-porch = <40>;
  34                                 hfront-porch = <60>;
  35                                 vback-porch = <10>;
  36                                 vfront-porch = <10>;
  37                                 hsync-len = <20>;
  38                                 vsync-len = <10>;
  39                                 hsync-active = <0>;
  40                                 vsync-active = <0>;
  41                                 de-active = <1>;
  42                                 pixelclk-active = <0>;
  43                         };
  44                 };
  45
  46                 port {
  47                         display0_in: endpoint {
  48                                 remote-endpoint = <&ipu_di0_disp0>;
  49                         };
  50                 };
  51         };
  52
  53         gpio-keys {
  54                 compatible = "gpio-keys";
  55
  56                 power {
  57                         label = "Power Button";
  58                         gpios = <&gpio1 8 0>;
  59                         linux,code = <116>; /* KEY_POWER */
  60                 };
  61
  62                 volume-up {
  63                         label = "Volume Up";
  64                         gpios = <&gpio2 14 0>;
  65                         linux,code = <115>; /* KEY_VOLUMEUP */
  66                         gpio-key,wakeup;
  67                 };
  68
  69                 volume-down {
  70                         label = "Volume Down";
  71                         gpios = <&gpio2 15 0>;
  72                         linux,code = <114>; /* KEY_VOLUMEDOWN */
  73                         gpio-key,wakeup;
  74                 };
  75         };
  76
  77         leds {
  78                 compatible = "gpio-leds";
  79                 pinctrl-names = "default";
  80                 pinctrl-0 = <&led_pin_gpio7_7>;
  81
  82                 user {
  83                         label = "Heartbeat";
  84                         gpios = <&gpio7 7 0>;
  85                         linux,default-trigger = "heartbeat";
  86                 };
  87         };
  88
  89         regulators {
  90                 compatible = "simple-bus";
  91                 #address-cells = <1>;
  92                 #size-cells = <0>;
  93
  94                 reg_3p2v: regulator@0 {
  95                         compatible = "regulator-fixed";
  96                         reg = <0>;
  97                         regulator-name = "3P2V";
  98                         regulator-min-microvolt = <3200000>;
  99                         regulator-max-microvolt = <3200000>;
 100                         regulator-always-on;
 101                 };
 102
 103                 reg_usb_vbus: regulator@1 {
 104                         compatible = "regulator-fixed";
 105                         reg = <1>;
 106                         regulator-name = "usb_vbus";
 107                         regulator-min-microvolt = <5000000>;
 108                         regulator-max-microvolt = <5000000>;
 109                         gpio = <&gpio7 8 0>;
 110                         enable-active-high;
 111                 };
 112         };
 113
 114         sound {
 115                 compatible = "fsl,imx53-qsb-sgtl5000",
 116                              "fsl,imx-audio-sgtl5000";
 117                 model = "imx53-qsb-sgtl5000";
 118                 ssi-controller = <&ssi2>;
 119                 audio-codec = <&sgtl5000>;
 120                 audio-routing =
 121                         "MIC_IN", "Mic Jack",
 122                         "Mic Jack", "Mic Bias",
 123                         "Headphone Jack", "HP_OUT";
 124                 mux-int-port = <2>;
 125                 mux-ext-port = <5>;
 126         };
 127 };
 128
 129 &esdhc1 {
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_esdhc1>;
 132         status = "okay";
 133 };
 134
 135 &ipu_di0_disp0 {
 136         remote-endpoint = <&display0_in>;
 137 };
 138
 139 &ssi2 {
 140         fsl,mode = "i2s-slave";
 141         status = "okay";
 142 };
 143
 144 &esdhc3 {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_esdhc3>;
 147         cd-gpios = <&gpio3 11 0>;
 148         wp-gpios = <&gpio3 12 0>;
 149         bus-width = <8>;
 150         status = "okay";
 151 };
 152
 153 &iomuxc {
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&pinctrl_hog>;
 156
 157         imx53-qsb {
 158                 pinctrl_hog: hoggrp {
 159                         fsl,pins = <
 160                                 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
 161                                 MX53_PAD_GPIO_8__GPIO1_8          0x80000000
 162                                 MX53_PAD_PATA_DATA14__GPIO2_14    0x80000000
 163                                 MX53_PAD_PATA_DATA15__GPIO2_15    0x80000000
 164                                 MX53_PAD_EIM_DA11__GPIO3_11       0x80000000
 165                                 MX53_PAD_EIM_DA12__GPIO3_12       0x80000000
 166                                 MX53_PAD_PATA_DA_0__GPIO7_6       0x80000000
 167                                 MX53_PAD_PATA_DA_2__GPIO7_8       0x80000000
 168                                 MX53_PAD_GPIO_16__GPIO7_11        0x80000000
 169                         >;
 170                 };
 171
 172                 led_pin_gpio7_7: led_gpio7_7@0 {
 173                         fsl,pins = <
 174                                 MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
 175                         >;
 176                 };
 177
 178                 pinctrl_audmux: audmuxgrp {
 179                         fsl,pins = <
 180                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
 181                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
 182                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
 183                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
 184                         >;
 185                 };
 186
 187                 pinctrl_esdhc1: esdhc1grp {
 188                         fsl,pins = <
 189                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
 190                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
 191                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
 192                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
 193                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
 194                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
 195                         >;
 196                 };
 197
 198                 pinctrl_esdhc3: esdhc3grp {
 199                         fsl,pins = <
 200                                 MX53_PAD_PATA_DATA8__ESDHC3_DAT0        0x1d5
 201                                 MX53_PAD_PATA_DATA9__ESDHC3_DAT1        0x1d5
 202                                 MX53_PAD_PATA_DATA10__ESDHC3_DAT2       0x1d5
 203                                 MX53_PAD_PATA_DATA11__ESDHC3_DAT3       0x1d5
 204                                 MX53_PAD_PATA_DATA0__ESDHC3_DAT4        0x1d5
 205                                 MX53_PAD_PATA_DATA1__ESDHC3_DAT5        0x1d5
 206                                 MX53_PAD_PATA_DATA2__ESDHC3_DAT6        0x1d5
 207                                 MX53_PAD_PATA_DATA3__ESDHC3_DAT7        0x1d5
 208                                 MX53_PAD_PATA_RESET_B__ESDHC3_CMD       0x1d5
 209                                 MX53_PAD_PATA_IORDY__ESDHC3_CLK         0x1d5
 210                         >;
 211                 };
 212
 213                 pinctrl_fec: fecgrp {
 214                         fsl,pins = <
 215                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
 216                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
 217                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
 218                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
 219                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
 220                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
 221                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
 222                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
 223                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
 224                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
 225                         >;
 226                 };
 227
 228                 pinctrl_i2c1: i2c1grp {
 229                         fsl,pins = <
 230                                 MX53_PAD_CSI0_DAT8__I2C1_SDA            0xc0000000
 231                                 MX53_PAD_CSI0_DAT9__I2C1_SCL            0xc0000000
 232                         >;
 233                 };
 234
 235                 pinctrl_i2c2: i2c2grp {
 236                         fsl,pins = <
 237                                 MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000
 238                                 MX53_PAD_KEY_COL3__I2C2_SCL             0xc0000000
 239                         >;
 240                 };
 241
 242                 pinctrl_ipu_disp0: ipudisp0grp {
 243                         fsl,pins = <
 244                                 MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
 245                                 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15       0x5
 246                                 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2         0x5
 247                                 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3         0x5
 248                                 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0    0x5
 249                                 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1    0x5
 250                                 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2    0x5
 251                                 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3    0x5
 252                                 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4    0x5
 253                                 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5    0x5
 254                                 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6    0x5
 255                                 MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7    0x5
 256                                 MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8    0x5
 257                                 MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9    0x5
 258                                 MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10  0x5
 259                                 MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11  0x5
 260                                 MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12  0x5
 261                                 MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13  0x5
 262                                 MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14  0x5
 263                                 MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15  0x5
 264                                 MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16  0x5
 265                                 MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17  0x5
 266                                 MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18  0x5
 267                                 MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19  0x5
 268                                 MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20  0x5
 269                                 MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21  0x5
 270                                 MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22  0x5
 271                                 MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23  0x5
 272                         >;
 273                 };
 274
 275                 pinctrl_uart1: uart1grp {
 276                         fsl,pins = <
 277                                 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX      0x1e4
 278                                 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX      0x1e4
 279                         >;
 280                 };
 281         };
 282 };
 283
 284 &uart1 {
 285         pinctrl-names = "default";
 286         pinctrl-0 = <&pinctrl_uart1>;
 287         status = "okay";
 288 };
 289
 290 &i2c2 {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&pinctrl_i2c2>;
 293         status = "okay";
 294
 295         sgtl5000: codec@0a {
 296                 compatible = "fsl,sgtl5000";
 297                 reg = <0x0a>;
 298                 VDDA-supply = <&reg_3p2v>;
 299                 VDDIO-supply = <&reg_3p2v>;
 300                 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
 301         };
 302 };
 303
 304 &i2c1 {
 305         pinctrl-names = "default";
 306         pinctrl-0 = <&pinctrl_i2c1>;
 307         status = "okay";
 308
 309         accelerometer: mma8450@1c {
 310                 compatible = "fsl,mma8450";
 311                 reg = <0x1c>;
 312         };
 313 };
 314
 315 &audmux {
 316         pinctrl-names = "default";
 317         pinctrl-0 = <&pinctrl_audmux>;
 318         status = "okay";
 319 };
 320
 321 &fec {
 322         pinctrl-names = "default";
 323         pinctrl-0 = <&pinctrl_fec>;
 324         phy-mode = "rmii";
 325         phy-reset-gpios = <&gpio7 6 0>;
 326         status = "okay";
 327 };
 328
 329 &sata {
 330         status = "okay";
 331 };
 332
 333 &vpu {
 334         status = "okay";
 335 };
 336
 337 &usbh1 {
 338         vbus-supply = <&reg_usb_vbus>;
 339         phy_type = "utmi";
 340         status = "okay";
 341 };
 342
 343 &usbotg {
 344         dr_mode = "peripheral";
 345         status = "okay";
 346 };