2 * Copyright 2013 Gateworks Corporation
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <dt-bindings/gpio/gpio.h>
15 /* these are used by bootloader for disabling nodes */
28 bootargs = "console=ttymxc1,115200";
32 compatible = "pwm-backlight";
33 pwms = <&pwm4 0 5000000>;
34 brightness-levels = <0 4 8 16 32 64 128 255>;
35 default-brightness-level = <7>;
39 compatible = "gpio-leds";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_gpio_leds>;
45 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
47 linux,default-trigger = "heartbeat";
52 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
53 default-state = "off";
58 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
59 default-state = "off";
64 reg = <0x10000000 0x40000000>;
68 compatible = "pps-gpio";
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_pps>;
71 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
76 compatible = "simple-bus";
80 reg_1p0v: regulator@0 {
81 compatible = "regulator-fixed";
83 regulator-name = "1P0V";
84 regulator-min-microvolt = <1000000>;
85 regulator-max-microvolt = <1000000>;
89 reg_3p3v: regulator@1 {
90 compatible = "regulator-fixed";
92 regulator-name = "3P3V";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
98 reg_usb_h1_vbus: regulator@2 {
99 compatible = "regulator-fixed";
101 regulator-name = "usb_h1_vbus";
102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <5000000>;
107 reg_usb_otg_vbus: regulator@3 {
108 compatible = "regulator-fixed";
110 regulator-name = "usb_otg_vbus";
111 regulator-min-microvolt = <5000000>;
112 regulator-max-microvolt = <5000000>;
113 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
119 compatible = "fsl,imx6q-ventana-sgtl5000",
120 "fsl,imx-audio-sgtl5000";
121 model = "sgtl5000-audio";
122 ssi-controller = <&ssi1>;
123 audio-codec = <&codec>;
125 "MIC_IN", "Mic Jack",
126 "Mic Jack", "Mic Bias",
127 "Headphone Jack", "HP_OUT";
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_flexcan1>;
146 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
147 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
148 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
149 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_enet>;
155 phy-mode = "rgmii-id";
156 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_gpmi_nand>;
167 ddc-i2c-bus = <&i2c3>;
172 clock-frequency = <100000>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_i2c1>;
178 compatible = "atmel,24c02";
184 compatible = "atmel,24c02";
190 compatible = "atmel,24c02";
196 compatible = "atmel,24c02";
202 compatible = "nxp,pca9555";
209 compatible = "dallas,ds1672";
215 clock-frequency = <100000>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_i2c2>;
221 compatible = "fsl,pfuze100";
226 regulator-min-microvolt = <300000>;
227 regulator-max-microvolt = <1875000>;
230 regulator-ramp-delay = <6250>;
234 regulator-min-microvolt = <300000>;
235 regulator-max-microvolt = <1875000>;
238 regulator-ramp-delay = <6250>;
242 regulator-min-microvolt = <800000>;
243 regulator-max-microvolt = <3950000>;
249 regulator-min-microvolt = <400000>;
250 regulator-max-microvolt = <1975000>;
256 regulator-min-microvolt = <400000>;
257 regulator-max-microvolt = <1975000>;
263 regulator-min-microvolt = <800000>;
264 regulator-max-microvolt = <3300000>;
268 regulator-min-microvolt = <5000000>;
269 regulator-max-microvolt = <5150000>;
275 regulator-min-microvolt = <1000000>;
276 regulator-max-microvolt = <3000000>;
287 regulator-min-microvolt = <800000>;
288 regulator-max-microvolt = <1550000>;
292 regulator-min-microvolt = <800000>;
293 regulator-max-microvolt = <1550000>;
297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvolt = <3300000>;
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <3300000>;
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <3300000>;
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <3300000>;
323 clock-frequency = <100000>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_i2c3>;
329 compatible = "fsl,sgtl5000";
331 clocks = <&clks 201>;
332 VDDA-supply = <&sw4_reg>;
333 VDDIO-supply = <®_3p3v>;
336 touchscreen: egalax_ts@04 {
337 compatible = "eeti,egalax_ts";
339 interrupt-parent = <&gpio7>;
341 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
349 fsl,data-mapping = "spwg";
350 fsl,data-width = <18>;
354 native-mode = <&timing0>;
355 timing0: hsd100pxn1 {
356 clock-frequency = <65000000>;
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_pcie>;
373 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
376 eth1: sky2@8 { /* MAC/PHY on bus 8 */
377 compatible = "marvell,sky2";
382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_pwm4>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_uart1>;
420 pinctrl-names = "default";
421 pinctrl-0 = <&pinctrl_uart2>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_uart5>;
432 vbus-supply = <®_usb_otg_vbus>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&pinctrl_usbotg>;
435 disable-over-current;
440 vbus-supply = <®_usb_h1_vbus>;
445 pinctrl-names = "default", "state_100mhz", "state_200mhz";
446 pinctrl-0 = <&pinctrl_usdhc3>;
447 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
448 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
449 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
450 vmmc-supply = <®_3p3v>;
451 no-1-8-v; /* firmware will remove if board revision supports */
457 pinctrl_audmux: audmuxgrp {
459 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
460 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
461 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
462 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
463 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
467 pinctrl_enet: enetgrp {
469 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
470 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
471 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
472 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
473 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
474 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
475 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
476 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
477 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
478 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
479 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
480 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
481 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
482 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
483 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
484 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
488 pinctrl_flexcan1: flexcan1grp {
490 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
491 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
492 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
496 pinctrl_gpio_leds: gpioledsgrp {
498 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
499 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
500 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
504 pinctrl_gpmi_nand: gpminandgrp {
506 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
507 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
508 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
509 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
510 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
511 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
512 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
513 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
514 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
515 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
516 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
517 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
518 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
519 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
520 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
524 pinctrl_i2c1: i2c1grp {
526 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
527 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
531 pinctrl_i2c2: i2c2grp {
533 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
534 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
538 pinctrl_i2c3: i2c3grp {
540 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
541 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
545 pinctrl_pcie: pciegrp {
547 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
548 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
552 pinctrl_pps: ppsgrp {
554 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
558 pinctrl_pwm1: pwm1grp {
560 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
564 pinctrl_pwm2: pwm2grp {
566 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
570 pinctrl_pwm3: pwm3grp {
572 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
576 pinctrl_pwm4: pwm4grp {
578 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
582 pinctrl_uart1: uart1grp {
584 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
585 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
589 pinctrl_uart2: uart2grp {
591 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
592 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
596 pinctrl_uart5: uart5grp {
598 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
599 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
603 pinctrl_usbotg: usbotggrp {
605 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
606 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
610 pinctrl_usdhc3: usdhc3grp {
612 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
613 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
614 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
615 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
616 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
617 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
618 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
619 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
623 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
625 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
626 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
627 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
628 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
629 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
630 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
631 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
632 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
636 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
638 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
639 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
640 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
641 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
642 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
643 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
644 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
645 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9