arch/arm/boot/dts/kirkwood-km_kirkwood.dts

   1 /dts-v1/;
   2
   3 #include "kirkwood.dtsi"
   4 #include "kirkwood-98dx4122.dtsi"
   5
   6 / {
   7         model = "Keymile Kirkwood Reference Design";
   8         compatible = "keymile,km_kirkwood", "marvell,kirkwood-98DX4122", "marvell,kirkwood";
   9
  10         memory {
  11                 device_type = "memory";
  12                 reg = <0x00000000 0x08000000>;
  13         };
  14
  15         chosen {
  16                 bootargs = "console=ttyS0,115200n8 earlyprintk";
  17         };
  18
  19         ocp@f1000000 {
  20                 pinctrl: pinctrl@10000 {
  21                         pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >;
  22                         pinctrl-names = "default";
  23
  24                         pmx_i2c_gpio_sda: pmx-gpio-sda {
  25                                 marvell,pins = "mpp8";
  26                                 marvell,function = "gpio";
  27                         };
  28                         pmx_i2c_gpio_scl: pmx-gpio-scl {
  29                                 marvell,pins = "mpp9";
  30                                 marvell,function = "gpio";
  31                         };
  32                 };
  33
  34                 serial@12000 {
  35                         status = "ok";
  36                 };
  37         };
  38
  39         i2c@0 {
  40                 compatible = "i2c-gpio";
  41                 gpios = < &gpio0 8 GPIO_ACTIVE_HIGH             /* sda */
  42                           &gpio0 9 GPIO_ACTIVE_HIGH>;           /* scl */
  43                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
  44         };
  45 };
  46
  47 &nand {
  48         pinctrl-0 = <&pmx_nand>;
  49         pinctrl-names = "default";
  50         status = "ok";
  51         chip-delay = <25>;
  52 };
  53
  54 &mdio {
  55         status = "okay";
  56
  57         ethphy0: ethernet-phy@0 {
  58                 reg = <0>;
  59         };
  60 };
  61
  62 &eth0 {
  63         status = "okay";
  64         ethernet0-port@0 {
  65                 phy-handle = <&ethphy0>;
  66         };
  67 };