arch/arm/boot/dts/logicpd-som-lv.dtsi

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  */
   6
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         cpus {
  11                 cpu@0 {
  12                         cpu0-supply = <&vcc>;
  13                 };
  14         };
  15
  16         wl12xx_vmmc: wl12xx_vmmc {
  17                 compatible = "regulator-fixed";
  18                 regulator-name = "vwl1271";
  19                 regulator-min-microvolt = <1800000>;
  20                 regulator-max-microvolt = <1800000>;
  21                 gpio = <&gpio1 3 0>;   /* gpio_3 */
  22                 startup-delay-us = <70000>;
  23                 enable-active-high;
  24                 vin-supply = <&vmmc2>;
  25         };
  26
  27         /* HS USB Host PHY on PORT 1 */
  28         hsusb2_phy: hsusb2_phy {
  29                 compatible = "usb-nop-xceiv";
  30                 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
  31         };
  32 };
  33
  34 &gpmc {
  35         ranges = <0 0 0x00000000 0x1000000>;    /* CS0: 16MB for NAND */
  36
  37         nand@0,0 {
  38                 linux,mtd-name = "micron,mt29f4g16abbda3w";
  39                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  40                 nand-bus-width = <16>;
  41                 ti,nand-ecc-opt = "bch8";
  42                 gpmc,sync-clk-ps = <0>;
  43                 gpmc,cs-on-ns = <0>;
  44                 gpmc,cs-rd-off-ns = <44>;
  45                 gpmc,cs-wr-off-ns = <44>;
  46                 gpmc,adv-on-ns = <6>;
  47                 gpmc,adv-rd-off-ns = <34>;
  48                 gpmc,adv-wr-off-ns = <44>;
  49                 gpmc,we-off-ns = <40>;
  50                 gpmc,oe-off-ns = <54>;
  51                 gpmc,access-ns = <64>;
  52                 gpmc,rd-cycle-ns = <82>;
  53                 gpmc,wr-cycle-ns = <82>;
  54                 gpmc,wr-access-ns = <40>;
  55                 gpmc,wr-data-mux-bus-ns = <0>;
  56                 gpmc,device-width = <2>;
  57
  58                 gpmc,page-burst-access-ns = <5>;
  59                 gpmc,cycle2cycle-delay-ns = <50>;
  60
  61                 #address-cells = <1>;
  62                 #size-cells = <1>;
  63
  64                 /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
  65
  66                 x-loader@0 {
  67                         label = "x-loader";
  68                         reg = <0 0x80000>;
  69                 };
  70
  71                 bootloaders@80000 {
  72                         label = "u-boot";
  73                         reg = <0x80000 0x1e0000>;
  74                 };
  75
  76                 bootloaders_env@260000 {
  77                         label = "u-boot-env";
  78                         reg = <0x260000 0x20000>;
  79                 };
  80
  81                 kernel@280000 {
  82                         label = "kernel";
  83                         reg = <0x280000 0x400000>;
  84                 };
  85
  86                 filesystem@680000 {
  87                         label = "fs";
  88                         reg = <0x680000 0>;     /* 0 = MTDPART_SIZ_FULL */
  89                 };
  90         };
  91 };
  92
  93 &i2c1 {
  94         clock-frequency = <2600000>;
  95
  96         twl: twl@48 {
  97                 reg = <0x48>;
  98                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  99                 interrupt-parent = <&intc>;
 100                 twl_audio: audio {
 101                         compatible = "ti,twl4030-audio";
 102                         codec {
 103                         };
 104                 };
 105         };
 106 };
 107
 108 &i2c2 {
 109         clock-frequency = <400000>;
 110 };
 111
 112 &i2c3 {
 113         clock-frequency = <400000>;
 114 };
 115
 116 &mmc3 {
 117         interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
 118         pinctrl-0 = <&mmc3_pins>;
 119         pinctrl-names = "default";
 120         vmmc-supply = <&wl12xx_vmmc>;
 121         non-removable;
 122         bus-width = <4>;
 123         cap-power-off-card;
 124         #address-cells = <1>;
 125         #size-cells = <0>;
 126         wlcore: wlcore@2 {
 127                 compatible = "ti,wl1273";
 128                 reg = <2>;
 129                 interrupt-parent = <&gpio5>;
 130                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
 131                 ref-clock-frequency = <26000000>;
 132         };
 133 };
 134
 135 &usbhshost {
 136         port2-mode = "ehci-phy";
 137 };
 138
 139 &usbhsehci {
 140         phys = <0 &hsusb2_phy>;
 141 };
 142
 143
 144 &omap3_pmx_core {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&hsusb2_pins>;
 147
 148         mmc3_pins: pinmux_mm3_pins {
 149                 pinctrl-single,pins = <
 150                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
 151                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
 152                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
 153                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
 154                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
 155                         OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)       /* sys_boot1.gpio_3 */
 156                         OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
 157                         OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
 158                 >;
 159         };
 160         mcbsp2_pins: pinmux_mcbsp2_pins {
 161                 pinctrl-single,pins = <
 162                         OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
 163                         OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
 164                         OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
 165                         OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
 166                 >;
 167         };
 168         uart2_pins: pinmux_uart2_pins {
 169                 pinctrl-single,pins = <
 170                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
 171                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
 172                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
 173                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
 174                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
 175                 >;
 176         };
 177         mcspi1_pins: pinmux_mcspi1_pins {
 178                 pinctrl-single,pins = <
 179                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
 180                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
 181                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
 182                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
 183                 >;
 184         };
 185
 186         hsusb2_pins: pinmux_hsusb2_pins {
 187                 pinctrl-single,pins = <
 188                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
 189                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
 190                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
 191                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
 192                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
 193                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
 194                 >;
 195         };
 196
 197         hsusb_otg_pins: pinmux_hsusb_otg_pins {
 198                 pinctrl-single,pins = <
 199                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk.hsusb0_clk */
 200                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp.hsusb0_stp */
 201                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir.hsusb0_dir */
 202                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt.hsusb0_nxt */
 203                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0.hsusb0_data0 */
 204                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1.hsusb0_data1 */
 205                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2.hsusb0_data2 */
 206                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3.hsusb0_data3 */
 207                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4.hsusb0_data4 */
 208                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5.hsusb0_data5 */
 209                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6.hsusb0_data6 */
 210                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7.hsusb0_data7 */
 211                 >;
 212         };
 213
 214
 215 };
 216
 217 &omap3_pmx_wkup {
 218         pinctrl-names = "default";
 219         pinctrl-0 = <&hsusb2_reset_pin>;
 220         hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
 221                 pinctrl-single,pins = <
 222                         OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)        /* sys_boot2.gpio_4 */
 223                 >;
 224         };
 225 };
 226
 227 &omap3_pmx_core2 {
 228         pinctrl-names = "default";
 229         pinctrl-0 = <&hsusb2_2_pins>;
 230         hsusb2_2_pins: pinmux_hsusb2_2_pins {
 231                 pinctrl-single,pins = <
 232                         OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
 233                         OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
 234                         OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
 235                         OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
 236                         OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
 237                         OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
 238                 >;
 239         };
 240 };
 241
 242 &uart2 {
 243         interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&uart2_pins>;
 246 };
 247
 248 &mcspi1 {
 249         pinctrl-names = "default";
 250         pinctrl-0 = <&mcspi1_pins>;
 251 };
 252
 253 #include "twl4030.dtsi"
 254 #include "twl4030_omap3.dtsi"
 255
 256 &twl {
 257         twl_power: power {
 258                 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
 259                 ti,use_poweroff;
 260         };
 261 };
 262
 263 &twl_gpio {
 264         ti,use-leds;
 265 };