2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
7 #include <dt-bindings/input/input.h>
16 wl12xx_vmmc: wl12xx_vmmc {
17 compatible = "regulator-fixed";
18 regulator-name = "vwl1271";
19 regulator-min-microvolt = <1800000>;
20 regulator-max-microvolt = <1800000>;
21 gpio = <&gpio1 3 0>; /* gpio_3 */
22 startup-delay-us = <70000>;
24 vin-supply = <&vmmc2>;
27 /* HS USB Host PHY on PORT 1 */
28 hsusb2_phy: hsusb2_phy {
29 compatible = "usb-nop-xceiv";
30 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
35 ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
38 compatible = "ti,omap2-nand";
39 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
40 interrupt-parent = <&gpmc>;
41 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
42 <1 IRQ_TYPE_NONE>; /* termcount */
43 linux,mtd-name = "micron,mt29f4g16abbda3w";
44 nand-bus-width = <16>;
45 ti,nand-ecc-opt = "bch8";
46 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
47 gpmc,sync-clk-ps = <0>;
49 gpmc,cs-rd-off-ns = <44>;
50 gpmc,cs-wr-off-ns = <44>;
52 gpmc,adv-rd-off-ns = <34>;
53 gpmc,adv-wr-off-ns = <44>;
54 gpmc,we-off-ns = <40>;
55 gpmc,oe-off-ns = <54>;
56 gpmc,access-ns = <64>;
57 gpmc,rd-cycle-ns = <82>;
58 gpmc,wr-cycle-ns = <82>;
59 gpmc,wr-access-ns = <40>;
60 gpmc,wr-data-mux-bus-ns = <0>;
61 gpmc,device-width = <2>;
65 /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
74 reg = <0x80000 0x1e0000>;
77 bootloaders_env@260000 {
79 reg = <0x260000 0x20000>;
84 reg = <0x280000 0x400000>;
89 reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
95 clock-frequency = <2600000>;
99 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
100 interrupt-parent = <&intc>;
102 compatible = "ti,twl4030-audio";
110 clock-frequency = <400000>;
114 clock-frequency = <400000>;
118 interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
119 pinctrl-0 = <&mmc3_pins>;
120 pinctrl-names = "default";
121 vmmc-supply = <&wl12xx_vmmc>;
125 #address-cells = <1>;
128 compatible = "ti,wl1273";
130 interrupt-parent = <&gpio5>;
131 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
132 ref-clock-frequency = <26000000>;
137 port2-mode = "ehci-phy";
141 phys = <0 &hsusb2_phy>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&hsusb2_pins>;
149 mmc3_pins: pinmux_mm3_pins {
150 pinctrl-single,pins = <
151 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
152 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
153 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
154 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
155 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
156 OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
157 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
158 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
161 mcbsp2_pins: pinmux_mcbsp2_pins {
162 pinctrl-single,pins = <
163 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
164 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
165 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
166 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
169 uart2_pins: pinmux_uart2_pins {
170 pinctrl-single,pins = <
171 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
172 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
173 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
174 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
175 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
178 mcspi1_pins: pinmux_mcspi1_pins {
179 pinctrl-single,pins = <
180 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
181 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
182 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
183 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
187 hsusb2_pins: pinmux_hsusb2_pins {
188 pinctrl-single,pins = <
189 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
190 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
191 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
192 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
193 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
194 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
198 hsusb_otg_pins: pinmux_hsusb_otg_pins {
199 pinctrl-single,pins = <
200 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
201 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
202 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
203 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
204 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
205 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
206 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
207 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
208 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
209 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
210 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
211 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
219 pinctrl-names = "default";
220 pinctrl-0 = <&hsusb2_reset_pin>;
221 hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
222 pinctrl-single,pins = <
223 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
229 pinctrl-names = "default";
230 pinctrl-0 = <&hsusb2_2_pins>;
231 hsusb2_2_pins: pinmux_hsusb2_2_pins {
232 pinctrl-single,pins = <
233 OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
234 OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
235 OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
236 OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
237 OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
238 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
244 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&uart2_pins>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&mcspi1_pins>;
254 #include "twl4030.dtsi"
255 #include "twl4030_omap3.dtsi"
259 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";