arch/arm/boot/dts/lpc18xx.dtsi

   1 /*
   2  * Common base for NXP LPC18xx and LPC43xx devices.
   3  *
   4  * Copyright 2015 Joachim Eastwood <manabian@gmail.com>
   5  *
   6  * This code is released using a dual license strategy: BSD/GPL
   7  * You can choose the licence that better fits your requirements.
   8  *
   9  * Released under the terms of 3-clause BSD License
  10  * Released under the terms of GNU General Public License Version 2.0
  11  *
  12  */
  13
  14 #include "armv7-m.dtsi"
  15
  16 / {
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 cpu@0 {
  22                         compatible = "arm,cortex-m3";
  23                         device_type = "cpu";
  24                         reg = <0x0>;
  25                 };
  26         };
  27
  28         clocks {
  29                 xtal: xtal {
  30                         compatible = "fixed-clock";
  31                         #clock-cells = <0>;
  32                         clock-frequency = <12000000>;
  33                 };
  34
  35                 /* Temporary hardcode PLL1 until clk drivers are merged */
  36                 pll1: pll1 {
  37                         compatible = "fixed-factor-clock";
  38                         clocks = <&xtal>;
  39                         #clock-cells = <0>;
  40                         clock-div = <1>;
  41                         clock-mult = <12>;
  42                 };
  43         };
  44
  45         soc {
  46                 uart0: serial@40081000 {
  47                         compatible = "ns16550a";
  48                         reg = <0x40081000 0x1000>;
  49                         reg-shift = <2>;
  50                         interrupts = <24>;
  51                         clocks = <&pll1>;
  52                         status = "disabled";
  53                 };
  54
  55                 uart1: serial@40082000 {
  56                         compatible = "ns16550a";
  57                         reg = <0x40082000 0x1000>;
  58                         reg-shift = <2>;
  59                         interrupts = <25>;
  60                         clocks = <&pll1>;
  61                         status = "disabled";
  62                 };
  63
  64                 timer0: timer@40084000 {
  65                         compatible = "nxp,lpc3220-timer";
  66                         reg = <0x40084000 0x1000>;
  67                         interrupts = <12>;
  68                         clocks = <&pll1>;
  69                         clock-names = "timerclk";
  70                 };
  71
  72                 timer1: timer@40085000 {
  73                         compatible = "nxp,lpc3220-timer";
  74                         reg = <0x40085000 0x1000>;
  75                         interrupts = <13>;
  76                         clocks = <&pll1>;
  77                         clock-names = "timerclk";
  78                 };
  79
  80                 uart2: serial@400c1000 {
  81                         compatible = "ns16550a";
  82                         reg = <0x400c1000 0x1000>;
  83                         reg-shift = <2>;
  84                         interrupts = <26>;
  85                         clocks = <&pll1>;
  86                         status = "disabled";
  87                 };
  88
  89                 uart3: serial@400c2000 {
  90                         compatible = "ns16550a";
  91                         reg = <0x400c2000 0x1000>;
  92                         reg-shift = <2>;
  93                         interrupts = <27>;
  94                         clocks = <&pll1>;
  95                         status = "disabled";
  96                 };
  97
  98                 timer2: timer@400c3000 {
  99                         compatible = "nxp,lpc3220-timer";
 100                         reg = <0x400c3000 0x1000>;
 101                         interrupts = <14>;
 102                         clocks = <&pll1>;
 103                         clock-names = "timerclk";
 104                 };
 105
 106                 timer3: timer@400c4000 {
 107                         compatible = "nxp,lpc3220-timer";
 108                         reg = <0x400c4000 0x1000>;
 109                         interrupts = <15>;
 110                         clocks = <&pll1>;
 111                         clock-names = "timerclk";
 112                 };
 113         };
 114 };